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* ARM: add arm1176j-f processorTim Northover2017-05-021-0/+1
| | | | | | | | | I doubt anyone actually uses it, and I'm not even entirely convinced it exists myself; but it is our default for "clang -arch armv6". Functionally, if it does exist it's identical to the arm1176jz-f from LLVM's point of view (the difference is apparently in the "Security Extensions"). llvm-svn: 301962
* PEI: Skip dead objects when looking at CSRsMatt Arsenault2017-05-021-0/+3
| | | | | | | | On AMDGPU if an SGPR is spilled to a VGPR, the frame index is deleted. If there were any CSR SGPRs, this woudl assert when setting the offset. llvm-svn: 301961
* [PartialInlining] Add more early filteringXinliang David Li2017-05-021-0/+10
| | | | | | | This is a follow up to the previous inline cost patch for quicker filtering. llvm-svn: 301959
* AMDGPU: Don't promote alloca to LDS for leaf functionsMatt Arsenault2017-05-021-1/+8
| | | | | | LDS use in leaf functions not currently handled. llvm-svn: 301958
* [Hexagon] Fix uninitialized value caught with valgrindKrzysztof Parzyszek2017-05-021-1/+1
| | | | | | Patch by Colin LeMahieu. llvm-svn: 301957
* [Hexagon] Change iconst to emit 27bit relocationKrzysztof Parzyszek2017-05-0212-25/+32
| | | | | | Patch by Colin LeMahieu. llvm-svn: 301956
* [Hexagon] Add extenders for GD_PLT_B22_PCREL and LD_PLT_B22_PCRELKrzysztof Parzyszek2017-05-026-5/+49
| | | | | | Patch by Sid Manning. llvm-svn: 301955
* [Hexagon] Don't ignore mult-cycle latency informationKrzysztof Parzyszek2017-05-023-15/+30
| | | | | | | | | | | | | | | | | | | | | | | | The compiler was generating code that ends up ignoring a multiple latency dependence between two instructions by scheduling the intructions in back-to-back packets. The packetizer needs to end a packet if the latency of the current current insruction and the source in the previous packet is greater than 1 cycle. This case occurs when there is still room in the current packet, but scheduling the instruction causes a stall. Instead, the packetizer should start a new packet. Also, if the current packet already contains a stall, then it is okay to add another instruction to the packet that also causes a stall. This occurs when there are no instructions that can be scheduled in between the producer and consumer instructions. This patch changes the latency for loads to 2 cycles from 3 cycles. This change refects that a load only needs to be separated by one extra packet to eliminate the stall. Patch by Ikhlas Ajbar. llvm-svn: 301954
* [Hexagon] Formatting changes, NFCKrzysztof Parzyszek2017-05-024-8/+13
| | | | llvm-svn: 301953
* [Hexagon] Remove unused validSubtarget TSFlagsKrzysztof Parzyszek2017-05-028-58/+4
| | | | | | Patch by Colin LeMahieu. llvm-svn: 301952
* [Hexagon] Make sure duplexed dealloc_returns are checked for double jumpsKrzysztof Parzyszek2017-05-021-0/+8
| | | | | | Patch by Colin LeMahieu. llvm-svn: 301951
* SpeculativeExecution: Stop using whitelist for costsMatt Arsenault2017-05-021-42/+1
| | | | | | | Just let TTI's cost do this instead of arbitrarily restricting this. llvm-svn: 301950
* [Hexagon] Move checking AXOK to checkerKrzysztof Parzyszek2017-05-023-69/+80
| | | | | | Patch by Colin LeMahieu. llvm-svn: 301949
* Rename pdb::StringTable -> pdb::PDBStringTable.Zachary Turner2017-05-025-38/+39
| | | | | | | | With the forthcoming codeview::StringTable which a pdb::StringTable would hold an instance of as one member, this ambiguity becomes confusing. Rename to PDBStringTable to avoid this. llvm-svn: 301948
* [Hexagon] Remove unneeded code from HexagonShufflerKrzysztof Parzyszek2017-05-022-11/+9
| | | | | | Patch by Colin LeMahieu. llvm-svn: 301947
* [Hexagon] Extract function that checks endloops with other branchesKrzysztof Parzyszek2017-05-022-36/+39
| | | | | | | | Change location number to point to conflicting branch instruction. Patch by Colin LeMahieu. llvm-svn: 301946
* [Hexagon] Add new packet iterator which will iterate through duplexesKrzysztof Parzyszek2017-05-023-24/+82
| | | | | | Patch by Colin LeMahieu. llvm-svn: 301945
* Revert "Remove "_NC" suffix and semantics from TLSDESC_LD{64,32}_LO12 and"Zachary Turner2017-05-024-110/+25
| | | | | | | | This reverts commit c08155afc5d3230792da2ad30a046a8617735a73. This is causing undefined symbol errors with some of the constants. llvm-svn: 301944
* [Hexagon] Check for .cur def without use without using a map data structureKrzysztof Parzyszek2017-05-022-24/+42
| | | | | | Patch by Colin LeMahieu. llvm-svn: 301943
* Bitcode: Simplify how we enumerate summaries in the index. NFCI.Peter Collingbourne2017-05-021-141/+23
| | | | | | | | | Instead of defining a custom iterator class, just use a function with a callback, which is much easier to understand and less error prone. Differential Revision: https://reviews.llvm.org/D32470 llvm-svn: 301942
* Make DWARFDebugLine use StringRef for directory/file tables. NFCPaul Robinson2017-05-022-16/+23
| | | | | | Differential Revision: http://reviews.llvm.org/D32728 llvm-svn: 301940
* Remove "_NC" suffix and semantics from TLSDESC_LD{64,32}_LO12 andJoel Jones2017-05-024-25/+110
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | TLSDESC_ADD_LO12 relocations Rearrange ordering in AArch64.def to follow relocation encoding Fix name: R_AARCH64_P32_LD64_GOT_LO12_NC => R_AARCH64_P32_LD32_GOT_LO12_NC Add support for several "TLS", "TLSGD", and "TLSLD" relocations for ILP32 Fix return values from isNonILP32reloc Add implementations for R_AARCH64_ADR_PREL_PG_HI21_NC, R_AARCH64_P32_LD32_GOT_LO12_NC, R_AARCH64_P32_TLSIE_LD32_GOTTPREL_LO12_NC, R_AARCH64_P32_TLSDESC_LD32_LO12, R_AARCH64_LD64_GOT_LO12_NC, *TLSLD_LDST128_DTPREL_LO12, *TLSLD_LDST128_DTPREL_LO12_NC, *TLSLE_LDST128_TPREL_LO12, *TLSLE_LDST128_TPREL_LO12_NC Modify error messages to give name of equivalent relocation in the ABI not being used, along with better checking for non-existent requested relocations. Added assembler support for "pg_hi21_nc" Relocation definitions added without implementations: R_AARCH64_P32_TLSDESC_ADR_PREL21, R_AARCH64_P32_TLSGD_ADR_PREL21, R_AARCH64_P32_TLSGD_ADD_LO12_NC, R_AARCH64_P32_TLSLD_ADR_PREL21, R_AARCH64_P32_TLSLD_ADR_PAGE21, R_AARCH64_P32_TLSLD_ADD_LO12_NC, R_AARCH64_P32_TLSLD_LD_PREL19, R_AARCH64_P32_TLSDESC_LD_PREL19, R_AARCH64_P32_TLSGD_ADR_PAGE21, R_AARCH64_P32_TLS_DTPREL, R_AARCH64_P32_TLS_DTPMOD, R_AARCH64_P32_TLS_TPREL, R_AARCH64_P32_TLSDESC Fix encoding: R_AARCH64_P32_TLSDESC_ADR_PAGE21 Reviewers: Peter Smith Patch by: Joel Jones (jjones@cavium.com) Differential Revision: https://reviews.llvm.org/D32072 llvm-svn: 301939
* AMDGPU: Refactor AsmPrinterMatt Arsenault2017-05-022-128/+245
| | | | | | | Avoid analyzing functions multiple times. This allows asserting that each function is only analyzed once. llvm-svn: 301938
* AMDGPU: Make intrinsics speculatableMatt Arsenault2017-05-021-1/+1
| | | | llvm-svn: 301937
* [PDB/CodeView] Read/write codeview inlinee line information.Zachary Turner2017-05-027-2/+147
| | | | | | | | Previously we wrote line information and file checksum information, but we did not write information about inlinee lines and functions. This patch adds support for that. llvm-svn: 301936
* AMDGPU: Add AMDGPU_HS calling conventionMarek Olsak2017-05-0212-2/+13
| | | | | | | | | | Reviewers: arsenm, nhaehnle Subscribers: mehdi_amini, kzhuravl, wdng, yaxunl, dstuttard, tpr, llvm-commits, t-tye Differential Revision: https://reviews.llvm.org/D32644 llvm-svn: 301930
* [InstCombine] don't use DeMorgan's Law on integer constants (2nd try)Sanjay Patel2017-05-021-18/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This was originally checked in here: https://reviews.llvm.org/rL301923 And reverted here: https://reviews.llvm.org/rL301924 Because there's a clang test that would fail after this. I fixed/removed the offending CHECK lines in: https://reviews.llvm.org/rL301928 So let's try this again. Original commit message: This is the fold that causes the infinite loop in BoringSSL (https://github.com/google/boringssl/blob/master/crypto/cipher/e_rc2.c) when we fix instcombine demanded bits to prefer 'not' ops as in https://reviews.llvm.org/D32255. There are 2 or 3 problems with dyn_castNotVal, and I don't think we can reinstate https://reviews.llvm.org/D32255 until dyn_castNotVal is completely eliminated. 1. As shown here, it transforms 'not' into random xor. This transform is harmful to SCEV and codegen because 'not' can often be folded while random xor cannot. 2. It does not transform vector constants. This is actually a good thing, but if you don't believe the above argument, then we shouldn't have excluded vectors. 3. It tries to avoid transforming not(not(X)). That's nice, but it doesn't match the greedy nature of instcombine. If we DeMorganize a pattern that has an extra 'not' in it: ~(~(~X) & Y) --> (~X | ~Y) That's just another case of DeMorgan, so we should trust that we'll fold that pattern too: (~X | ~ Y) --> ~(X & Y) Differential Revision: https://reviews.llvm.org/D32665 llvm-svn: 301929
* revert r301923 : [InstCombine] don't use DeMorgan's Law on integer constantsSanjay Patel2017-05-021-21/+18
| | | | | | There's a clang test that is wrongly using -O1 and failing after this commit. llvm-svn: 301924
* [InstCombine] don't use DeMorgan's Law on integer constantsSanjay Patel2017-05-021-18/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | This is the fold that causes the infinite loop in BoringSSL (https://github.com/google/boringssl/blob/master/crypto/cipher/e_rc2.c) when we fix instcombine demanded bits to prefer 'not' ops as in D32255. There are 2 or 3 problems with dyn_castNotVal, and I don't think we can reinstate D32255 until dyn_castNotVal is completely eliminated. 1. As shown here, it transforms 'not' into random xor. This transform is harmful to SCEV and codegen because 'not' can often be folded while random xor cannot. 2. It does not transform vector constants. This is actually a good thing, but if you don't believe the above argument, then we shouldn't have excluded vectors. 3. It tries to avoid transforming not(not(X)). That's nice, but it doesn't match the greedy nature of instcombine. If we DeMorganize a pattern that has an extra 'not' in it: ~(~(~X) & Y) --> (~X | ~Y) That's just another case of DeMorgan, so we should trust that we'll fold that pattern too: (~X | ~ Y) --> ~(X & Y) Differential Revision: https://reviews.llvm.org/D32665 llvm-svn: 301923
* [DAGCombine] (uaddo X, (addcarry Y, 0, Carry)) -> (addcarry X, Y, Carry)Amaury Sechet2017-05-021-0/+21
| | | | | | | | | | | | Summary: This is a common pattern that arise when legalizing large integers operations. Only do it when Y + 1 cannot overflow as this would change the carry behavior of uaddo . Reviewers: jyknight, nemanjai, mkuper, spatel, RKSimon, zvi, bkramer Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D32687 llvm-svn: 301922
* Add llvm::object::getELFSectionTypeName().Rafael Espindola2017-05-021-3/+63
| | | | | | | | | | | This is motivated by https://reviews.llvm.org/D32488 where I am trying to add printing of the section type for incompatible sections to LLD error messages. This patch allows us to use the same code in llvm-readobj and LLD instead of duplicating the function inside LLD. Patch by Alexander Richardson! llvm-svn: 301921
* [DAGCombine] (add X, (addcarry Y, 0, Carry)) -> (addcarry X, Y, Carry)Amaury Sechet2017-05-021-0/+5
| | | | | | | | | | Summary: Common pattern when legalizing large integers operations. Similar to D32687, when the carry isn't used. Reviewers: jyknight, nemanjai, mkuper, spatel, RKSimon, zvi, bkramer Differential Revision: https://reviews.llvm.org/D32738 llvm-svn: 301919
* [X86] Tidyup subvector insert/extract helpers. NFCI.Simon Pilgrim2017-05-021-24/+9
| | | | | | Use getConstantOperandVal where possible. llvm-svn: 301912
* Fix typo in comment. NFCI.Simon Pilgrim2017-05-021-2/+2
| | | | llvm-svn: 301911
* [SelectionDAG] Improve support for promotion of <1 x fX> floating point ↵Simon Pilgrim2017-05-023-13/+20
| | | | | | | | | | | | argument types (PR31088) PR31088 demonstrated that we were assuming that only integers require promotion from <1 x iX> types, when in fact float types may require it as well - in this case half floats. This patch adds support for extension/truncation for both integer and float types. Differential Revision: https://reviews.llvm.org/D32391 llvm-svn: 301910
* [DAGCombiner] Improve MatchBswapHword logic (PR31357)Simon Pilgrim2017-05-021-11/+16
| | | | | | | | | | | | The existing code only looks at half of the tree when matching bswap + rol patterns ending in an OR tree (as opposed to a cascade). Patch originally introduced by Jim Lewis. Submitted on the behalf of Dinar Temirbulatov. Differential Revision: https://reviews.llvm.org/D32039 llvm-svn: 301907
* [ARM] GlobalISel: Use TableGen instruction selectorDiana Picus2017-05-025-22/+57
| | | | | | | | | | | Emit and use the TableGen instruction selector for ARM. At the moment, this allows us to remove the hand-written code for selecting G_SDIV and G_UDIV. Future commits will focus on increasing the code coverage for it and removing more dead code from the current instruction selector. llvm-svn: 301905
* [APInt] Move APInt::getSplat out of line.Craig Topper2017-05-021-0/+11
| | | | | | I think this method is probably too complex to be inlined. llvm-svn: 301901
* [APInt] Move the setBit and clearBit methods inline.Craig Topper2017-05-021-16/+0
| | | | | | This makes setBit/clearBit more consistent with setBits which is already inlined. llvm-svn: 301900
* Refactor callsite cost computation into a helper function /NFCXinliang David Li2017-05-021-29/+35
| | | | | | | Makes code more readable. The function will also be used by the partial inlining's cost analysis. llvm-svn: 301899
* [PartialInlining] Hook up inline cost analysisXinliang David Li2017-05-021-11/+98
| | | | | | Differential Revision: http://reviews.llvm.org/D32666 llvm-svn: 301894
* [AVR] Save/restore the frame pointer for all functionsDylan McKay2017-05-021-11/+10
| | | | | | | A recent commit I made made it so that we only did this for signal or interrupt handlers. This broke normal functions. llvm-svn: 301893
* [PowerPC] Emit VMX loads/stores for aligned ops to avoid adding swaps on LENemanja Ivanovic2017-05-022-6/+23
| | | | | | | | | | | | | Fixes PR30730. This is a re-commit of a pulled commit. The commit was pulled because some software projects contained uses of Altivec vectors that violated alignment requirements. Known issues have now been fixed. Committing on behalf of Lei Huang. Differential Revision: https://reviews.llvm.org/D26861 llvm-svn: 301892
* [AVR] Fix a bug where the frame pointer is clobberedDylan McKay2017-05-021-7/+17
| | | | | | | | | | | | | | | Because it was a callee-saved register, we automatically generated code to spill and unspill its original value so that it is restored after the function returns. The problem is that this code was being generated before the epilogue. The epilogue itself uses the Y register, which could be prematurely restored by the CSR restoration process. This removes R29R28 from the CSR list and changes the prologue/epilogue code to handle it explicitly. llvm-svn: 301887
* Revert r301880George Burgess IV2017-05-011-13/+0
| | | | | | | | | This change caused buildbot failures, apparently because we're not passing around types that InstSimplify is used to seeing. I'm not overly familiar with InstSimplify, so I'm reverting this until I can figure out what exactly is wrong. llvm-svn: 301885
* Stylistic makeover of DWARFDebugLine before working on it. NFCPaul Robinson2017-05-011-180/+177
| | | | | | | Rename parameters and locals to CamelCase, doxygenize the header, and run clang-format on the whole thing. llvm-svn: 301883
* [CodeView] Write CodeView line information.Zachary Turner2017-05-019-7/+246
| | | | | | Differential Revision: https://reviews.llvm.org/D32716 llvm-svn: 301882
* [AVR] Enable the frame pointer for all functionsDylan McKay2017-05-011-2/+3
| | | | | | | This is a temporary measure while we figure out a way to get the frame pointer working correctly. llvm-svn: 301881
* [InstSimplify] Handle selects of GEPs with 0 offsetGeorge Burgess IV2017-05-011-0/+13
| | | | | | | | | In particular (since it wouldn't fit nicely in the summary): (select (icmp eq V 0) P (getelementptr P V)) -> (getelementptr P V) Differential Revision: https://reviews.llvm.org/D31435 llvm-svn: 301880
* [X86] Reduce code for setting operations actions by merging into loops ↵Simon Pilgrim2017-05-011-129/+68
| | | | | | across multiple types/ops. NFCI. llvm-svn: 301879
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