Revert "Remove "_NC" suffix and semantics from TLSDESC_LD{64,32}_LO12 and"

This reverts commit c08155afc5d3230792da2ad30a046a8617735a73.

This is causing undefined symbol errors with some of the constants.

llvm-svn: 301944

4 files changed, 25 insertions, 110 deletions

diff --git a/llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp b/llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
index 056ffd58b52..efc22189378 100644
--- a/llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
+++ b/llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
@@ -580,7 +580,8 @@ void AArch64AsmPrinter::EmitInstruction(const MachineInstr *MI) {
     const MachineOperand &MO_Sym = MI->getOperand(0);
     MachineOperand MO_TLSDESC_LO12(MO_Sym), MO_TLSDESC(MO_Sym);
     MCOperand Sym, SymTLSDescLo12, SymTLSDesc;
-    MO_TLSDESC_LO12.setTargetFlags(AArch64II::MO_TLS | AArch64II::MO_PAGEOFF);
+    MO_TLSDESC_LO12.setTargetFlags(AArch64II::MO_TLS | AArch64II::MO_PAGEOFF |
+                                   AArch64II::MO_NC);
     MO_TLSDESC.setTargetFlags(AArch64II::MO_TLS | AArch64II::MO_PAGE);
     MCInstLowering.lowerOperand(MO_Sym, Sym);
     MCInstLowering.lowerOperand(MO_TLSDESC_LO12, SymTLSDescLo12);
diff --git a/llvm/lib/Target/AArch64/MCTargetDesc/AArch64ELFObjectWriter.cpp b/llvm/lib/Target/AArch64/MCTargetDesc/AArch64ELFObjectWriter.cpp
index 10e7241da70..c954c0eb2c6 100644
--- a/llvm/lib/Target/AArch64/MCTargetDesc/AArch64ELFObjectWriter.cpp
+++ b/llvm/lib/Target/AArch64/MCTargetDesc/AArch64ELFObjectWriter.cpp
@@ -69,34 +69,34 @@ static bool isNonILP32reloc(const MCFixup &Fixup,
       return true;
     case AArch64MCExpr::VK_ABS_G2_S:
       Ctx.reportError(Fixup.getLoc(), BAD_ILP32_MOV(MOVW_SABS_G2));
-      return true;
+      return ELF::R_AARCH64_NONE;
     case AArch64MCExpr::VK_ABS_G2_NC:
       Ctx.reportError(Fixup.getLoc(), BAD_ILP32_MOV(MOVW_UABS_G2_NC));
-      return true;
+      return ELF::R_AARCH64_NONE;
     case AArch64MCExpr::VK_ABS_G1_S:
       Ctx.reportError(Fixup.getLoc(), BAD_ILP32_MOV(MOVW_SABS_G1));
-      return true;
+      return ELF::R_AARCH64_NONE;
     case AArch64MCExpr::VK_ABS_G1_NC:
       Ctx.reportError(Fixup.getLoc(), BAD_ILP32_MOV(MOVW_UABS_G1_NC));
-      return true;
+      return ELF::R_AARCH64_NONE;
     case AArch64MCExpr::VK_DTPREL_G2:
       Ctx.reportError(Fixup.getLoc(), BAD_ILP32_MOV(TLSLD_MOVW_DTPREL_G2));
-      return true;
+      return ELF::R_AARCH64_NONE;
     case AArch64MCExpr::VK_DTPREL_G1_NC:
       Ctx.reportError(Fixup.getLoc(), BAD_ILP32_MOV(TLSLD_MOVW_DTPREL_G1_NC));
-      return true;
+      return ELF::R_AARCH64_NONE;
     case AArch64MCExpr::VK_TPREL_G2:
       Ctx.reportError(Fixup.getLoc(), BAD_ILP32_MOV(TLSLE_MOVW_TPREL_G2));
-      return true;
+      return ELF::R_AARCH64_NONE;
     case AArch64MCExpr::VK_TPREL_G1_NC:
       Ctx.reportError(Fixup.getLoc(), BAD_ILP32_MOV(TLSLE_MOVW_TPREL_G1_NC));
-      return true;
+      return ELF::R_AARCH64_NONE;
     case AArch64MCExpr::VK_GOTTPREL_G1:
       Ctx.reportError(Fixup.getLoc(), BAD_ILP32_MOV(TLSIE_MOVW_GOTTPREL_G1));
-      return true;
+      return ELF::R_AARCH64_NONE;
     case AArch64MCExpr::VK_GOTTPREL_G0_NC:
       Ctx.reportError(Fixup.getLoc(), BAD_ILP32_MOV(TLSIE_MOVW_GOTTPREL_G0_NC));
-      return true;
+      return ELF::R_AARCH64_NONE;
     default: return false;
   }
   return false;
@@ -141,16 +141,6 @@ unsigned AArch64ELFObjectWriter::getRelocType(MCContext &Ctx,
     case AArch64::fixup_aarch64_pcrel_adrp_imm21:
       if (SymLoc == AArch64MCExpr::VK_ABS && !IsNC)
         return R_CLS(ADR_PREL_PG_HI21);
-      if (SymLoc == AArch64MCExpr::VK_ABS && IsNC) {
-        if (IsILP32) {
-          Ctx.reportError(Fixup.getLoc(),
-                          "invalid fixup for 32-bit pcrel ADRP instruction "
-                          "VK_ABS VK_NC");
-          return ELF::R_AARCH64_NONE;
-        } else {
-          return ELF::R_AARCH64_ADR_PREL_PG_HI21_NC;
-        }
-      }
       if (SymLoc == AArch64MCExpr::VK_GOT && !IsNC)
         return R_CLS(ADR_GOT_PAGE);
       if (SymLoc == AArch64MCExpr::VK_GOTTPREL && !IsNC)
@@ -189,8 +179,7 @@ unsigned AArch64ELFObjectWriter::getRelocType(MCContext &Ctx,
       return R_CLS(ABS32);
     case FK_Data_8:
       if (IsILP32) {
-        Ctx.reportError(Fixup.getLoc(), "ILP32 8 byte absolute data "
-			"relocation not supported (LP64 eqv: ABS64)");
+        Ctx.reportError(Fixup.getLoc(), BAD_ILP32_MOV(ABS64));
         return ELF::R_AARCH64_NONE;
       } else
         return ELF::R_AARCH64_ABS64;
@@ -208,7 +197,7 @@ unsigned AArch64ELFObjectWriter::getRelocType(MCContext &Ctx,
       if (RefKind == AArch64MCExpr::VK_TPREL_LO12)
         return R_CLS(TLSLE_ADD_TPREL_LO12);
       if (RefKind == AArch64MCExpr::VK_TLSDESC_LO12)
-        return R_CLS(TLSDESC_ADD_LO12);
+        return R_CLS(TLSDESC_ADD_LO12_NC);
       if (SymLoc == AArch64MCExpr::VK_ABS && IsNC)
         return R_CLS(ADD_ABS_LO12_NC);
 
@@ -256,67 +245,15 @@ unsigned AArch64ELFObjectWriter::getRelocType(MCContext &Ctx,
         return R_CLS(TLSLE_LDST32_TPREL_LO12);
       if (SymLoc == AArch64MCExpr::VK_TPREL && IsNC)
         return R_CLS(TLSLE_LDST32_TPREL_LO12_NC);
-      if (SymLoc == AArch64MCExpr::VK_GOT && IsNC) {
-        if (IsILP32) {
-          return ELF::R_AARCH64_P32_LD32_GOT_LO12_NC;
-        } else {
-          Ctx.reportError(Fixup.getLoc(),
-                          "LP64 4 byte unchecked GOT load/store relocation "
-			  "not supported (ILP32 eqv: LD32_GOT_LO12_NC");
-          return ELF::R_AARCH64_NONE;
-        }
-      }
-      if (SymLoc == AArch64MCExpr::VK_GOT && !IsNC) {
-        if (IsILP32) {
-          Ctx.reportError(Fixup.getLoc(),
-                          "ILP32 4 byte checked GOT load/store relocation "
-			  "not supported (unchecked eqv: LD32_GOT_LO12_NC)");
-        } else {
-          Ctx.reportError(Fixup.getLoc(),
-                          "LP64 4 byte checked GOT load/store relocation "
-			  "not supported (unchecked/ILP32 eqv: "
-			  "LD32_GOT_LO12_NC)");
-        }
-        return ELF::R_AARCH64_NONE;
-      }
-      if (SymLoc == AArch64MCExpr::VK_GOTTPREL && IsNC) {
-        if (IsILP32) {
-          return ELF::R_AARCH64_P32_TLSIE_LD32_GOTTPREL_LO12_NC;
-        } else {
-          Ctx.reportError(Fixup.getLoc(), "LP64 32-bit load/store "
-                          "relocation not supported (ILP32 eqv: "
-                          "TLSIE_LD32_GOTTPREL_LO12_NC)");
-          return ELF::R_AARCH64_NONE;
-        }
-      }
-      if (SymLoc == AArch64MCExpr::VK_TLSDESC && !IsNC) {
-        if (IsILP32) {
-          return ELF::R_AARCH64_P32_TLSDESC_LD32_LO12;
-        } else {
-          Ctx.reportError(Fixup.getLoc(),
-                          "LP64 4 byte TLSDESC load/store relocation "
-			  "not supported (ILP32 eqv: TLSDESC_LD64_LO12)");
-          return ELF::R_AARCH64_NONE;
-        }
-      }
 
       Ctx.reportError(Fixup.getLoc(),
-                      "invalid fixup for 32-bit load/store instruction "
-		      "fixup_aarch64_ldst_imm12_scale4");
+                      "invalid fixup for 32-bit load/store instruction");
       return ELF::R_AARCH64_NONE;
     case AArch64::fixup_aarch64_ldst_imm12_scale8:
       if (SymLoc == AArch64MCExpr::VK_ABS && IsNC)
         return R_CLS(LDST64_ABS_LO12_NC);
-      if (SymLoc == AArch64MCExpr::VK_GOT && IsNC) {
-        if (!IsILP32) {
-          return ELF::R_AARCH64_LD64_GOT_LO12_NC;
-        } else {
-          Ctx.reportError(Fixup.getLoc(), "ILP32 64-bit load/store "
-                          "relocation not supported (LP64 eqv: "
-                          "LD64_GOT_LO12_NC)");
-          return ELF::R_AARCH64_NONE;
-        }
-      }
+      if (SymLoc == AArch64MCExpr::VK_GOT && IsNC)
+        return R_CLS(LD64_GOT_LO12_NC);
       if (SymLoc == AArch64MCExpr::VK_DTPREL && !IsNC)
         return R_CLS(TLSLD_LDST64_DTPREL_LO12);
       if (SymLoc == AArch64MCExpr::VK_DTPREL && IsNC)
@@ -325,40 +262,19 @@ unsigned AArch64ELFObjectWriter::getRelocType(MCContext &Ctx,
         return R_CLS(TLSLE_LDST64_TPREL_LO12);
       if (SymLoc == AArch64MCExpr::VK_TPREL && IsNC)
         return R_CLS(TLSLE_LDST64_TPREL_LO12_NC);
-      if (SymLoc == AArch64MCExpr::VK_GOTTPREL && IsNC) {
-        if (!IsILP32) {
-          return ELF::R_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC;
-        } else {
-          Ctx.reportError(Fixup.getLoc(), "ILP32 64-bit load/store "
-                          "relocation not supported (LP64 eqv: "
-                          "TLSIE_LD64_GOTTPREL_LO12_NC)");
-          return ELF::R_AARCH64_NONE;
-        }
-      }
-      if (SymLoc == AArch64MCExpr::VK_TLSDESC) {
-        if (!IsILP32) {
-          return ELF::R_AARCH64_TLSDESC_LD64_LO12;
-        } else {
-          Ctx.reportError(Fixup.getLoc(), "ILP32 64-bit load/store "
-                          "relocation not supported (LP64 eqv: "
-                          "TLSDESC_LD64_LO12)");
-          return ELF::R_AARCH64_NONE;
-        }
-      }
+      if (SymLoc == AArch64MCExpr::VK_GOTTPREL && IsNC)
+        return IsILP32 ? ELF::R_AARCH64_P32_TLSIE_LD32_GOTTPREL_LO12_NC
+                       : ELF::R_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC;
+      if (SymLoc == AArch64MCExpr::VK_TLSDESC && IsNC)
+        return IsILP32 ? ELF::R_AARCH64_P32_TLSDESC_LD32_LO12_NC
+                       : ELF::R_AARCH64_TLSDESC_LD64_LO12_NC;
+
       Ctx.reportError(Fixup.getLoc(),
                       "invalid fixup for 64-bit load/store instruction");
       return ELF::R_AARCH64_NONE;
     case AArch64::fixup_aarch64_ldst_imm12_scale16:
       if (SymLoc == AArch64MCExpr::VK_ABS && IsNC)
         return R_CLS(LDST128_ABS_LO12_NC);
-      if (SymLoc == AArch64MCExpr::VK_DTPREL && !IsNC)
-        return R_CLS(TLSLD_LDST128_DTPREL_LO12);
-      if (SymLoc == AArch64MCExpr::VK_DTPREL && IsNC)
-        return R_CLS(TLSLD_LDST128_DTPREL_LO12_NC);
-      if (SymLoc == AArch64MCExpr::VK_TPREL && !IsNC)
-        return R_CLS(TLSLE_LDST128_TPREL_LO12);
-      if (SymLoc == AArch64MCExpr::VK_TPREL && IsNC)
-        return R_CLS(TLSLE_LDST128_TPREL_LO12_NC);
 
       Ctx.reportError(Fixup.getLoc(),
                       "invalid fixup for 128-bit load/store instruction");
diff --git a/llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCExpr.cpp b/llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCExpr.cpp
index 97c92fa0778..a540f49866a 100644
--- a/llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCExpr.cpp
+++ b/llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCExpr.cpp
@@ -62,7 +62,6 @@ StringRef AArch64MCExpr::getVariantKindName() const {
   case VK_TPREL_LO12_NC:       return ":tprel_lo12_nc:";
   case VK_TLSDESC_LO12:        return ":tlsdesc_lo12:";
   case VK_ABS_PAGE:            return "";
-  case VK_ABS_PAGE_NC:         return ":pg_hi21_nc:";
   case VK_GOT_PAGE:            return ":got:";
   case VK_GOT_LO12:            return ":got_lo12:";
   case VK_GOTTPREL_PAGE:       return ":gottprel:";
diff --git a/llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCExpr.h b/llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCExpr.h
index 3dbf0f84a66..db36a65564c 100644
--- a/llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCExpr.h
+++ b/llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCExpr.h
@@ -62,7 +62,6 @@ public:
     // since a user would write ":lo12:").
     VK_CALL              = VK_ABS,
     VK_ABS_PAGE          = VK_ABS      | VK_PAGE,
-    VK_ABS_PAGE_NC       = VK_ABS      | VK_PAGE    | VK_NC,
     VK_ABS_G3            = VK_ABS      | VK_G3,
     VK_ABS_G2            = VK_ABS      | VK_G2,
     VK_ABS_G2_S          = VK_SABS     | VK_G2,
@@ -96,7 +95,7 @@ public:
     VK_TPREL_HI12        = VK_TPREL    | VK_HI12,
     VK_TPREL_LO12        = VK_TPREL    | VK_PAGEOFF,
     VK_TPREL_LO12_NC     = VK_TPREL    | VK_PAGEOFF | VK_NC,
-    VK_TLSDESC_LO12      = VK_TLSDESC  | VK_PAGEOFF,
+    VK_TLSDESC_LO12      = VK_TLSDESC  | VK_PAGEOFF | VK_NC,
     VK_TLSDESC_PAGE      = VK_TLSDESC  | VK_PAGE,
 
     VK_INVALID  = 0xfff