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* [StackMap] Rename variables to be more consistent. NFC.Juergen Ributzka2015-07-091-40/+38
| | | | | | Rename a few variables and use auto for long iterator names. llvm-svn: 241822
* [StackMaps] Use emplace_back when possible. NFC.Juergen Ributzka2015-07-091-5/+5
| | | | llvm-svn: 241821
* AMDGPU/SI: The SIShrinkInstructions pass should only fold immediates with ↵Tom Stellard2015-07-091-1/+1
| | | | | | | | | one use This is convered by existing testcases and will be exposed by a future commit. llvm-svn: 241817
* AMDGPU/SI: Fix crash on physical registers in SIInstrInfo::isOperandLegal()Tom Stellard2015-07-091-1/+4
| | | | | | | No test case for this. I ran into it while working on some improvements to SIShrinkInstructions.cpp. llvm-svn: 241816
* Basic support for BSD symbol tables in archives.Rafael Espindola2015-07-091-17/+39
| | | | | | | This could be optimized and for now we only produce __.SYMDEF and not "__.SYMDEF SORTED". llvm-svn: 241814
* [Hexagon] Add missing preamble to a source fileKrzysztof Parzyszek2015-07-091-0/+9
| | | | llvm-svn: 241813
* Remove redundant variable. NFC.Rafael Espindola2015-07-091-2/+1
| | | | llvm-svn: 241810
* Don't rely on the DepCands iteration order when constructing checking ↵Silviu Baranga2015-07-091-4/+26
| | | | | | | | | | | | | | | | | | | pointer groups Summary: The checking pointer group construction algorithm relied on the iteration on DepCands. We would need the same leaders across runs and the same iteration order over the underlying std::set for determinism. This changes the algorithm to process the pointers in the order in which they were added to the runtime check, which is deterministic. We need to update the tests, since the order in which pointers appear has changed. No new tests were added, since it is impossible to test for non-determinism. Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D11064 llvm-svn: 241809
* Add a helper to printing BE of LE depending on the format.Rafael Espindola2015-07-091-6/+10
| | | | | | | The gnu ar format uses BE numbers. The BSD one uses LE. Add a helper for one or the other. NFC for now, just removes some noise from the following patch. llvm-svn: 241808
* Re-instate the EVT parameter to getScalarShiftAmountTy() for OOT userMehdi Amini2015-07-0916-18/+22
| | | | | | | A documentation for this function would be nice by the way. From: Mehdi Amini <mehdi.amini@apple.com> llvm-svn: 241807
* Reapply fixed r241790: Fix shift legalization and lowering for big constants.Pawel Bylica2015-07-093-18/+17
| | | | | | | | | | | | Summary: If shift amount is a constant value > 64 bit it is handled incorrectly during type legalization and X86 lowering. This patch the type of shift amount argument in function DAGTypeLegalizer::ExpandShiftByConstant from unsigned to APInt. Reviewers: nadav, majnemer, sanjoy, RKSimon Subscribers: RKSimon, llvm-commits Differential Revision: http://reviews.llvm.org/D10767 llvm-svn: 241806
* Extract printBSDMemberHeader.Rafael Espindola2015-07-091-22/+25
| | | | | | | It will get another use in the following patch. Also rename the other helper to printGNUSmallMemberHeader for consistency. llvm-svn: 241805
* [Hexagon] Add support for atomic RMW operationsKrzysztof Parzyszek2015-07-093-1/+59
| | | | llvm-svn: 241804
* [AArch64] Select SBFIZ or UBFIZ instead of left + right shiftsArnaud A. de Grandmaison2015-07-091-20/+16
| | | | | | And rename LSB to Immr / MSB to Imms to match the ARM ARM terminology. llvm-svn: 241803
* [ARM] Thumb1 3 to 2 operand convertion for commutative operationsScott Douglass2015-07-091-3/+21
| | | | | | Differential Revision: http://reviews.llvm.org/D11057 llvm-svn: 241802
* [ARM] Don't be overzealous converting Thumb1 3 to 2 operandsScott Douglass2015-07-091-0/+5
| | | | | | Differential Revision: http://reviews.llvm.org/D11056 llvm-svn: 241801
* [ARM] Add Thumb2 ADD with PC narrowing from 3 operand to 2Scott Douglass2015-07-091-2/+12
| | | | | | Differential Revision: http://reviews.llvm.org/D11055 llvm-svn: 241800
* [ARM] Refactor converting Thumb1 from 3 to 2 operand (nfc)Scott Douglass2015-07-091-42/+45
| | | | | | | | Also adds some test cases. Differential Revision: http://reviews.llvm.org/D11054 llvm-svn: 241799
* Add support for nest attribute to AArch64 backendRenato Golin2015-07-091-0/+5
| | | | | | | | | | | | | | | The nest attribute is currently supported on the x86 (32-bit) and x86-64 backends, but not on ARM (32-bit) or AArch64. This patch adds support for nest to the AArch64 backend. Register x18 is used by GCC for this purpose and hence is used here. As discussed on the GCC mailing list the register choice is an ABI issue and so choosing the same register as GCC means __builtin_call_with_static_chain is compatible. Patch by Stephen Cross. llvm-svn: 241794
* Add getSizeInBits function to the APFloat classTamas Berghammer2015-07-091-8/+15
| | | | | | | | | The newly added function returns the size of the specified floating point semantics in bits. Differential revision: http://reviews.llvm.org/D8413 llvm-svn: 241793
* Revert r241790: Fix shift legalization and lowering for big constants.Pawel Bylica2015-07-093-18/+19
| | | | llvm-svn: 241792
* Fix shift legalization and lowering for big constants.Pawel Bylica2015-07-093-19/+18
| | | | | | | | | | | | Summary: If shift amount is a constant value > 64 bit it is handled incorrectly during type legalization and X86 lowering. This patch the type of shift amount argument in function DAGTypeLegalizer::ExpandShiftByConstant from unsigned to APInt. Reviewers: nadav, majnemer, sanjoy, RKSimon Subscribers: RKSimon, llvm-commits Differential Revision: http://reviews.llvm.org/D10767 llvm-svn: 241790
* Extended syntax of vector version of getelementptr instruction.Elena Demikhovsky2015-07-093-22/+48
| | | | | | | | | | | | | | | | | | | | | | | | | | The justification of this change is here: http://lists.cs.uiuc.edu/pipermail/llvmdev/2015-March/082989.html According to the current GEP syntax, vector GEP requires that each index must be a vector with the same number of elements. %A = getelementptr i8, <4 x i8*> %ptrs, <4 x i64> %offsets In this implementation I let each index be or vector or scalar. All vector indices must have the same number of elements. The scalar value will mean the splat vector value. (1) %A = getelementptr i8, i8* %ptr, <4 x i64> %offsets or (2) %A = getelementptr i8, <4 x i8*> %ptrs, i64 %offset In all cases the %A type is <4 x i8*> In the case (2) we add the same offset to all pointers. The case (1) covers C[B[i]] case, when we have the same base C and different offsets B[i]. The documentation is updated. http://reviews.llvm.org/D10496 llvm-svn: 241788
* [LAA] Fix line break in commentAdam Nemet2015-07-091-1/+1
| | | | llvm-svn: 241785
* [LAA] Rename IsRTNeeded to IsRTCheckAnalysisNeededAdam Nemet2015-07-091-6/+17
| | | | | | | | | | | | The original name was too close to NeedRTCheck which is what the actual memcheck analysis returns. This flag, as the new name suggests, is only used to whether to initiate that analysis. Also a comment is added to answer one question I had about this code for a long time. Namely, how does this flag differ from isDependencyCheckNeeded since they are seemingly set at the same time. llvm-svn: 241784
* Remove getDataLayout() from TargetSelectionDAGInfo (had no users)Mehdi Amini2015-07-0941-298/+27
| | | | | | | | | | | | | | | | | | Summary: Remove empty subclass in the process. This change is part of a series of commits dedicated to have a single DataLayout during compilation by using always the one owned by the module. Reviewers: echristo Subscribers: jholewinski, llvm-commits, rafael, yaron.keren, ted Differential Revision: http://reviews.llvm.org/D11045 From: Mehdi Amini <mehdi.amini@apple.com> llvm-svn: 241780
* Remove getDataLayout() from TargetLoweringMehdi Amini2015-07-0915-112/+120
| | | | | | | | | | | | | | | | Summary: This change is part of a series of commits dedicated to have a single DataLayout during compilation by using always the one owned by the module. Reviewers: echristo Subscribers: yaron.keren, rafael, llvm-commits, jholewinski Differential Revision: http://reviews.llvm.org/D11042 From: Mehdi Amini <mehdi.amini@apple.com> llvm-svn: 241779
* Make isLegalAddressingMode() taking DataLayout as an argumentMehdi Amini2015-07-0923-61/+61
| | | | | | | | | | | | | | | | Summary: This change is part of a series of commits dedicated to have a single DataLayout during compilation by using always the one owned by the module. Reviewers: echristo Subscribers: jholewinski, llvm-commits, rafael, yaron.keren Differential Revision: http://reviews.llvm.org/D11040 From: Mehdi Amini <mehdi.amini@apple.com> llvm-svn: 241778
* Make getByValTypeAlignment() taking DataLayout as an argumentMehdi Amini2015-07-097-10/+15
| | | | | | | | | | | | | | | | Summary: This change is part of a series of commits dedicated to have a single DataLayout during compilation by using always the one owned by the module. Reviewers: echristo Subscribers: yaron.keren, rafael, llvm-commits, jholewinski Differential Revision: http://reviews.llvm.org/D11038 From: Mehdi Amini <mehdi.amini@apple.com> llvm-svn: 241777
* Make TargetLowering::getShiftAmountTy() taking DataLayout as an argumentMehdi Amini2015-07-0924-141/+190
| | | | | | | | | | | | | | | | Summary: This change is part of a series of commits dedicated to have a single DataLayout during compilation by using always the one owned by the module. Reviewers: echristo Subscribers: jholewinski, llvm-commits, rafael, yaron.keren Differential Revision: http://reviews.llvm.org/D11037 From: Mehdi Amini <mehdi.amini@apple.com> llvm-svn: 241776
* Make TargetLowering::getPointerTy() taking DataLayout as an argumentMehdi Amini2015-07-0970-1301/+1539
| | | | | | | | | | | | | | | | Summary: This change is part of a series of commits dedicated to have a single DataLayout during compilation by using always the one owned by the module. Reviewers: echristo Subscribers: jholewinski, ted, yaron.keren, rafael, llvm-commits Differential Revision: http://reviews.llvm.org/D11028 From: Mehdi Amini <mehdi.amini@apple.com> llvm-svn: 241775
* Make TargetTransformInfo keeping a reference to the Module DataLayoutMehdi Amini2015-07-0916-129/+42
| | | | | | | | | | | | | | | | | | | | DataLayout is no longer optional. It was initialized with or without a DataLayout, and the DataLayout when supplied could have been the one from the TargetMachine. Summary: This change is part of a series of commits dedicated to have a single DataLayout during compilation by using always the one owned by the module. Reviewers: echristo Subscribers: jholewinski, llvm-commits, rafael, yaron.keren Differential Revision: http://reviews.llvm.org/D11021 From: Mehdi Amini <mehdi.amini@apple.com> llvm-svn: 241774
* Redirect DataLayout from TargetMachine to Module in ComputeValueVTs()Mehdi Amini2015-07-0914-101/+110
| | | | | | | | | | | | | | | | | | | | Summary: Avoid using the TargetMachine owned DataLayout and use the Module owned one instead. This requires passing the DataLayout up the stack to ComputeValueVTs(). This change is part of a series of commits dedicated to have a single DataLayout during compilation by using always the one owned by the module. Reviewers: echristo Subscribers: jholewinski, yaron.keren, rafael, llvm-commits Differential Revision: http://reviews.llvm.org/D11019 From: Mehdi Amini <mehdi.amini@apple.com> llvm-svn: 241773
* [CodeView] Add support for emitting column informationDavid Majnemer2015-07-092-10/+28
| | | | | | | | | | Column information is present in CodeView when the line table subsection has bit 0 set to 1 in it's flags field. The column information is represented as a pair of 16-bit quantities: a starting and ending column. This information is present at the end of the chunk, after all the line-PC pairs. llvm-svn: 241764
* [LAA] Fix misleading use of word 'consecutive'Adam Nemet2015-07-091-3/+3
| | | | | | | Fix some places where the word consecutive is used but the code really means constant-stride (i.e. not just unit stride). llvm-svn: 241763
* MIR Serialization: Serialize the 'undef' register machine operand flag.Alex Lorenz2015-07-084-2/+10
| | | | llvm-svn: 241762
* [SLPVectorizer] Try different vectorization factors for store chainsSanjay Patel2015-07-081-7/+37
| | | | | | | | | | | | | | | | ...and set max vector register size based on target This patch is based on discussion on the llvmdev mailing list: http://lists.cs.uiuc.edu/pipermail/llvmdev/2015-July/087405.html and also solves: https://llvm.org/bugs/show_bug.cgi?id=17170 Several FIXME/TODO items are noted in comments as potential improvements. Differential Revision: http://reviews.llvm.org/D10950 llvm-svn: 241760
* RegisterPressure: Add PressureDiff::dump()Matthias Braun2015-07-081-0/+12
| | | | | | | Also display the pressure diff in the case of a getMaxUpwardPressureDelta() verify failure. llvm-svn: 241759
* [LAA] Revert a small part of r239295Adam Nemet2015-07-081-6/+20
| | | | | | | | | | | | | | | | This commit ([LAA] Fix estimation of number of memchecks) regressed the logic a bit. We shouldn't quit the analysis if we encounter a pointer without known bounds *unless* we actually need to emit a memcheck for it. The original code was using NumComparisons which is now computed differently. Instead I compute NeedRTCheck from NumReadPtrChecks and NumWritePtrChecks. As side note, I find the separation of NeedRTCheck and CanDoRT confusing, so I will try to merge them in a follow-up patch. llvm-svn: 241756
* Run clang-format before making changes to StackMaps. NFC.Juergen Ributzka2015-07-081-39/+38
| | | | llvm-svn: 241754
* [x86] enable machine combiner reassociations for scalar single-precision ↵Sanjay Patel2015-07-081-2/+4
| | | | | | multiplies llvm-svn: 241752
* Don't reject an archive with just a symbol table.Rafael Espindola2015-07-081-1/+1
| | | | | | It is pretty unambiguous how to interpret it and gnu ar accepts it too. llvm-svn: 241750
* Disallow Archive::child_iterator that don't point to an archive.Rafael Espindola2015-07-082-3/+2
| | | | | | NFC, just less error prone. llvm-svn: 241747
* [LoopVectorizer] Rename BypassBlock to VectorPH, and CheckBlock to ↵Michael Zolotukhin2015-07-081-46/+46
| | | | | | NewVectorPH. NFCI. llvm-svn: 241742
* [LoopVectorizer] Restructurize code for emitting RT checks. NFCI.Michael Zolotukhin2015-07-081-18/+22
| | | | | | | | | | Place all code corresponding to a run-time check in one place. Previously we generated some code, then proceeded to a next check, then finished the code for the first check (like splitting blocks and generating branches). Now the code for generating a check is self-contained. llvm-svn: 241741
* [LoopVectorizer] Remove redundant variables PastOverflowCheck and ↵Michael Zolotukhin2015-07-081-11/+2
| | | | | | OverflowCheckAnchor. NFCI. llvm-svn: 241740
* [LoopVectorizer] Move some code around to ease further refactoring. NFCI.Michael Zolotukhin2015-07-081-16/+13
| | | | llvm-svn: 241739
* [LoopVectorizer] Remove redundant variable LastBypassBlock. NFC.Michael Zolotukhin2015-07-081-14/+12
| | | | llvm-svn: 241738
* MIR Parser: Remove redundant TODO comment. NFC.Alex Lorenz2015-07-081-2/+0
| | | | | | This TODO comment has been redundant since r240474. llvm-svn: 241737
* MIR Serialization: Serialize the 'killed' register machine operand flag.Alex Lorenz2015-07-084-4/+13
| | | | llvm-svn: 241734
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