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authorMehdi Amini <mehdi.amini@apple.com>2015-07-09 15:12:23 +0000
committerMehdi Amini <mehdi.amini@apple.com>2015-07-09 15:12:23 +0000
commiteaabc51e786b049b1c5172332e38958af0d7c72a (patch)
tree8ed08efeca3fe3c801fec13a3f4e29f598b0afa6 /llvm/lib
parentd1b818bcf414dea158df3a3ab33e0d62da0aa0d8 (diff)
downloadbcm5719-llvm-eaabc51e786b049b1c5172332e38958af0d7c72a.tar.gz
bcm5719-llvm-eaabc51e786b049b1c5172332e38958af0d7c72a.zip
Re-instate the EVT parameter to getScalarShiftAmountTy() for OOT user
A documentation for this function would be nice by the way. From: Mehdi Amini <mehdi.amini@apple.com> llvm-svn: 241807
Diffstat (limited to 'llvm/lib')
-rw-r--r--llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp3
-rw-r--r--llvm/lib/CodeGen/TargetLoweringBase.cpp5
-rw-r--r--llvm/lib/Target/AArch64/AArch64ISelLowering.cpp3
-rw-r--r--llvm/lib/Target/AArch64/AArch64ISelLowering.h2
-rw-r--r--llvm/lib/Target/AMDGPU/SIISelLowering.cpp2
-rw-r--r--llvm/lib/Target/AMDGPU/SIISelLowering.h2
-rw-r--r--llvm/lib/Target/MSP430/MSP430ISelLowering.h2
-rw-r--r--llvm/lib/Target/Mips/MipsISelLowering.h2
-rw-r--r--llvm/lib/Target/Mips/MipsSEISelLowering.cpp3
-rw-r--r--llvm/lib/Target/NVPTX/NVPTXISelLowering.h2
-rw-r--r--llvm/lib/Target/PowerPC/PPCISelLowering.h2
-rw-r--r--llvm/lib/Target/Sparc/SparcISelLowering.h2
-rw-r--r--llvm/lib/Target/SystemZ/SystemZISelLowering.h2
-rw-r--r--llvm/lib/Target/X86/X86ISelLowering.cpp4
-rw-r--r--llvm/lib/Target/X86/X86ISelLowering.h2
-rw-r--r--llvm/lib/Target/XCore/XCoreISelLowering.h2
16 files changed, 22 insertions, 18 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
index 673c46102db..86b73d35806 100644
--- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -444,7 +444,8 @@ namespace {
if (LHSTy.isVector())
return LHSTy;
auto &DL = DAG.getDataLayout();
- return LegalTypes ? TLI.getScalarShiftAmountTy(DL) : TLI.getPointerTy(DL);
+ return LegalTypes ? TLI.getScalarShiftAmountTy(DL, LHSTy)
+ : TLI.getPointerTy(DL);
}
/// This method returns true if we are running before type legalization or
diff --git a/llvm/lib/CodeGen/TargetLoweringBase.cpp b/llvm/lib/CodeGen/TargetLoweringBase.cpp
index 2c7ca99410f..ecfd6593157 100644
--- a/llvm/lib/CodeGen/TargetLoweringBase.cpp
+++ b/llvm/lib/CodeGen/TargetLoweringBase.cpp
@@ -878,7 +878,8 @@ void TargetLoweringBase::initActions() {
setOperationAction(ISD::DEBUGTRAP, MVT::Other, Expand);
}
-MVT TargetLoweringBase::getScalarShiftAmountTy(const DataLayout &DL) const {
+MVT TargetLoweringBase::getScalarShiftAmountTy(const DataLayout &DL,
+ EVT) const {
return MVT::getIntegerVT(8 * DL.getPointerSize(0));
}
@@ -887,7 +888,7 @@ EVT TargetLoweringBase::getShiftAmountTy(EVT LHSTy,
assert(LHSTy.isInteger() && "Shift amount is not an integer type!");
if (LHSTy.isVector())
return LHSTy;
- return getScalarShiftAmountTy(DL);
+ return getScalarShiftAmountTy(DL, LHSTy);
}
/// canOpTrap - Returns true if the operation can trap for the value type.
diff --git a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
index ea086929245..943424c646f 100644
--- a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+++ b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
@@ -775,7 +775,8 @@ void AArch64TargetLowering::computeKnownBitsForTargetNode(
}
}
-MVT AArch64TargetLowering::getScalarShiftAmountTy(const DataLayout &DL) const {
+MVT AArch64TargetLowering::getScalarShiftAmountTy(const DataLayout &DL,
+ EVT) const {
return MVT::i64;
}
diff --git a/llvm/lib/Target/AArch64/AArch64ISelLowering.h b/llvm/lib/Target/AArch64/AArch64ISelLowering.h
index 24fd2384bfc..c5c27b60546 100644
--- a/llvm/lib/Target/AArch64/AArch64ISelLowering.h
+++ b/llvm/lib/Target/AArch64/AArch64ISelLowering.h
@@ -233,7 +233,7 @@ public:
APInt &KnownOne, const SelectionDAG &DAG,
unsigned Depth = 0) const override;
- MVT getScalarShiftAmountTy(const DataLayout &DL) const override;
+ MVT getScalarShiftAmountTy(const DataLayout &DL, EVT) const override;
/// allowsMisalignedMemoryAccesses - Returns true if the target allows
/// unaligned memory accesses of the specified type.
diff --git a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
index 7bcf3f7bf24..40fcc6d049d 100644
--- a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+++ b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
@@ -704,7 +704,7 @@ EVT SITargetLowering::getSetCCResultType(const DataLayout &DL, LLVMContext &Ctx,
return EVT::getVectorVT(Ctx, MVT::i1, VT.getVectorNumElements());
}
-MVT SITargetLowering::getScalarShiftAmountTy(const DataLayout &) const {
+MVT SITargetLowering::getScalarShiftAmountTy(const DataLayout &, EVT) const {
return MVT::i32;
}
diff --git a/llvm/lib/Target/AMDGPU/SIISelLowering.h b/llvm/lib/Target/AMDGPU/SIISelLowering.h
index c15713cc7d1..635b4edc89d 100644
--- a/llvm/lib/Target/AMDGPU/SIISelLowering.h
+++ b/llvm/lib/Target/AMDGPU/SIISelLowering.h
@@ -92,7 +92,7 @@ public:
bool enableAggressiveFMAFusion(EVT VT) const override;
EVT getSetCCResultType(const DataLayout &DL, LLVMContext &Context,
EVT VT) const override;
- MVT getScalarShiftAmountTy(const DataLayout &) const override;
+ MVT getScalarShiftAmountTy(const DataLayout &, EVT) const override;
bool isFMAFasterThanFMulAndFAdd(EVT VT) const override;
SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override;
SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const override;
diff --git a/llvm/lib/Target/MSP430/MSP430ISelLowering.h b/llvm/lib/Target/MSP430/MSP430ISelLowering.h
index 63abbacc9b2..2d63852c185 100644
--- a/llvm/lib/Target/MSP430/MSP430ISelLowering.h
+++ b/llvm/lib/Target/MSP430/MSP430ISelLowering.h
@@ -72,7 +72,7 @@ namespace llvm {
explicit MSP430TargetLowering(const TargetMachine &TM,
const MSP430Subtarget &STI);
- MVT getScalarShiftAmountTy(const DataLayout &) const override {
+ MVT getScalarShiftAmountTy(const DataLayout &, EVT) const override {
return MVT::i8;
}
diff --git a/llvm/lib/Target/Mips/MipsISelLowering.h b/llvm/lib/Target/Mips/MipsISelLowering.h
index f4392ca8a3e..a31f6319fda 100644
--- a/llvm/lib/Target/Mips/MipsISelLowering.h
+++ b/llvm/lib/Target/Mips/MipsISelLowering.h
@@ -227,7 +227,7 @@ namespace llvm {
FastISel *createFastISel(FunctionLoweringInfo &funcInfo,
const TargetLibraryInfo *libInfo) const override;
- MVT getScalarShiftAmountTy(const DataLayout &) const override {
+ MVT getScalarShiftAmountTy(const DataLayout &, EVT) const override {
return MVT::i32;
}
diff --git a/llvm/lib/Target/Mips/MipsSEISelLowering.cpp b/llvm/lib/Target/Mips/MipsSEISelLowering.cpp
index 1d950d4ff46..b319fd07884 100644
--- a/llvm/lib/Target/Mips/MipsSEISelLowering.cpp
+++ b/llvm/lib/Target/Mips/MipsSEISelLowering.cpp
@@ -839,7 +839,8 @@ static SDValue performMULCombine(SDNode *N, SelectionDAG &DAG,
if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(N->getOperand(1)))
if (!VT.isVector())
return genConstMult(N->getOperand(0), C->getZExtValue(), SDLoc(N), VT,
- TL->getScalarShiftAmountTy(DAG.getDataLayout()), DAG);
+ TL->getScalarShiftAmountTy(DAG.getDataLayout(), VT),
+ DAG);
return SDValue(N, 0);
}
diff --git a/llvm/lib/Target/NVPTX/NVPTXISelLowering.h b/llvm/lib/Target/NVPTX/NVPTXISelLowering.h
index 4d02bf74593..e5c37321a33 100644
--- a/llvm/lib/Target/NVPTX/NVPTXISelLowering.h
+++ b/llvm/lib/Target/NVPTX/NVPTXISelLowering.h
@@ -500,7 +500,7 @@ public:
const NVPTXTargetMachine *nvTM;
// PTX always uses 32-bit shift amounts
- MVT getScalarShiftAmountTy(const DataLayout &) const override {
+ MVT getScalarShiftAmountTy(const DataLayout &, EVT) const override {
return MVT::i32;
}
diff --git a/llvm/lib/Target/PowerPC/PPCISelLowering.h b/llvm/lib/Target/PowerPC/PPCISelLowering.h
index 55beb123276..6bf5e771c73 100644
--- a/llvm/lib/Target/PowerPC/PPCISelLowering.h
+++ b/llvm/lib/Target/PowerPC/PPCISelLowering.h
@@ -423,7 +423,7 @@ namespace llvm {
/// DAG node.
const char *getTargetNodeName(unsigned Opcode) const override;
- MVT getScalarShiftAmountTy(const DataLayout &) const override {
+ MVT getScalarShiftAmountTy(const DataLayout &, EVT) const override {
return MVT::i32;
}
diff --git a/llvm/lib/Target/Sparc/SparcISelLowering.h b/llvm/lib/Target/Sparc/SparcISelLowering.h
index 4a8013d09f5..bbc91a493c9 100644
--- a/llvm/lib/Target/Sparc/SparcISelLowering.h
+++ b/llvm/lib/Target/Sparc/SparcISelLowering.h
@@ -85,7 +85,7 @@ namespace llvm {
StringRef Constraint, MVT VT) const override;
bool isOffsetFoldingLegal(const GlobalAddressSDNode *GA) const override;
- MVT getScalarShiftAmountTy(const DataLayout &) const override {
+ MVT getScalarShiftAmountTy(const DataLayout &, EVT) const override {
return MVT::i32;
}
diff --git a/llvm/lib/Target/SystemZ/SystemZISelLowering.h b/llvm/lib/Target/SystemZ/SystemZISelLowering.h
index db958f4e78a..949b67f114e 100644
--- a/llvm/lib/Target/SystemZ/SystemZISelLowering.h
+++ b/llvm/lib/Target/SystemZ/SystemZISelLowering.h
@@ -339,7 +339,7 @@ public:
const SystemZSubtarget &STI);
// Override TargetLowering.
- MVT getScalarShiftAmountTy(const DataLayout &) const override {
+ MVT getScalarShiftAmountTy(const DataLayout &, EVT) const override {
return MVT::i32;
}
MVT getVectorIdxTy(const DataLayout &DL) const override {
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index 559056d6b2f..7360d90ef3f 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -4852,7 +4852,7 @@ static SDValue getVShift(bool isLeft, EVT VT, SDValue SrcOp,
MVT ShVT = MVT::v2i64;
unsigned Opc = isLeft ? X86ISD::VSHLDQ : X86ISD::VSRLDQ;
SrcOp = DAG.getBitcast(ShVT, SrcOp);
- MVT ScalarShiftTy = TLI.getScalarShiftAmountTy(DAG.getDataLayout());
+ MVT ScalarShiftTy = TLI.getScalarShiftAmountTy(DAG.getDataLayout(), VT);
assert(NumBits % 8 == 0 && "Only support byte sized shifts");
SDValue ShiftVal = DAG.getConstant(NumBits/8, dl, ScalarShiftTy);
return DAG.getBitcast(VT, DAG.getNode(Opc, dl, ShVT, SrcOp, ShiftVal));
@@ -7409,7 +7409,7 @@ static SDValue lowerVectorShuffleAsElementInsertion(
X86ISD::VSHLDQ, DL, MVT::v2i64, V2,
DAG.getConstant(V2Index * EltVT.getSizeInBits() / 8, DL,
DAG.getTargetLoweringInfo().getScalarShiftAmountTy(
- DAG.getDataLayout())));
+ DAG.getDataLayout(), VT)));
V2 = DAG.getBitcast(VT, V2);
}
}
diff --git a/llvm/lib/Target/X86/X86ISelLowering.h b/llvm/lib/Target/X86/X86ISelLowering.h
index a2cef18af9c..8bb8aa6cfdb 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.h
+++ b/llvm/lib/Target/X86/X86ISelLowering.h
@@ -598,7 +598,7 @@ namespace llvm {
unsigned getJumpTableEncoding() const override;
bool useSoftFloat() const override;
- MVT getScalarShiftAmountTy(const DataLayout &) const override {
+ MVT getScalarShiftAmountTy(const DataLayout &, EVT) const override {
return MVT::i8;
}
diff --git a/llvm/lib/Target/XCore/XCoreISelLowering.h b/llvm/lib/Target/XCore/XCoreISelLowering.h
index f7ddd692845..ddd675c5164 100644
--- a/llvm/lib/Target/XCore/XCoreISelLowering.h
+++ b/llvm/lib/Target/XCore/XCoreISelLowering.h
@@ -101,7 +101,7 @@ namespace llvm {
unsigned getJumpTableEncoding() const override;
- MVT getScalarShiftAmountTy(const DataLayout &DL) const override {
+ MVT getScalarShiftAmountTy(const DataLayout &DL, EVT) const override {
return MVT::i32;
}
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