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* [ASan] Change fake stack and local variables handling.Alexey Samsonov2014-12-111-44/+104
| | | | | | | | | | | | | | | | | | | | | | | | | This commit changes the way we get fake stack from ASan runtime (to find use-after-return errors) and the way we represent local variables: - __asan_stack_malloc function now returns pointer to newly allocated fake stack frame, or NULL if frame cannot be allocated. It doesn't take pointer to real stack as an input argument, it is calculated inside the runtime. - __asan_stack_free function doesn't take pointer to real stack as an input argument. Now this function is never called if fake stack frame wasn't allocated. - __asan_init version is bumped to reflect changes in the ABI. - new flag "-asan-stack-dynamic-alloca" allows to store all the function local variables in a dynamic alloca, instead of the static one. It reduces the stack space usage in use-after-return mode (dynamic alloca will not be called if the local variables are stored in a fake stack), and improves the debug info quality for local variables (they will not be described relatively to %rbp/%rsp, which are assumed to be clobbered by function calls). This flag is turned off by default for now, but I plan to turn it on after more testing. llvm-svn: 224062
* CodeGen: Stop using LeakDetector for MachineInstrDuncan P. N. Exon Smith2014-12-111-4/+0
| | | | | | | | | | | | Since `MachineInstr` is required to have a trivial destructor, it cannot remove itself from `LeakDetection`. Remove the calls. As it happens, this requirement is because `MachineFunction` allocates all `MachineInstr`s in a custom allocator; when the `MachineFunction` is destroyed they're dropped of the edge. There's no benefit to detecting leaks. llvm-svn: 224061
* IR: Store MDNodes in a separate LeakDetector containerDuncan P. N. Exon Smith2014-12-112-1/+19
| | | | | | | | | | | | | | | | This gives us better leak detection messages, like `Value` has. This also has the side effect of papering over a problem where `MachineInstr`s are added as garbage to the leak detector and then deleted without being removed. If `MDNode::getTemporary()` allocates an `MDNodeFwdDecl` in the same spot, the leak detector asserts. By separating `MDNode`s into their own container we lose that assertion. Since `MachineInstr` is required to have a trivial destructor, its usage of `LeakDetector` at all is pretty suspect. I'll be sending a patch soon to strip that out. llvm-svn: 224060
* [CodeGen] Add print and verify pass after each MachineFunctionPass by defaultMatthias Braun2014-12-1113-232/+175
| | | | | | | | | | | | | | | | | | | Previously print+verify passes were added in a very unsystematic way, which is annoying when debugging as you miss intermediate steps and allows bugs to stay unnotice when no verification is performed. To make this change practical I added the possibility to explicitely disable verification. I used this option on all places where no verification was performed previously (because alot of places actually don't pass the MachineVerifier). In the long term these problems should be fixed properly and verification enabled after each pass. I'll enable some more verification in subsequent commits. This is the 2nd attempt at this after realizing that PassManager::add() may actually delete the pass. llvm-svn: 224059
* AsmParser: Don't crash on an ill-formed MDNodeVectorDavid Majnemer2014-12-111-2/+2
| | | | llvm-svn: 224056
* [InstCombine][X86] Improved folding of calls to Intrinsic::x86_sse4a_insertqi.Andrea Di Biagio2014-12-111-1/+16
| | | | | | | | | | | | | | | | | | This patch teaches the instruction combiner how to fold a call to 'insertqi' if the 'length field' (3rd operand) is set to zero, and if the sum between field 'length' and 'bit index' (4th operand) is bigger than 64. From the AMD64 Architecture Programmer's Manual: 1. If the sum of the bit index + length field is greater than 64, then the results are undefined; 2. A value of zero in the field length is defined as a length of 64. This patch improves the existing combining logic for intrinsic 'insertqi' adding extra checks to address both point 1. and point 2. Differential Revision: http://reviews.llvm.org/D6583 llvm-svn: 224054
* AsmParser: Don't crash on an ill-formed MDNodeVectorDavid Majnemer2014-12-111-2/+2
| | | | llvm-svn: 224053
* Remove a convoluted way of calling close by moving the call to the only caller.Rafael Espindola2014-12-114-87/+24
| | | | | | As a bonus we can actually check the return value. llvm-svn: 224046
* This reverts commit r224043 and r224042.Rafael Espindola2014-12-1113-152/+212
| | | | | | check-llvm was failing. llvm-svn: 224045
* Silence static analyzer warnings in LLVMSupport.Michael Ilseman2014-12-112-0/+4
| | | | | | | The static analyzer catches a few potential bugs in LLVMSupport. Add in asserts to silence the warnings. llvm-svn: 224044
* Enable machineverifier in debug mode for X86, ARM, AArch64, MipsMatthias Braun2014-12-114-20/+20
| | | | llvm-svn: 224043
* [CodeGen] Add print and verify pass after each MachineFunctionPass by defaultMatthias Braun2014-12-1113-232/+172
| | | | | | | | | | | | | | | | Previously print+verify passes were added in a very unsystematic way, which is annoying when debugging as you miss intermediate steps and allows bugs to stay unnotice when no verification is performed. To make this change practical I added the possibility to explicitely disable verification. I used this option on all places where no verification was performed previously (because alot of places actually don't pass the MachineVerifier). In the long term these problems should be fixed properly and verification enabled after each pass. I'll enable some more verification in subsequent commits. llvm-svn: 224042
* [CodeGen] Let MachineVerifierPass own its banner stringMatthias Braun2014-12-111-5/+5
| | | | llvm-svn: 224041
* [Hexagon] Renaming classes in preparation for replacement.Colin LeMahieu2014-12-111-13/+13
| | | | llvm-svn: 224036
* ARM: convert isTargetIOS checks to isTargetDarwin.Tim Northover2014-12-114-12/+8
| | | | | | | | | | | The distinction is mostly useful in the front-end. By the time we get here, there are very few situations where we actually want different behaviour for Darwin and IOS (in fact Darwin mostly just exists in a few tests). So this should reduce any surprising weirdness for anyone using it. No functional change on anything anyone actually cares about. llvm-svn: 224035
* [PowerPC] Implement BuildSDIVPow2, lower i64 pow2 sdiv using sradiHal Finkel2014-12-113-30/+58
| | | | | | | | | | | | | | | | PPCISelDAGToDAG contained existing code to lower i32 sdiv by a power-of-2 using srawi/addze, but did not implement the i64 case. DAGCombine now contains a callback specifically designed for this purpose (BuildSDIVPow2), and part of the logic has been moved to an implementation of that callback. Doing this lowering using BuildSDIVPow2 likely does not matter, compared to handling everything in PPCISelDAGToDAG, for the positive divisor case, but the negative divisor case, which generates an additional negation, can potentially benefit from additional folding from DAGCombine. Now, both the i32 and the i64 cases have been implemented. Fixes PR20732. llvm-svn: 224033
* Remove dead code. NFC.Rafael Espindola2014-12-112-81/+0
| | | | llvm-svn: 224029
* [AVX512] Add support for 512b variable bit shift intrinsics.Cameron McInally2014-12-113-39/+43
| | | | llvm-svn: 224028
* [Hexagon] Ading i64 <- i32, i32 sextw pattern.Colin LeMahieu2014-12-111-0/+2
| | | | llvm-svn: 224027
* [Hexagon] Adding encoding information for sign extend word instruction.Colin LeMahieu2014-12-114-27/+48
| | | | llvm-svn: 224026
* AVX-512: Added all forms of COMPRESS instructionElena Demikhovsky2014-12-115-6/+160
| | | | | | + intrinsics + tests llvm-svn: 224019
* [mips][microMIPS] Implement CodeGen support for LI16 instruction.Jozef Kolek2014-12-112-4/+12
| | | | | | Differential Revision: http://reviews.llvm.org/D5840 llvm-svn: 224017
* The inliner needs to fix up debug information for llvm.dbg.declare, not only ↵Michael Kuperstein2014-12-111-0/+6
| | | | | | | | | | for llvm.dbg.value. Patch by Amjad Aboud Differential Revision: http://reviews.llvm.org/D6525 llvm-svn: 224015
* [X86] When converting movs to pushes, don't assume MOVmi operand is an ↵Michael Kuperstein2014-12-111-11/+11
| | | | | | | | actual immediate This should fix PR21878. llvm-svn: 224010
* Bugfix in InlineSpiller::traceSiblingValue().Patrik Hagglund2014-12-111-3/+6
| | | | | | | | | | Properly determine whether or not a phi was added by splitting. Check against the current VNInfo of OrigLI instead of against the OrigVNI argument. Patch provided by Jonas Paulsson. Reviewed by Quentin Colombet. llvm-svn: 224009
* AVX-512: Fixed a bug in lowering setcc for MVT::i1 typeElena Demikhovsky2014-12-111-1/+4
| | | | llvm-svn: 224008
* test commit (spelling correction)Kumar Sukhani2014-12-111-1/+1
| | | | llvm-svn: 224007
* Refactor creation of overflow result tuples in InstCombineCalls.Erik Eckstein2014-12-112-57/+30
| | | | | | Extract the creation of overflow result tuples in a separate function. NFC. llvm-svn: 224006
* Use range-based for loops. NFCCraig Topper2014-12-111-5/+2
| | | | llvm-svn: 224005
* Reverting commit 223981, because the test that I added ↵Ekaterina Romanova2014-12-111-2/+0
| | | | | | | | (incorrect-variable-debugloc1.ll) failed for llvm-ppc64. The test is failing for llvm-ppc64 because for this platform the location list is not being generated at all (most likely because of the bug in PPC code optimization or generation). I will file a bug agains PPC compiler, but meanwhile, until PPC bug is fixed, I will have to revert my change. llvm-svn: 224000
* Make MultiClass::DefPrototypes own their Records to fix memory leaks.Craig Topper2014-12-111-13/+8
| | | | llvm-svn: 223998
* Replace std::map<K, V*> with std::map<K, std::unique_ptr<V>> to handle ↵Craig Topper2014-12-112-6/+9
| | | | | | | | ownership and deletion of the values. Ideally we would store the MultiClasses by value directly in the maps, but I had some trouble with that before and this at least fixes the leak. llvm-svn: 223997
* [X86] Add back AVX2 VR256 PMOVX patterns.Ahmed Bougacha2014-12-111-0/+16
| | | | | | | | | We can't reach those from zext, but other parts of the backend (the shuffle lowering) generate 256-bit VZEXT nodes. Fixes PR21876. llvm-svn: 223996
* Fix LLVMContext to match what MDKind names that the LL parser permits. Fixes ↵Nick Lewycky2014-12-111-20/+2
| | | | | | PR21799! llvm-svn: 223995
* GCStrategy should not own GCFunctionInfoPhilip Reames2014-12-116-30/+33
| | | | | | | | | | | | This change moves the ownership and access of GCFunctionInfo (the object which describes the safepoints associated with a safepoint under GCRoot) to GCModuleInfo. Previously, this was owned by GCStrategy which was in turned owned by GCModuleInfo. This made GCStrategy module specific which is 'surprising' given it's name and other purposes. There's a few more changes needed, but we're getting towards the point we can reuse GCStrategy for gc.statepoint as well. p.s. The style of this code ends up being a mess. I was trying to move code around without otherwise changing much. Once I get the ownership structure rearranged, I will go through and fixup spacing, naming, comments etc. Differential Revision: http://reviews.llvm.org/D6587 llvm-svn: 223994
* LiveInterval: Use range based for loops for subregister ranges.Matthias Braun2014-12-118-126/+102
| | | | llvm-svn: 223991
* ARM: correctly expand LDR-lit based globals.Tim Northover2014-12-102-1/+2
| | | | | | | | Quite a major error here: the expansions for the Pseudos with and without folded load were mixed up. Fortunately it only affects ARM-mode, when not using movw/movt, on Darwin. I'm guessing no-one actually uses that combination. llvm-svn: 223986
* A fix for PR21176.Ekaterina Romanova2014-12-101-0/+2
| | | | | | | | | | | | | | DW_OP_const <const> doesn't describe a constant value, but a value at a constant address. The proper way to describe a constant value is DW_OP_constu <const>, DW_OP_stack_value. Added DW_OP_stack_value to the stack. -This line, and those below, will be ignored-- M lib/CodeGen/AsmPrinter/DwarfDebug.cpp A test/DebugInfo/incorrect-variable-debugloc1.ll llvm-svn: 223981
* LiveInterval: Use more range based for loops for value numbers and segments.Matthias Braun2014-12-107-81/+60
| | | | llvm-svn: 223978
* Fix PR21694. r219517 added a use of SCEV divide in HowFarToZero computation. ↵Mark Heffernan2014-12-101-10/+8
| | | | | | This divide can produce incorrect results as we are using an unsigned divide for what should be a modular divide. This change reverts back to a more conservative computation using trailing zeros. llvm-svn: 223974
* [Hexagon] Adding combine ri/ir instructions.Colin LeMahieu2014-12-101-0/+26
| | | | llvm-svn: 223971
* ConstantFold: Clean up X * undef codeDavid Majnemer2014-12-101-6/+8
| | | | | | No functional change intended. llvm-svn: 223970
* ConstantFold, InstSimplify: undef >>a x can be either -1 or 0, choose 0David Majnemer2014-12-102-4/+5
| | | | | | Zero is usually a nicer constant to have than -1. llvm-svn: 223969
* ConstantFold: an undef shift amount results in undefDavid Majnemer2014-12-101-13/+14
| | | | | | | X shifted by undef results in undef because the undef value can represent values greater than the width of the operands. llvm-svn: 223968
* [Hexagon] Adding encodings for JR class instructions. Updating complier usages.Colin LeMahieu2014-12-109-185/+168
| | | | llvm-svn: 223967
* Move three methods only used by MCJIT to MCJIT.Rafael Espindola2014-12-103-55/+40
| | | | | | | | These methods are only used by MCJIT and are very specific to it. In fact, they are also fairly specific to the fact that we have a dynamic linker of relocatable objects. llvm-svn: 223964
* [AArch64] MachO large code-model: Materialize FP constants in code.Juergen Ributzka2014-12-103-0/+43
| | | | | | | | | | | | | | | In the large code model we have to first get the address of the GOT entry, load the address of the constant, and then load the constant itself. To avoid these loads and the GOT entry alltogether this commit changes the way how FP constants are materialized in the large code model. The constats are now materialized in a GPR and then bitconverted/moved into the FPR. Reviewed by Tim Northover Fixes rdar://problem/16572564. llvm-svn: 223941
* R600/SI: Use getTargetConstant in AdjustRegClassMarek Olsak2014-12-101-2/+2
| | | | llvm-svn: 223940
* [Hexagon] Adding JR class predicated call reg instructions.Colin LeMahieu2014-12-102-0/+36
| | | | llvm-svn: 223933
* Match new shuffle codegen for MOVHPD patternsSanjay Patel2014-12-101-0/+14
| | | | | | | | | | | | Add patterns to match SSE (shufpd) and AVX (vpermilpd) shuffle codegen when storing the high element of a v2f64. The existing patterns were only checking for an unpckh type of shuffle. http://llvm.org/bugs/show_bug.cgi?id=21791 Differential Revision: http://reviews.llvm.org/D6586 llvm-svn: 223929
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