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* SLP Vectorizer: Canonicalize tree operands of commutitive binary operands.Chad Rosier2014-07-301-12/+32
| | | | llvm-svn: 214338
* SimplifyCFG: Avoid miscompilations due to removed lifetime intrinsics.Rafael Espindola2014-07-301-1/+1
| | | | | | | | | | | The lifetime intrinsics need some work in order to make it clear which optimizations are or are not valid. For now dropping this optimization avoids a miscompilation. Patch by Björn Steinbrink. llvm-svn: 214336
* Add BookE's tlbre, tlbwe and tlbivax instructions.Joerg Sonnenberger2014-07-301-0/+15
| | | | llvm-svn: 214332
* Refactor duplicated code.Rafael Espindola2014-07-303-47/+31
| | | | llvm-svn: 214328
* Fixing a few -Woverloaded-virtual warnings by exposing the hidden virtual ↵Aaron Ballman2014-07-302-0/+4
| | | | | | function as well. No functional changes intended. llvm-svn: 214325
* Retain alignment requirements for load->selects modified by DAGCombineLouis Gerbarg2014-07-301-2/+6
| | | | | | | | | | | | | | | | | DAGCombine may choose to rewrite graphs where two loads feed a select into graphs where a select of two addresses feed a load. While it sanity checks the loads to make sure they are broadly equivalent it currently just uses the alignment restriction of the left node. In cases where the right node has stronger alignment requiresment this may lead to bad codegen, such as generating an aligned load where an unaligned load is required. This patch makes the combine generate a load with an alignment that is the same as whichever is more restrictive of the two alignments. Tests included. rdar://17762530 llvm-svn: 214322
* UseListOrder: Visit global valuesDuncan P. N. Exon Smith2014-07-301-4/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When predicting use-list order, we visit functions in reverse order followed by `GlobalValue`s and write out use-lists at the first opportunity. In the reader, this will translate to *after* the last use has been added. For this to work, we actually need to descend into `GlobalValue`s. Added a targeted test in `use-list-order.ll` and `RUN` lines to the newly passing tests in `test/Bitcode`. There are two remaining failures in `test/Bitcode`: - blockaddress.ll: I haven't thought through how to model the way block addresses change the order of use-lists (or how to work around it). - metadata-2.ll: There's an old-style `@llvm.used` global array here that I suspect the .ll parser isn't upgrading properly. When it round-trips through bitcode, the .bc reader *does* upgrade it, so the extra variable (`i8* null`) has an extra use, and the shuffle vector doesn't match. I think the fix is to upgrade old-style global arrays (or reject them?) in the .ll parser. This is part of PR5680. llvm-svn: 214321
* Add the missing hasLinkOnceODRLinkage predicate.Rafael Espindola2014-07-303-7/+3
| | | | llvm-svn: 214312
* Add BookE's wrtee and wrteei instructions.Joerg Sonnenberger2014-07-301-0/+13
| | | | llvm-svn: 214297
* SPRG 0 to 3 are valid outside BookE, so move them to the normal testJoerg Sonnenberger2014-07-302-0/+20
| | | | | | file. Add support for accessing SPRG 4 to 7 on BookE. llvm-svn: 214295
* Don't manually (and forcibly) run the verifier on the entire module fromChandler Carruth2014-07-301-4/+0
| | | | | | | | | | | | | the jump instruction table pass. First, the verifier is already built into all the tools. The test case is adapted to just run llvm-as demonstrating that we still catch the broken module. Second, the verifier is *extremely* slow. This was responsible for very significant compile time regressions. If you have deployed a Clang binary anywhere from r210280 to this commit, you really want to re-deploy. llvm-svn: 214287
* [MCJIT] Fix the ARM BR24 relocation in RuntimeDyldMachO.Lang Hames2014-07-306-12/+31
| | | | | | | | | | We now (1) correctly decode the branch immediate, (2) modify the immediate to corretly treat it as PC-rel, and (3) properly populate the stub entry. Previously we had been doing each of these wrong. <rdar://problem/17750739> llvm-svn: 214285
* R600/SI: Remove redundant setting of bits on instructions.Matt Arsenault2014-07-301-13/+2
| | | | | | | | neverHasSideEffects is deprecated, and hasSideEffects = 0 is already set on the base classes of the basic ALU instruction classes. The base classes also already set mayLoad = 0 and mayStore = 0 llvm-svn: 214283
* Reapply "UseListOrder: Order GlobalValue uses after initializers"Duncan P. N. Exon Smith2014-07-301-14/+55
| | | | | | | This reverts commit r214249, reapplying r214242 and r214243, now that r214270 has fixed the UB. llvm-svn: 214271
* UseListOrder: Fix undefined behaviourDuncan P. N. Exon Smith2014-07-301-2/+7
| | | | | | | | | | | | | | | | | | | | | | | | | This commit fixes undefined behaviour that caused the revert in r214249. The problem was two unsequenced operations on a `DenseMap<>`, giving different behaviour in GCC and Clang. This: DenseMap<T*, unsigned> DM; for (auto &X : ...) DM[&X] = DM.size() + 1; should have been: DenseMap<T*, unsigned> DM; for (auto &X : ...) { unsigned Size = DM.size(); DM[&X] = Size + 1; } Until r214242, this difference between compilers didn't matter. In r214242, `OrderMap::LastGlobalValueID` was introduced and compared against IDs, which in GCC were off-by-one my expectations. llvm-svn: 214270
* R600/SI: Consider adjacent offsets in getLdStBaseRegImmOfsMatt Arsenault2014-07-301-13/+39
| | | | | | | | | We can treat ds_read2_* as a single offset if the offsets are adjacent. No test since emission of read2 instructions for partially aligned loads isn't implemented yet. llvm-svn: 214269
* Add support for scalarizing ctlz_zero_undefPetar Jovanovic2014-07-301-0/+1
| | | | | | | | | Fix the missing case in ScalarizeVectorResult() that was exposed with libclcore.bc in Android. Differential Revision: http://reviews.llvm.org/D4645 llvm-svn: 214266
* Header hygiene: remove using directive and #undef DEBUG_TYPE once we're done.Richard Smith2014-07-301-0/+2
| | | | llvm-svn: 214263
* Add rfci instruction.Joerg Sonnenberger2014-07-291-1/+4
| | | | llvm-svn: 214256
* [MCJIT] Add options to llvm-rtdyld to describe a phony target address space forLang Hames2014-07-291-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | use in -verify mode. This patch adds three hidden command line options to llvm-rtdyld: -target-addr-start <start-addr> : Specify the start of the virtual address space on the phony target. -target-addr-end <end-addr> : Specify the end of the virtual address space on the phony target. -target-section-sep <sep> : Specify the separation (in bytes) between the end of one section and the start of the next. These options automatically default to sane values for the target platform. In particular, they allow narrow (e.g. 32-bit, 16-bit) targets to be tested from wider (e.g. 64-bit, 32-bit) hosts without overflowing pointers. The section separation option defaults to zero, but can be set to a large number (e.g. 1 << 32) to force large separations between sections in order to stress-test large-code-model code. llvm-svn: 214255
* mbar without argument is equivalent to mbar 0.Joerg Sonnenberger2014-07-291-0/+2
| | | | llvm-svn: 214250
* Revert "UseListOrder: Order GlobalValue uses after initializers"Duncan P. N. Exon Smith2014-07-291-55/+14
| | | | | | | | | | | | This reverts commits r214242 and r214243 while I investigate buildbot failures [1][2][3]. I can't reproduce these failures locally, so if anyone can see what I've done wrong, I'd appreciate a note. [1]: http://lab.llvm.org:8011/builders/llvm-hexagon-elf/builds/9840 [2]: http://lab.llvm.org:8011/builders/clang-hexagon-elf/builds/14981 [3]: http://bb.pgr.jp/builders/cmake-llvm-x86_64-linux/builds/15191 llvm-svn: 214249
* Recognize BookE's mbar instruction.Joerg Sonnenberger2014-07-292-0/+12
| | | | llvm-svn: 214244
* UseListOrder: Order GlobalValue uses after initializersDuncan P. N. Exon Smith2014-07-291-14/+55
| | | | | | | | | | | | To avoid unnecessary forward references, the reader doesn't process initializers of `GlobalValue`s until after the constant pool has been processed, and then in reverse order. Model this when predicting use-list order. This gets two more Bitcode tests passing with `llvm-uselistorder`. Part of PR5680. llvm-svn: 214242
* UseListOrder: Create a struct around OrderMap, NFCDuncan P. N. Exon Smith2014-07-291-1/+9
| | | | llvm-svn: 214241
* Feedback on r214189, no functionality change.Manman Ren2014-07-293-3/+3
| | | | llvm-svn: 214240
* Fix typo in alias: DSIR -> DSISRJoerg Sonnenberger2014-07-291-2/+2
| | | | llvm-svn: 214238
* llvm-profdata: Clean up and reorganize some testsJustin Bogner2014-07-291-2/+2
| | | | | | | | This moves some tests around to make it clearer what's being tested, and adds very rudimentary comment syntax to the text input format to make specifying this kind of test a little bit simpler. llvm-svn: 214235
* Support move to/from segment register.Joerg Sonnenberger2014-07-295-0/+52
| | | | llvm-svn: 214234
* Coverage: improve efficiency of the counter propagation to the expansion ↵Alex Lorenz2014-07-291-8/+12
| | | | | | | | | regions. This patch reduces the complexity of the two inner loops in order to speed up the loading of coverage data for very large functions. llvm-svn: 214228
* [MCJIT] Make sure we print the full 64-bit result of exprs in ↵Lang Hames2014-07-291-2/+2
| | | | | | RuntimeDyldChecker. llvm-svn: 214227
* R600/SI: Implement getLdStBaseRegImmOfsMatt Arsenault2014-07-292-0/+62
| | | | llvm-svn: 214225
* Have a single enum for "not a bitcode" error.Rafael Espindola2014-07-291-9/+3
| | | | | | | This is more convenient for callers. No functionality change, this will be used in a next patch to the gold plugin. llvm-svn: 214218
* R600/SI: Enable named operand table for DS instructionsMatt Arsenault2014-07-291-0/+1
| | | | llvm-svn: 214217
* Remove line with no effectMatt Arsenault2014-07-291-1/+0
| | | | llvm-svn: 214216
* [MCJIT] Make the RuntimeDyldChecker stub_addr builtin use file names rather thanLang Hames2014-07-292-2/+4
| | | | | | | | | | full paths for its first argument. This allows us to remove the annoying sed lines in the test cases, and write direct references to file names in stub_addr calls (rather than <filename> placeholders). llvm-svn: 214211
* Move the bitcode error enum to the include directory.Rafael Espindola2014-07-292-276/+248
| | | | | | | | This will let users in other libraries know which error occurred. In particular, it will be possible to check if the parsing failed or if the file is not bitcode. llvm-svn: 214209
* Coverage: fix the missing output stream in recursive call to ↵Alex Lorenz2014-07-291-2/+2
| | | | | | CoverageMappingContext::dump llvm-svn: 214206
* [RuntimeDyld][AArch64] Make encode/decodeAddend also work on big-endian hosts.Juergen Ributzka2014-07-291-18/+31
| | | | llvm-svn: 214205
* [RuntimeDyld][AArch64] Make encode/decodeAddend more typesafe by using the ↵Juergen Ributzka2014-07-293-9/+12
| | | | | | relocation enum type. NFCI. llvm-svn: 214204
* Add a number of aliases for SPR access.Joerg Sonnenberger2014-07-291-0/+27
| | | | llvm-svn: 214196
* R600/SI: Add isMUBUF / isMTBUFMatt Arsenault2014-07-294-1/+21
| | | | | | Also add missing comments about how the flags work. llvm-svn: 214195
* R600/SI: Set bits on SMRD instructionsMatt Arsenault2014-07-291-0/+3
| | | | | | Set mayStore = 0 and enable named operand table. llvm-svn: 214194
* [Debug Info] remove DITrivialType and use null to represent unspecified param.Manman Ren2014-07-294-31/+12
| | | | | | | | | | | | Per feedback on r214111, we are going to use null to represent unspecified parameter. If the type array is {null}, it means a function that returns void; If the type array is {null, null}, it means a variadic function that returns void. In summary if we have more than one element in the type array and the last element is null, it is a variadic function. rdar://17628609 llvm-svn: 214189
* IR: Create the use-list order shuffle vector in-placeDuncan P. N. Exon Smith2014-07-291-4/+3
| | | | | | | Per David Blaikie's review of r214135, this is a more natural way to initialize. llvm-svn: 214184
* Add rfi instruction. Based on feedback by Ulrich Weigand.Joerg Sonnenberger2014-07-291-0/+2
| | | | llvm-svn: 214181
* [mips] Don't use odd-numbered single precision registers for fastcc callingSasa Stankovic2014-07-292-2/+8
| | | | | | | | convention if -mno-odd-spreg is used. Differential Revision: http://reviews.llvm.org/D4682 llvm-svn: 214180
* CodeGenPrep: fall back to MVT::Other if instruction's type isn't an EVT.Tim Northover2014-07-291-3/+6
| | | | | | | | | The test being performed is just an approximation anyway, so it really shouldn't crash when things don't go entirely as expected. Should fix PR20474. llvm-svn: 214177
* ARM: add __aeabi_d2h for truncation on AEABI systemsTim Northover2014-07-291-0/+1
| | | | | | | ARM does actually define the name for this conversion, so we should use it on "-eabi" platforms. llvm-svn: 214176
* ARM: fix @llvm.convert.from.fp16 on softfloat targets.Tim Northover2014-07-291-1/+6
| | | | | | | | We need to make sure we use the softened version of all appropriate operands in the libcall, or things go horribly wrong. This may entail actually executing a 1-stage softening. llvm-svn: 214175
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