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* [IR] Remove the DIExpression field from DIGlobalVariable.Adrian Prantl2016-12-1618-151/+312
* [ThinLTO] Thin link efficiency: More efficient export list computationTeresa Johnson2016-12-161-32/+21
* Add extra headers that got deleted by my revert in r289916 but for whichChandler Carruth2016-12-161-1/+2
* Revert patch series introducing the DAG combine to match a load-by-bytesChandler Carruth2016-12-161-283/+0
* [SimplifyLibCalls] Use a lambda. NFCI.Davide Italiano2016-12-161-6/+6
* [Hexagon] Fix some Clang-tidy modernize and Include What You Use warnings; ot...Eugene Zelenko2016-12-166-151/+235
* Revert "[IR] Remove the DIExpression field from DIGlobalVariable."Adrian Prantl2016-12-1618-313/+151
* Add missing library dep.Peter Collingbourne2016-12-161-1/+1
* [IR] Remove the DIExpression field from DIGlobalVariable.Adrian Prantl2016-12-1618-151/+313
* IPO: Introduce ThinLTOBitcodeWriter pass.Peter Collingbourne2016-12-162-0/+345
* [AArch64] Add FeatureSlowMisaligned128Store to Exynos M1 and M2Evandro Menezes2016-12-161-0/+2
* [ThinLTO] Thin link efficiency improvement: don't re-export globals (NFC)Teresa Johnson2016-12-151-9/+13
* [SimplifyLibCalls] Lower fls() to llvm.ctlz().Davide Italiano2016-12-152-3/+19
* DebugInfo: Address non-deterministic output (iterating a SmallPtrSet) in 289697David Blaikie2016-12-153-9/+5
* [IRTranslator] Merge the entry and ABI lowering blocks.Quentin Colombet2016-12-151-0/+26
* DebugInfo: Emit ranges for functions with DISubprograms but lacking locations...David Blaikie2016-12-153-29/+20
* [SimplifyLibCalls] Remove redundant folding logic for ffs().Davide Italiano2016-12-151-13/+3
* Don't combine splats with other shuffles.Eli Friedman2016-12-151-0/+5
* Fix R_AARCH64_MOVW_UABS_G3 relocationYichao Yu2016-12-151-23/+49
* AMDGPU: Select branch on undef to uniform scc branchMatt Arsenault2016-12-153-0/+21
* [ThinLTO] Revert part of r289843 that belonged to another patch.Teresa Johnson2016-12-151-13/+9
* Don't combine a shuffle of two BUILD_VECTORs with duplicate elements.Eli Friedman2016-12-151-10/+23
* [Verifier] Allow TBAA metadata on atomicrmw and atomiccmpxchgSanjoy Das2016-12-151-1/+2
* [ThinLTO] Remove stale comment (NFC)Teresa Johnson2016-12-151-2/+1
* AMDGPU: Fix asserting on returned tail callsMatt Arsenault2016-12-151-2/+4
* [ThinLTO] Thin link efficiency: skip candidate added later with higher thresh...Teresa Johnson2016-12-151-4/+13
* AMDGPU: Assembler support for vintrp instructionsMatt Arsenault2016-12-153-6/+108
* [LV] Enable vectorization of loops with conditional stores by defaultMatthew Simpson2016-12-151-1/+1
* [SimplifyCFG] Merge debug locations when hoisting an instruction from a then/...Andrea Di Biagio2016-12-151-4/+4
* [LiveRangeEdit] Change eliminateDeadDef assert to if condition.Geoff Berry2016-12-151-4/+5
* LibDriver: Allow resource files to be archive members.Peter Collingbourne2016-12-151-2/+4
* [InstCombine] add folds for icmp (smin X, Y), XSanjay Patel2016-12-151-0/+37
* [GlobalISel] Drop workaround for Legalizer member/class sharing a name. NFC.Ahmed Bougacha2016-12-153-3/+3
* [x86] use a single shufps for 256-bit vectors when it can save instructionsSanjay Patel2016-12-151-1/+13
* [AArch64] Guard Misaligned 128-bit store penalty by subtarget featureMatthew Simpson2016-12-151-1/+2
* [AArch64][GlobalISel] Remove redundant RBI comments. NFC.Ahmed Bougacha2016-12-151-20/+1
* [ThinLTO] Ensure callees get hot threshold when first seen on cold pathTeresa Johnson2016-12-151-24/+28
* [x86] use a single shufps when it can save instructionsSanjay Patel2016-12-151-14/+19
* [X86][SSE] Fix domains for scalar store instructionsSimon Pilgrim2016-12-151-0/+4
* Revert "[SimplifyCFG] In sinkLastInstruction correctly set debugloc of common...Robert Lougher2016-12-151-8/+1
* [lanai] Simplify small section check in LowerGlobalAddress and treat ldata se...Jacques Pienaar2016-12-152-3/+14
* [X86][AVX512] Moved instruction domain lookups to the right table. NFCI.Simon Pilgrim2016-12-151-4/+4
* [SimplifyCFG] In sinkLastInstruction correctly set debugloc of "common" inst Robert Lougher2016-12-151-1/+9
* [X86][SSE] Fix domains for VZEXT_LOAD type instructionsSimon Pilgrim2016-12-151-0/+6
* Fix for regression after Global Load Scalarization patchAlexander Timofeev2016-12-151-1/+2
* Extract LaneBitmask into a separate typeKrzysztof Parzyszek2016-12-1530-220/+237
* [CostModel][X86] Updated reverse shuffle costsSimon Pilgrim2016-12-151-5/+95
* [InstCombine] New opportunities for FoldAndOfICmp and FoldXorOfICmpEhsan Amiri2016-12-152-2/+98
* [CostModel] Fix long standing bug with reverse shuffle mask detectionSimon Pilgrim2016-12-151-1/+1
* [Power9] Allow AnyExt immediates for XXSPLTIBNemanja Ivanovic2016-12-152-7/+7
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