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* [ProfileData] (llvm) Use Error in InstrProf and Coverage, NFCVedant Kumar2016-05-137-324/+350
| | | | | | | | | Transition InstrProf and Coverage over to the stricter Error/Expected interface. Differential Revision: http://reviews.llvm.org/D19901 llvm-svn: 269462
* [codeview] Align class and print names of typesReid Kleckner2016-05-136-87/+81
| | | | | | | | | | | | Summary: This way we can get rid of one of the fields in the .def file. Reviewers: llvm-commits Subscribers: zturner Differential Revision: http://reviews.llvm.org/D20251 llvm-svn: 269461
* ARM: use callee-saved list in the order they're actually saved.Tim Northover2016-05-135-11/+29
| | | | | | | | | When setting the frame pointer, the offset from SP is calculated based on the stack slot it gets allocated, but this slot is in turn based on the order of the CSR list so that list should match the order we actually save the registers in. Mostly it did, but in the edge-case of MachO AAPCS targets it was wrong. llvm-svn: 269459
* [Hexagon] Remove dead nodes from SelectionDAG to avoid cyclesKrzysztof Parzyszek2016-05-131-1/+2
| | | | | | | | Recent changes to the instruction selection code exposed a problem where a dead node was not removed on time. This node had both input and output chains, which lead to an apparent cycle. llvm-svn: 269458
* Rename getLargestLegalIntTypeSize to getLargestLegalIntTypeSizeInBits(). NFC.Jun Bum Lim2016-05-135-5/+5
| | | | | | | | | | | | Summary: Rename DataLayout::getLargestLegalIntTypeSize to DataLayout::getLargestLegalIntTypeSizeInBits() to prevent similar mistakes fixed in r269433. Reviewers: joker.eph, mcrosier Subscribers: mcrosier, llvm-commits Differential Revision: http://reviews.llvm.org/D20248 llvm-svn: 269456
* [AMDGPU] Update nop insertion for debugger usageKonstantin Zhuravlyov2016-05-132-36/+15
| | | | | | | | | - Insert one nop for each high level statement instead of two - Do not insert nop before prologue Differential Revision: http://reviews.llvm.org/D20215 llvm-svn: 269452
* [libFuzzer] print the file name before executing the input so that if there ↵Kostya Serebryany2016-05-132-3/+4
| | | | | | is a crash we know which files has caused it llvm-svn: 269450
* [libFuzzer] simplify FuzzerInterface.hKostya Serebryany2016-05-136-79/+43
| | | | llvm-svn: 269448
* add support for -print-imm-hex for AArch64Paul Osmialowski2016-05-133-17/+26
| | | | | | | | | | | | | | | | | | | | | | | | | Most immediates are printed in Aarch64InstPrinter using 'formatImm' macro, but not all of them. Implementation contains following rules: - floating point immediates are always printed as decimal - signed integer immediates are printed depends on flag settings (for negative values 'formatImm' macro prints the value as i.e -0x01 which may be convenient when imm is an address or offset) - logical immediates are always printed as hex - the 64-bit immediate for advSIMD, encoded in "a:b:c:d:e:f:g:h" is always printed as hex - the 64-bit immedaite in exception generation instructions like: brk, dcps1, dcps2, dcps3, hlt, hvc, smc, svc is always printed as hex - the rest of immediates is printed depends on availability of -print-imm-hex Signed-off-by: Maciej Gabka <maciej.gabka@arm.com> Signed-off-by: Paul Osmialowski <pawel.osmialowski@arm.com> Differential Revision: http://reviews.llvm.org/D16929 llvm-svn: 269446
* [EarlyCSE] Change key type of AvailableCalls to Instruction*. NFCI.Geoff Berry2016-05-131-3/+4
| | | | llvm-svn: 269445
* [codeview] Dump the type index on the first line of each recordReid Kleckner2016-05-131-2/+2
| | | | | | This will make it easier to write FileCheck tests. llvm-svn: 269444
* [obj2yaml] [yaml2obj] Basic support for MachO::load_commandChris Bieneman2016-05-131-0/+11
| | | | | | | | This patch adds basic support for MachO::load_command. Load command types and sizes are encoded in the YAML and expanded back into MachO. The YAML doesn't yet support load command structs, that is coming next. In the meantime as a temporary measure when writing MachO files the load commands are padded with zeros so that the generated binary is valid. llvm-svn: 269442
* [InstCombine] handle zero constant vectors for LE/GE comparisons tooSanjay Patel2016-05-131-2/+3
| | | | | | | | | | | | Enhancement to: http://reviews.llvm.org/rL269426 With discussion in: http://reviews.llvm.org/D17859 This should complete the fixes for: PR26701, PR26819: https://llvm.org/bugs/show_bug.cgi?id=26701 https://llvm.org/bugs/show_bug.cgi?id=26819 llvm-svn: 269439
* [PGO] Add flags to control IRPGO warnings.Rong Xu2016-05-131-3/+18
| | | | | | | | | | | | | Currently there is no reasonable way to control the warnings in the 'use' phase of the IRPGO pass. This is problematic because the output can be somewhat spammy. This patch adds some flags which allow us to optionally disable these warnings. The current upstream behavior will remain the default. Patch by Jake VanAdrighem (jvanadrighem@gmail.com) Differential Revision: http://reviews.llvm.org/D20195 llvm-svn: 269437
* [RuntimeDyld] Support R_390_PC64 relocation typeBryan Chan2016-05-131-0/+5
| | | | | | | | | | | | Summary: When the MCJIT generates ELF code, some DWARF data requires 64-bit PC-relative relocation (R_390_PC64). This patch adds support for R_390_PC64 relocation to RuntimeDyld::resolveSystemZRelocation, to avoid an assertion failure. Reviewers: uweigand Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D20033 llvm-svn: 269436
* [MemCpyOpt] Use MaxIntSize in byte instead of bitJun Bum Lim2016-05-131-1/+1
| | | | | | | | | | | | Summary: This change fix the bug in isProfitableToUseMemset() where MaxIntSize shoule be in byte, not bit. Reviewers: arsenm, joker.eph, mcrosier Subscribers: mcrosier, llvm-commits Differential Revision: http://reviews.llvm.org/D20176 llvm-svn: 269433
* Revert "[llc] New diagnostic handler"Renato Golin2016-05-131-2/+1
| | | | | | | | This reverts commit r269428, as it breaks the LLDB build. We need to understand how to change LLDB in the same way as LLC before landing this again. llvm-svn: 269432
* [llc] New diagnostic handlerRenato Golin2016-05-131-1/+2
| | | | | | | | | | | | | | | | | | | Without a diagnostic handler installed, llc's behaviour is to exit on the first error that it encounters. This is very different from the behaviour of clang and other front ends, which try to gather as many errors as possible before exiting. This commit adds a diagnostic handler to llc, allowing it to find and report more than one error. The old behaviour is preserved under a flag (-exit-on-error). Some of the tests fail with the new diagnostic handler, so they have to use the new flag in order to run under the previous behaviour. Some of these are known bugs, others need further investigation. Ideally, we should fix the tests and remove the flag at some point in the future. Patch by Diana Picus. llvm-svn: 269428
* [InstCombine] canonicalize* LE/GE vector integer comparisons to LT/GT ↵Sanjay Patel2016-05-131-2/+55
| | | | | | | | | | | | | | | (PR26701, PR26819) *We don't currently handle the edge case constants (min/max values), so it's not a complete canonicalization. To fully solve the motivating bugs, we need to enhance this to recognize a zero vector too because that's a ConstantAggregateZero which is a ConstantData, not a ConstantVector or a ConstantDataVector. Differential Revision: http://reviews.llvm.org/D17859 llvm-svn: 269426
* [scan-build] fix warnings emiited on LLVM Analysis code baseSilviu Baranga2016-05-132-24/+26
| | | | | | | | | | | | Fix "Logic error" warnings of the type "Called C++ object pointer is null" reported by Clang Static Analyzer on the following files: lib/Analysis/ScalarEvolution.cpp, lib/Analysis/LoopInfo.cpp. Patch by Apelete Seketeli! llvm-svn: 269424
* [scan-build] fix dead store warnings emitted on LLVM Hexagon code baseKrzysztof Parzyszek2016-05-134-4/+0
| | | | | | | | Patch by Apelete Seketeli. Differential Revision: http://reviews.llvm.org/D19900 llvm-svn: 269415
* [MIB] Create a helper function getRegState to extract all register flagsKrzysztof Parzyszek2016-05-131-12/+0
| | | | llvm-svn: 269414
* Assure calling "cld" instruction in prologue of X86 interrupt handler function.Amjad Aboud2016-05-131-0/+12
| | | | | | Differential Revision: http://reviews.llvm.org/D18725 llvm-svn: 269413
* [mips][ias] Work around yet another incorrect microMIPS relocation ↵Daniel Sanders2016-05-131-3/+7
| | | | | | | | | | | | evaluation exposed by r268900. It's not entirely clear why R_MICROMIPS_(GOT|HI16|LO16) are evaluated incorrectly in a small number of the LNT tests at this point. However, it's not related to the STO_MIPS_MICROMIPS issue. At this point all the microMIPS-related changes of r268900 have been reverted. llvm-svn: 269410
* [mips][microMIPS] Implement APPEND, BPOSGE32C, MODSUB, MULSA.W.PH and ↵Hrvoje Varga2016-05-139-5/+92
| | | | | | | | MULSAQ_S.W.PH instructions Differential Revision: http://reviews.llvm.org/D14117 llvm-svn: 269408
* SDAG: Clean up a dangling node in SparcISelDAGToDAG::SelectImplJustin Bogner2016-05-131-0/+1
| | | | | | | | | When we convert to the void Select interface, leaving unreferenced nodes around won't be allowed anymore. Part of llvm.org/pr26808. llvm-svn: 269396
* Revert "[Unroll] Implement a conservative and monotonically increasing cost ↵Michael Zolotukhin2016-05-132-188/+13
| | | | | | | | | | | tracking system during the full unroll heuristic analysis that avoids counting any instruction cost until that instruction becomes "live" through a side-effect or use outside the..." This reverts commit r269388. It caused some bots to fail, I'm reverting it until I investigate the issue. llvm-svn: 269395
* SDAG: Clean up a dangling node in MipsISelDAGToDAG::SelectImplJustin Bogner2016-05-131-0/+1
| | | | | | | | | When we convert to the void Select interface, leaving unreferenced nodes around won't be allowed anymore. Part of llvm.org/pr26808. llvm-svn: 269394
* SDAG: Implement Select instead of SelectImpl in MSP430DAGToDAGISelJustin Bogner2016-05-131-76/+57
| | | | | | | | | | | - Where we were returning a node before, call ReplaceNode instead. - Where we would return null to fall back to another selector, rename the method to try* and return a bool for success. - Where we were calling SelectNodeTo, just return afterwards. Part of llvm.org/pr26808. llvm-svn: 269393
* [LoopDist] Only run LAA for loops with the pragmaAdam Nemet2016-05-131-17/+17
| | | | | | | This should fix some compile-time regressions after r267672. Thanks to Chris Matthews for bisecting it. llvm-svn: 269392
* AMDGPU: Remove verifier check for scc live insMatt Arsenault2016-05-131-10/+0
| | | | | | | | | | We only really need this to be true for SIFixSGPRCopies. I'm not sure there's any way this could happen before that point. Fixes a case where MachineCSE could introduce a cross block scc use. llvm-svn: 269391
* [Unroll] Implement a conservative and monotonically increasing cost tracking ↵Michael Zolotukhin2016-05-132-13/+188
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | system during the full unroll heuristic analysis that avoids counting any instruction cost until that instruction becomes "live" through a side-effect or use outside the... Summary: ...loop after the last iteration. This is really hard to do correctly. The core problem is that we need to model liveness through the induction PHIs from iteration to iteration in order to get the correct results, and we need to correctly de-duplicate the common subgraphs of instructions feeding some subset of the induction PHIs. All of this can be driven either from a side effect at some iteration or from the loop values used after the loop finishes. This patch implements this by storing the forward-propagating analysis of each instruction in a cache to recall whether it was free and whether it has become live and thus counted toward the total unroll cost. Then, at each sink for a value in the loop, we recursively walk back through every value that feeds the sink, including looping back through the iterations as needed, until we have marked the entire input graph as live. Because we cache this, we never visit instructions more than twice -- once when we analyze them and put them into the cache, and once when we count their cost towards the unrolled loop. Also, because the cache is only two bits and because we are dealing with relatively small iteration counts, we can store all of this very densely in memory to avoid this from becoming an excessively slow analysis. The code here is still pretty gross. I would appreciate suggestions about better ways to factor or split this up, I've stared too long at the algorithmic side to really have a good sense of what the design should probably look at. Also, it might seem like we should do all of this bottom-up, but I think that is a red herring. Specifically, the simplification power is *much* greater working top-down. We can forward propagate very effectively, even across strange and interesting recurrances around the backedge. Because we use data to propagate, this doesn't cause a state space explosion. Doing this level of constant folding, etc, would be very expensive to do bottom-up because it wouldn't be until the last moment that you could collapse everything. The current solution is essentially a top-down simplification with a bottom-up cost accounting which seems to get the best of both worlds. It makes the simplification incremental and powerful while leaving everything dead until we *know* it is needed. Finally, a core property of this approach is its *monotonicity*. At all times, the current UnrolledCost is a conservatively low estimate. This ensures that we will never early-exit from the analysis due to exceeding a threshold when if we had continued, the cost would have gone back below the threshold. These kinds of bugs can cause incredibly hard to track down random changes to behavior. We could use a techinque similar (but much simpler) within the inliner as well to avoid considering speculated code in the inline cost. Reviewers: chandlerc Subscribers: sanjoy, mzolotukhin, llvm-commits Differential Revision: http://reviews.llvm.org/D11758 llvm-svn: 269388
* [LoopUnrollAnalyzer] Don't treat gep-instructions with simplified offset as ↵Michael Zolotukhin2016-05-131-1/+1
| | | | | | | | | | | | | | | | | | simplified. Summary: Currently we consider such instructions as simplified, which is incorrect, because if their user isn't simplified, we can't actually simplify them too. This biases our estimates of profitability: for instance the analyzer expects much more gains from unrolling memcpy loops than there actually are. Reviewers: hfinkel, chandlerc Subscribers: mzolotukhin, llvm-commits Differential Revision: http://reviews.llvm.org/D17365 llvm-svn: 269387
* [codeview] Try to handle errors better in record iteratorReid Kleckner2016-05-121-2/+2
| | | | llvm-svn: 269381
* SDAG: Implement Select instead of SelectImpl in AArch64DAGToDAGISelJustin Bogner2016-05-121-802/+1161
| | | | | | | | | | | | | | This one has a lot of code churn, but it's all mechanical and straightforward. - Where we were returning a node before, call ReplaceNode instead. - Where we would return null to fall back to another selector, rename the method to try* and return a bool for success. - Where we were calling SelectNodeTo, just return afterwards. Part of llvm.org/pr26808. llvm-svn: 269379
* [PM] Port of the DepndenceAnalysis to the new PM.Chandler Carruth2016-05-127-238/+185
| | | | | | | | | | | | | Ported DA to the new PM by splitting the former DependenceAnalysis Pass into a DependenceInfo result type and DependenceAnalysisWrapperPass type and adding a new PM-style DependenceAnalysis analysis pass returning the DependenceInfo. Patch by Philip Pfaffe, most of the review by Justin. Differential Revision: http://reviews.llvm.org/D18834 llvm-svn: 269370
* SDAG: Implement Select instead of SelectImpl in LanaiDAGToDAGISelJustin Bogner2016-05-121-21/+13
| | | | | | | | | - Where we were returning a node before, call ReplaceNode instead. - Where we were calling SelectNodeTo, just return afterwards. Part of llvm.org/pr26808. llvm-svn: 269364
* SDAG: Implement Select instead of SelectImpl in HexagonDAGToDAGISelJustin Bogner2016-05-121-139/+189
| | | | | | | | | | | | - Where we were returning a node before, call ReplaceNode instead. - Where we had already replaced all uses and we returned a node, just remove the dead node instead. - Where we would return null to fall back to another selector, rename the method to try* and return a bool for success. Part of llvm.org/pr26808. llvm-svn: 269358
* [LAA] Use std::min. NFCAdam Nemet2016-05-121-4/+2
| | | | llvm-svn: 269356
* SDAG: Clean up a dangling node in HexagonISelDAGToDAG::SelectImplJustin Bogner2016-05-121-1/+1
| | | | | | | | | When we convert to the void Select interface, leaving unreferenced nodes around won't be allowed anymore. Part of llvm.org/pr26808. llvm-svn: 269355
* [ARM] Support and tests for transform of LDR rt, = to MOVRenato Golin2016-05-121-5/+66
| | | | | | | | | | | | | | | | | | | | | | | | | | This change implements the transformation in processInstruction() for the LDR rt, =expression to MOV rt, expression when the expression can be evaluated and can fit into the immediate field of the MOV or a MVN. Across the ARM and Thumb instruction sets there are several cases to consider, each with a different range of representatble constants. In ARM we have: * Modified immediate (All ARM architectures) * MOVW (v6t2 and above) In Thumb we have: * Modified immediate (v6t2, v7m and v8m.mainline) * MOVW (v6t2, v7m, v8.mainline and v8m.baseline) * Narrow Thumb MOV that can be used in an IT block (non flag-setting) If the immediate fits any of the available alternatives then we make the transformation. Fixes 25722. Patch by Peter Smith. llvm-svn: 269354
* [ARM] Delay ARM constant pool creation. NFC.Renato Golin2016-05-125-6/+92
| | | | | | | | | | | | | | | | | | | | | This change adds a new constant pool kind to ARMOperand. When parsing the operand for =immediate we create an instance of this operand rather than creating a constant pool entry and rewriting the operand. As the new operand kind is only created for ldr rt,= we can make ldr rt,= an explicit pseudo instruction in ARM, Thumb and Thumb2 The pseudo instruction is expanded in processInstruction(). This creates the constant pool and transforms the pseudo instruction into a pc-relative ldr to the constant pool. There are no functional changes and no modifications needed to existing tests. Required by the patch that fixes PR25722. Patch by Peter Smith. llvm-svn: 269352
* SDAG: Implement Select instead of SelectImpl in BPFDAGToDAGISelJustin Bogner2016-05-121-15/+10
| | | | | | | | | - Where we were returning a node before, call ReplaceNode instead. - Where we were calling SelectNodeTo, just return afterwards. Part of llvm.org/pr26808. llvm-svn: 269350
* SDAG: Implement Select instead of SelectImpl in AMDGPUDAGToDAGISelJustin Bogner2016-05-121-49/+67
| | | | | | | | | | | - Where we were returning a node before, call ReplaceNode instead. - Where we would return null to fall back to another selector, rename the method to try* and return a bool for success. - Where we were calling SelectNodeTo, just return afterwards. Part of llvm.org/pr26808. llvm-svn: 269349
* Tidied up switch cases. NFCI.Simon Pilgrim2016-05-121-52/+48
| | | | | | Split FCMP//ICMP/SEL from the basic arithmetic cost functions. They were not sharing any notable code path (just the return) and were repeatedly testing the opcode. llvm-svn: 269348
* SDAG: Clean up dangling nodes in AArch64ISelDAGToDAG::SelectImplJustin Bogner2016-05-121-5/+8
| | | | | | | | | When we convert to the void Select interface, leaving unreferenced nodes around won't be allowed anymore. Part of llvm.org/pr26808. llvm-svn: 269345
* Revert "LiveIntervalAnalysis: Rework constructMainRangeFromSubranges()"Tom Stellard2016-05-124-48/+246
| | | | | | | | This reverts commit r269016 and also the follow-up commit r269020. This patch caused PR27705. llvm-svn: 269344
* Fixed the callee saved registers list for X86 AllRegs calling convention.Amjad Aboud2016-05-122-16/+26
| | | | | | | | | | | | | | | | 32-bit AllRegs: SSE: xmm0-xmm7 AVX: ymm0-ymm7 AVX512: zmm0-zmm7 + k0-k7 64-bit AllRegs: SSE: xmm0-xmm15 AVX: ymm0-ymm15 AVX512: zmm0-zmm31 + k0-k7 Differential Revision: http://reviews.llvm.org/D20142 llvm-svn: 269337
* [AArch64] Give function a more appropriate name.Chad Rosier2016-05-121-3/+3
| | | | llvm-svn: 269335
* Fixed dwarf X86-32 register mapping for k0-k7 registers.Amjad Aboud2016-05-121-8/+8
| | | | llvm-svn: 269333
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