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* Add definition of function MipsTargetLowering::passArgOnStack which emits nodesAkira Hatanaka2012-10-302-0/+22
| | | | | | for passing a function call argument on a stack. llvm-svn: 167041
* [inline asm] Implement mayLoad and mayStore for inline assembly. In general,Chad Rosier2012-10-304-8/+29
| | | | | | | | | | the MachineInstr MayLoad/MayLoad flags are based on the tablegen implementation. For inline assembly, however, we need to compute these based on the constraints. Revert r166929 as this is no longer needed, but leave the test case in place. rdar://12033048 and PR13504 llvm-svn: 167040
* Do not do tail-call optimization if target is mips16.Akira Hatanaka2012-10-301-0/+4
| | | | llvm-svn: 167039
* BBVectorize: Don't make calls to SE when the result is unused.Hal Finkel2012-10-301-2/+5
| | | | | | | SE was being called during the instruction-fusion process (when the result is unreliable, and thus ignored). No functionality change is intended. llvm-svn: 167037
* 80-colNadav Rotem2012-10-301-1/+2
| | | | llvm-svn: 167036
* LoopVectorize: Add support for write-only loops when the write destination ↵Nadav Rotem2012-10-301-0/+7
| | | | | | | | is a single pointer. Speedup SciMark by 1% llvm-svn: 167035
* PowerPC: Expand FSRQT for vector typesAdhemerval Zanella2012-10-301-0/+6
| | | | | | | This patch expands FSQRT for floating point vector types when altivec is used. llvm-svn: 167034
* LoopVectorize: Fix a bug in the initialization of reduction variables. AND ↵Nadav Rotem2012-10-301-7/+21
| | | | | | | | needs to start at all-one while XOR, and OR need to start at zero. llvm-svn: 167032
* Fix grammar.Bill Wendling2012-10-301-2/+2
| | | | llvm-svn: 167029
* Enable ELF machine type to be specified explicitly in X86 backendMichael Liao2012-10-303-15/+19
| | | | llvm-svn: 167027
* Change ForceSizeOpt attribute into MinSize attributeQuentin Colombet2012-10-306-11/+12
| | | | llvm-svn: 167020
* Fix isEliminableCastPair to work correctly in the presence of pointersDuncan Sands2012-10-303-12/+21
| | | | | | with different sizes. llvm-svn: 167018
* PowerPC: More support for Altivec compare operationsAdhemerval Zanella2012-10-302-13/+141
| | | | | | | | This patch adds more support for vector type comparisons using altivec. It adds correct support for v16i8, v8i16, v4i32, and v4f32 vector types for comparison operators ==, !=, >, >=, <, and <=. llvm-svn: 167015
* Add a helper for telling whether a type is a pointer or vector of pointer type.Duncan Sands2012-10-301-24/+6
| | | | | | | Simplify the implementation of the corresponding integer and float functions and move them inline while there. llvm-svn: 167014
* Enable some additional constant folding for PPCDoubleDouble.Ulrich Weigand2012-10-302-21/+5
| | | | | | This fixes Clang :: CodeGen/complex-builtints.c on PowerPC. llvm-svn: 167013
* Use TargetTransformInfo to control switch-to-lookup table transformationHans Wennborg2012-10-304-123/+31
| | | | | | | | | | | | | | When the switch-to-lookup tables transform landed in SimplifyCFG, it was pointed out that this could be inappropriate for some targets. Since there was no way at the time for the pass to know anything about the target, an awkward reverse-transform was added in CodeGenPrepare that turned lookup tables back into switches for some targets. This patch uses the new TargetTransformInfo to determine if a switch should be transformed, and removes CodeGenPrepare::ConvertLoadToSwitch. llvm-svn: 167011
* Remove an invalid assert in TargetTransformImplHal Finkel2012-10-301-4/+13
| | | | | | | getCastInstrCost had an assert prohibiting scalar to vector casts. Such casts, however, are allowed. This should make the vectorizer buildbot happier. llvm-svn: 166998
* ARM: Better disassembly for pc-relative LDR.Jim Grosbach2012-10-304-4/+6
| | | | | | | | | When the operand is a plain immediate rather than a label, print it as [pc, #imm] like we do for the Thumb2 wide encoding variant. rdar://12154503 llvm-svn: 166991
* Change mips16 delay slot jumps to non delay slot forms by default.Reed Kotler2012-10-302-3/+10
| | | | | | | | We will make them delay slot forms if there is something that can be placed in the delay slot during a separate pass. Mips16 extended instructions cannot be placed in delay slots. llvm-svn: 166990
* LoopVectorizer: change debug prints: Print the module identifier when ↵Nadav Rotem2012-10-301-4/+6
| | | | | | deciding to vectorize. When deciding not to vectorize do not print the called function name because it can be null. llvm-svn: 166989
* Re-commit r166971. I reverted it to quickly, when buildbots didn't have a chanceJakub Staszak2012-10-301-4/+4
| | | | | | to test it with chapni's fix (-mattr=+avx). llvm-svn: 166985
* Fix ARM's b.w instruction for thumb 2 and the encoding T4. The branch targetKevin Enderby2012-10-292-11/+23
| | | | | | | is 24 bits not 20 and the decoding needed to correctly handle converting the J1 and J2 bits to their I1 and I2 values to reconstruct the displacement. llvm-svn: 166982
* Revert r166971. It causes buildbot failure. To be investigated.Jakub Staszak2012-10-291-4/+4
| | | | llvm-svn: 166979
* Remove unused variable.Jakub Staszak2012-10-291-1/+0
| | | | llvm-svn: 166973
* Simplify code. No functionality change.Jakub Staszak2012-10-291-4/+5
| | | | llvm-svn: 166972
* Allow to fold vector load if there is more than one bitcast, so in the case:Jakub Staszak2012-10-291-4/+4
| | | | | | | | | | | | | | | | | | | %0 = load <8 x i16>* %dest %1 = shufflevector <8 x i16> %0, <8 x i16> %in, <8 x i32> < i32 0, i32 1, i32 2, i32 3, i32 13, i32 undef, i32 14, i32 14> store <8 x i16> %1, <8 x i16>* %dest We get: vmovlpd (%eax), %xmm0, %xmm0 instead of: vmovaps (%eax), %xmm1 vmovsd %xmm1, %xmm0, %xmm0 No extra test-case is added. I just fixed the existing one (also it uses FileCheck now). llvm-svn: 166971
* LoopVectorize: Update and preserve the dominator tree info.Nadav Rotem2012-10-291-9/+37
| | | | llvm-svn: 166970
* This patch solves a problem with passing varargs parameters under the PPC64Bill Schmidt2012-10-291-1/+11
| | | | | | | | | | | | | | | | | | ELF ABI. A varargs parameter consisting of a single-precision floating-point value, or of a single-element aggregate containing a single-precision floating-point value, must be passed in the low-order (rightmost) four bytes of the doubleword stack slot reserved for that parameter. If there are GPR protocol registers remaining, the parameter must also be mirrored in the low-order four bytes of the reserved GPR. Prior to this patch, such parameters were being passed in the high-order four bytes of the stack slot and the mirrored GPR. The patch adds a new test case to verify the correct code generation. llvm-svn: 166968
* Implement patterns for extloadi8 and extloadi16Reed Kotler2012-10-291-0/+4
| | | | llvm-svn: 166960
* In various places throughout the code generator, there were specialUlrich Weigand2012-10-293-85/+66
| | | | | | | | | checks to avoid performing compile-time arithmetic on PPCDoubleDouble. Now that APFloat supports arithmetic on PPCDoubleDouble, those checks are no longer needed, and we can treat the type like any other. llvm-svn: 166958
* APFloat cleanup: Remove now unused "arithmeticOK" logic.Ulrich Weigand2012-10-291-42/+8
| | | | llvm-svn: 166954
* APFloat cleanup: Remove now unused fields "sign2" and "exponent2".Ulrich Weigand2012-10-291-21/+9
| | | | llvm-svn: 166952
* Implement arithmetic on APFloat with PPCDoubleDouble semantics byUlrich Weigand2012-10-291-76/+65
| | | | | | | | | | | | treating it as if it were an IEEE floating-point type with 106-bit mantissa. This makes compile-time arithmetic on "long double" for PowerPC in clang (in particular parsing of floating point constants) work, and fixes all "long double" related failures in the test suite. llvm-svn: 166951
* [ms-inline asm] Add support for the [] operator. Essentially, [expr1][expr2] isChad Rosier2012-10-291-10/+37
| | | | | | | equivalent to [expr1 + expr2]. See test cases for more examples. rdar://12470392 llvm-svn: 166949
* Rename the BB-vectorize flag to match the dragonegg nameNadav Rotem2012-10-291-2/+2
| | | | llvm-svn: 166948
* Fix PR14204Michael Liao2012-10-291-0/+15
| | | | | | - Add missing pattern on X86ISD::VZEXT from VR256 to VR256 when AVX2 is enabled. llvm-svn: 166947
* Fix typoJoerg Sonnenberger2012-10-291-2/+2
| | | | llvm-svn: 166945
* Completely disallow partial copies in adjustCopiesBackFrom().Jakob Stoklund Olesen2012-10-291-1/+2
| | | | | | | | | | | | Partial copies can show up even when CoalescerPair.isPartial() returns false. For example: %vreg24:dsub_0<def> = COPY %vreg31:dsub_0; QPR:%vreg24,%vreg31 Such a partial-partial copy is not good enough for the transformation adjustCopiesBackFrom() needs to do. llvm-svn: 166944
* Allow i32/i64 for 'f' constraint on PowerPC.Ulrich Weigand2012-10-291-2/+2
| | | | | | This fixes PR12757. llvm-svn: 166943
* Remove a wrapper around getIntPtrType added to GVN by Hal in commit 166624 (theDuncan Sands2012-10-295-25/+19
| | | | | | | | | wrapper returns a vector of integers when passed a vector of pointers) by having getIntPtrType itself return a vector of integers in this case. Outside of this wrapper, I didn't find anywhere in the codebase that was relying on the old behaviour for vectors of pointers, so give this a whirl through the buildbots. llvm-svn: 166939
* Remove code to saturate profile counts.Bob Wilson2012-10-291-8/+1
| | | | | | | | | We may need to change the way profile counter values are stored, but saturation is the wrong thing to do. Just remove it for now. Patch by Alastair Murray! llvm-svn: 166938
* Change the PassManagerBuilder (used by -O3) loop vectorizer flag from ↵Nadav Rotem2012-10-291-4/+8
| | | | | | -vectorize to -vectorize-loops because we dont want to share the same flag as the bb-vectorizer. llvm-svn: 166937
* Minor style fixes for TargetTransformationInfo and TargetTransformImplHans Wennborg2012-10-291-3/+3
| | | | llvm-svn: 166936
* Expand all atomic ops for mips16.Reed Kotler2012-10-291-2/+23
| | | | llvm-svn: 166935
* PPCSubtarget.h: Add explicit braces.NAKAMURA Takumi2012-10-291-1/+2
| | | | llvm-svn: 166932
* PPCSubtarget.h: Whitespace.NAKAMURA Takumi2012-10-291-22/+22
| | | | llvm-svn: 166931
* This patch addresses a problem with the Post RA scheduler generating anPreston Gurd2012-10-291-0/+5
| | | | | | | | | | | | | | incorrect instruction sequence due to it not being aware that an inline assembly instruction may reference memory. This patch fixes the problem by causing the scheduler to always assume that any inline assembly code instruction could access memory. This is necessary because the internal representation of the inline instruction does not include any information about memory accesses. This should fix PR13504. llvm-svn: 166929
* This patch adds alignment information for long double to the 64-bit PowerPCBill Schmidt2012-10-291-0/+6
| | | | | | | | | | | | | | | | | ELF subtarget. The existing logic is used as a fallback to avoid any changes to the Darwin ABI. PPC64 ELF now has two possible data layout strings: one for FreeBSD, which requires 8-byte alignment, and a default string that requires 16-byte alignment. I've added a test for PPC64 Linux to verify the 16-byte alignment. If somebody wants to add a separate test for FreeBSD, that would be great. Note that there is a companion patch to update the alignment information in Clang, which I am committing now as well. llvm-svn: 166928
* Factorize code: rather than duplication the logic in getPointerTypeSizeInBits,Duncan Sands2012-10-291-14/+2
| | | | | | just call getPointerTypeSizeInBits. No functionality change. llvm-svn: 166926
* Silence a GCC warning about comparing signed and unsigned types.Duncan Sands2012-10-291-2/+2
| | | | llvm-svn: 166922
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