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| author | Michael Liao <michael.liao@intel.com> | 2012-10-29 17:57:12 +0000 |
|---|---|---|
| committer | Michael Liao <michael.liao@intel.com> | 2012-10-29 17:57:12 +0000 |
| commit | ad0b69fe3ec570779c4e7f4ef833d568d1d41096 (patch) | |
| tree | 24374cefbca90282e1e0e4c9c73b2669ffb8d0e0 /llvm/lib | |
| parent | 0d6b5e5fdedb097aa0446ce42694f21278b8ec1d (diff) | |
| download | bcm5719-llvm-ad0b69fe3ec570779c4e7f4ef833d568d1d41096.tar.gz bcm5719-llvm-ad0b69fe3ec570779c4e7f4ef833d568d1d41096.zip | |
Fix PR14204
- Add missing pattern on X86ISD::VZEXT from VR256 to VR256 when AVX2 is enabled.
llvm-svn: 166947
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/X86/X86InstrSSE.td | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/llvm/lib/Target/X86/X86InstrSSE.td b/llvm/lib/Target/X86/X86InstrSSE.td index e9c7f3e7f1c..3fcc0dc4149 100644 --- a/llvm/lib/Target/X86/X86InstrSSE.td +++ b/llvm/lib/Target/X86/X86InstrSSE.td @@ -5850,6 +5850,21 @@ let Predicates = [HasAVX2] in { def : Pat<(v4i64 (X86vzext (v8i16 VR128:$src))), (VPMOVZXWQYrr VR128:$src)>; def : Pat<(v4i64 (X86vzext (v4i32 VR128:$src))), (VPMOVZXDQYrr VR128:$src)>; + + def : Pat<(v16i16 (X86vzext (v32i8 VR256:$src))), + (VPMOVZXBWYrr (EXTRACT_SUBREG VR256:$src, sub_xmm))>; + def : Pat<(v8i32 (X86vzext (v32i8 VR256:$src))), + (VPMOVZXBDYrr (EXTRACT_SUBREG VR256:$src, sub_xmm))>; + def : Pat<(v4i64 (X86vzext (v32i8 VR256:$src))), + (VPMOVZXBQYrr (EXTRACT_SUBREG VR256:$src, sub_xmm))>; + + def : Pat<(v8i32 (X86vzext (v16i16 VR256:$src))), + (VPMOVZXWDYrr (EXTRACT_SUBREG VR256:$src, sub_xmm))>; + def : Pat<(v4i64 (X86vzext (v16i16 VR256:$src))), + (VPMOVZXWQYrr (EXTRACT_SUBREG VR256:$src, sub_xmm))>; + + def : Pat<(v4i64 (X86vzext (v8i32 VR256:$src))), + (VPMOVZXDQYrr (EXTRACT_SUBREG VR256:$src, sub_xmm))>; } let Predicates = [HasAVX] in { |
