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* Fix whitespace indentation. NFCI.Simon Pilgrim2017-07-131-2/+2
| | | | llvm-svn: 307894
* [ARM] GlobalISel: Move local variable. NFCDiana Picus2017-07-131-4/+10
| | | | | | | Move a local variable from outside a switch to inside every case that needs it (which isn't all of the cases, of course). llvm-svn: 307893
* [AVR] Fix broken indentationDylan McKay2017-07-131-1/+1
| | | | llvm-svn: 307891
* [AVR] Add a 'LLVM_FALLTHROUGH' statement to the AsmParserDylan McKay2017-07-131-0/+1
| | | | | | Should fix warnings in the build. llvm-svn: 307890
* [ARM] Inline callee if its target-features are a subset of the callerFlorian Hahn2017-07-132-0/+54
| | | | | | | | | | | | | | | | | | | Summary: Similar to X86, it should be safe to inline callees if their target-features are a subset of the caller. As some subtarget features provide different instructions depending on whether they are set or unset (e.g. ThumbMode and ModeSoftFloat), we use a whitelist of target-features describing hardware capabilities only. Reviewers: kristof.beyls, rengolin, t.p.northover, SjoerdMeijer, peter.smith, silviu.baranga, efriedma Reviewed By: SjoerdMeijer, efriedma Subscribers: dschuff, efriedma, aemerson, sdardis, javed.absar, arichardson, eraman, llvm-commits Differential Revision: https://reviews.llvm.org/D34697 llvm-svn: 307889
* [AVR] Fix indirect calls to function pointersDylan McKay2017-07-131-2/+14
| | | | | | Patch by Carl Peto. llvm-svn: 307888
* fix typos in comments and error messges; NFCHiroshi Inoue2017-07-133-4/+4
| | | | llvm-svn: 307885
* [X86] Simplify the getHostCPUName for AMD family 6 and 15.Craig Topper2017-07-131-38/+11
| | | | | | As far as I can tell we can simply distinguish based on features rather than model number. Many of the strings we were previously using are treated the same by the backend. llvm-svn: 307884
* [TargetLowering] Add hook for adding target MMO flags when doing ISel.Geoff Berry2017-07-131-0/+2
| | | | | | | | | | | | | Summary: Add TargetLowering hook getMMOFlags() to add target specific MMO flags to load/store instructions created by ISel. Reviewers: bogner, hfinkel, qcolombet, MatzeB Subscribers: mcrosier, javed.absar, llvm-commits Differential Revision: https://reviews.llvm.org/D34962 llvm-svn: 307879
* [MIR] Add support for printing and parsing target MMO flagsGeoff Berry2017-07-136-6/+81
| | | | | | | | | | | | | | | | | Summary: Add target hooks for printing and parsing target MMO flags. Targets may override getSerializableMachineMemOperandTargetFlags() to return a mapping from string to flag value for target MMO values that should be serialized/parsed in MIR output. Add implementation of this hook for AArch64 SuppressPair MMO flag. Reviewers: bogner, hfinkel, qcolombet, MatzeB Subscribers: mcrosier, javed.absar, llvm-commits Differential Revision: https://reviews.llvm.org/D34962 llvm-svn: 307877
* [libFuzzer] make sure that -reduce_inputs=1 deletes redundant files in the ↵Kostya Serebryany2017-07-132-3/+21
| | | | | | corpus llvm-svn: 307875
* [libFuzzer] experimental feature -reduce_inputs (off by default) that tries ↵Kostya Serebryany2017-07-139-16/+102
| | | | | | to replace elements in the corpus with smaller ones that have the same feature set. Still needs tuning llvm-svn: 307873
* [DWARF] Fixing a bug with processing of DWARF v5 indexed strings in Mach-O ↵Wolfgang Pieb2017-07-131-4/+4
| | | | | | | | | | | objects. Code to convert MachO - specific section debug section names to standard DWARF v5 section names was in the wrong place. Differential Revision: https://reviews.llvm.org/D35321 llvm-svn: 307872
* [CodeGenPrepare] Don't create dead instructions in addrmode sinkingEli Friedman2017-07-121-12/+18
| | | | | | | | | | When we fail to sink an instruction, we must make sure not to modify the function; otherwise, we end up in an infinite loop because CodeGenPrepare iterates until it doesn't make any changes. Fixes https://bugs.llvm.org/show_bug.cgi?id=33608 . llvm-svn: 307866
* [PGO] Enhance pgo counter promotionXinliang David Li2017-07-121-42/+115
| | | | | | | | | | | | | | | | | | | | | | | This is an incremental change to the promotion feature. There are two problems with the current behavior: 1) loops with multiple exiting blocks are totally disabled 2) a counter update can only be promoted one level up in the loop nest -- which does help much for short trip count inner loops inside a high trip-count outer loops. Due to this limitation, we still saw very large profile count fluctuations from run to run for the affected loops which are usually very hot. This patch adds the support for promotion counters iteratively across the loop nest. It also turns on the promotion for loops with multiple exiting blocks (with a limit). For single-threaded applications, the performance impact is flat on average. For instance, dealII improves, but povray regresses. llvm-svn: 307863
* [libFuzzer] relax test/shrink.test a bit (got broken on windows)Kostya Serebryany2017-07-121-1/+1
| | | | llvm-svn: 307862
* AMDGPU: Fix converting unanalyzable global loads to SMRDMatt Arsenault2017-07-121-4/+5
| | | | | | | Not all memory dependence queries succeed, so this needs to be conservative if it fails. llvm-svn: 307861
* [SjLj] Replace recursive block marking algorithm with iterative algorithmGerolf Hoflehner2017-07-121-2/+5
| | | | | | | | | | | | | | | | Summary: Some programs run into a stack overflow issue. This change avoids this problem by replacing the recursive algorithm with the iterative version. Reviewers: MatzeB, t.p.northover, dblaikie Reviewed By: MatzeB Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D35105 llvm-svn: 307860
* [libFuzzer] remove include <sanitizer/coverage_interface.h>, not needed any ↵Kostya Serebryany2017-07-121-3/+0
| | | | | | more llvm-svn: 307858
* [libFuzzer] refactoring in preparation for -reduce_inputs; NFC intendedKostya Serebryany2017-07-125-32/+40
| | | | llvm-svn: 307857
* Add element atomic memset intrinsicDaniel Neilson2017-07-124-1/+109
| | | | | | | | | | | | | | Summary: Continuing the work from https://reviews.llvm.org/D33240, this change introduces an element unordered-atomic memset intrinsic. This intrinsic is essentially memset with the implementation requirement that all stores used for the assignment are done with unordered-atomic stores of a given element size. Reviewers: eli.friedman, reames, mkazantsev, skatkov Reviewed By: reames Subscribers: jfb, dschuff, sbc100, jgravelle-google, aheejin, efriedma, llvm-commits Differential Revision: https://reviews.llvm.org/D34885 llvm-svn: 307854
* [AArch64] Only run macro fusion for CPUs with any fusion support.Florian Hahn2017-07-121-1/+3
| | | | | | | | | | | | Reviewers: evandro, t.p.northover, javed.absar Reviewed By: evandro Subscribers: aemerson, rengolin, kristof.beyls, llvm-commits Differential Revision: https://reviews.llvm.org/D34959 llvm-svn: 307851
* Allow clients to specify search order of DynamicLibraries.Frederich Munch2017-07-123-11/+37
| | | | | | | | | | | | | | Summary: Different JITs and other clients of LLVM may have different needs in how symbol resolution should occur. Reviewers: v.g.vassilev, lhames, karies Reviewed By: v.g.vassilev Subscribers: pcanal, llvm-commits Differential Revision: https://reviews.llvm.org/D33529 llvm-svn: 307849
* [AMDGPU] fcanonicalize elimination optimizationStanislav Mekhanoshin2017-07-121-9/+86
| | | | | | | | | | | | We are using multiplication by 1.0 to flush denormals and quiet sNaNs. That is possible to omit this multiplication if source of the fcanonicalize instruction is known to be flushed/quieted, i.e. if it comes from another instruction known to do the normalization and we are using IEEE mode to quiet sNaNs. Differential Revision: https://reviews.llvm.org/D35218 llvm-svn: 307848
* Don't expose a map in the DWARFContext interface.Rafael Espindola2017-07-121-6/+6
| | | | | | | | | Doing so is leaking an implementation detail. I have an implementation that uses the lld infrastructure and doesn't use a map or object::SectionRef. llvm-svn: 307846
* [LoopUnrollRuntime] NFC: Refactored safety checks of unrolling multi-exit loopAnna Thomas2017-07-121-47/+58
| | | | | | | | | | | Refactored the code and separated out a function `canSafelyUnrollMultiExitLoop` to reduce redundant checks and make it easier to add profitability heuristics later. Added tests to runtime unrolling to make sure that unrolling for multi-exit loops is not done unless the option -unroll-runtime-multi-exit is true. llvm-svn: 307843
* [AArch64] Add AArch64Subtarget::isFusion function.Florian Hahn2017-07-122-1/+8
| | | | | | | | | | | | | | | | | | | | | | Summary: isFusion returns true if the subtarget supports any kind of instruction fusion, similar to ARMSubtarget::isFusion. This was suggested in D34142. This changes the current behavior slightly, because the macro fusion mutation is now added to the PostRA MachineScheduler in case the subtarget supports any kind of fusion. I think that makes sense because if the PostRA MachineScheduler is run, there is potential that instructions scheduled back to back are re-scheduled. Reviewers: evandro, t.p.northover, joelkevinjones, joel_k_jones, steleman Reviewed By: joelkevinjones Subscribers: joel_k_jones, aemerson, rengolin, javed.absar, kristof.beyls, llvm-commits Differential Revision: https://reviews.llvm.org/D34958 llvm-svn: 307842
* [WebAssembly] Mark element atomic memcpy/memmove intrinsics as unsupportedHeejin Ahn2017-07-121-11/+10
| | | | | | | | | | | | | | | | Summary: Element atomic intrinsicAtomic instructions are not yet supported in WebAssembly, so we mark them as unsupported for the moment. Reviewers: sunfish, dschuff, sbc100 Reviewed By: dschuff, sbc100 Subscribers: jfb, sbc100, jgravelle-google Differential Revision: https://reviews.llvm.org/D35322 llvm-svn: 307841
* Remove unneeded use of #undef DEBUG_TYPE. NFCSam Clegg2017-07-124-9/+12
| | | | | | | | | | | Where is is needed (at the end of headers that define it), be consistent about its use. Also fix a few header guards that I found in the process. Differential Revision: https://reviews.llvm.org/D34916 llvm-svn: 307840
* [LV] Don't allow outside uses of IVs if the SCEV is predicated on loop ↵Michael Kuperstein2017-07-121-2/+7
| | | | | | | | | conditions. This fixes PR33706. Differential Revision: https://reviews.llvm.org/D35227 llvm-svn: 307837
* [mips][mt][6/7] Add support for mftr, mttr instructions.Simon Dardis2017-07-126-0/+372
| | | | | | | | | | | | | | | | | Unlike many other instructions, these instructions have aliases which take coprocessor registers, gpr register, accumulator (and dsp accumulator) registers, floating point registers, floating point control registers and coprocessor 2 data and control operands. For the moment, these aliases are treated as pseudo instructions which are expanded into the underlying instruction. As a result, disassembling these instructions shows the underlying instruction and not the alias. Reviewers: slthakur, atanasyan Differential Revision: https://reviews.llvm.org/D35253 llvm-svn: 307836
* Fix non-Windows build after PDB native builtin type changeReid Kleckner2017-07-122-6/+8
| | | | | | Some C++14 features slipped in along with an extra member qualification. llvm-svn: 307835
* [PDB] Enable NativeSession to create symbols for built-in types on demandAdrian McCarthy2017-07-126-5/+108
| | | | | | | | | | | | | | | | Summary: There is a reserved range of type indexes for built-in types (like integers). This will create a symbol for a built-in type if the caller askes for one by type index. This is also plumbing for being able to recall symbols by type index in general, but user-defined types will come in subsequent patches. Reviewers: rnk, zturner Subscribers: mgorny, hiraditya, llvm-commits Differential Revision: https://reviews.llvm.org/D35163 llvm-svn: 307834
* Fix to web assembly lib call listDaniel Neilson2017-07-121-0/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: Revision 307796 caused an internal build break in WebAssembly bots in the form of a crash. ex: Here's the crash dump from one of the failing tests: /usr/local/google/home/blaikie/dev/llvm/build/default/./bin/llc < /usr/local/google/home/blaikie/dev/llvm/src/test/CodeGen/WebAssembly/global.ll -asm-verbose=false -disable-wasm-fallthrough-return-opt -disable-wasm-explicit-locals | /usr/local/google/home/blaikie/dev/llvm/build/default/./bin/FileCheck /usr/local/google/home/blaikie/dev/llvm/src/test/CodeGen/WebAssembly/global.ll -- Exit Code: 2 Command Output (stderr): -- Stack dump: 0. Program arguments: build/default/./bin/llc -asm-verbose=false -disable-wasm-fallthrough-return-opt -disable-wasm-explicit-locals 1. Running pass 'Function Pass Manager' on module '<stdin>'. 2. Running pass 'WebAssembly Assembly Printer' on function '@call_memcpy' FileCheck error: '-' is empty. FileCheck command line: build/default/./bin/FileCheck src/test/CodeGen/WebAssembly/global.ll The problem is in lib/Target/WebAssembly/WebAssemblyRuntimeLibcallSignatures.cpp. There’s an array declared: 545 static const char * Fix to web assembly lib call list Summary: Revision 307796 caused an internal build break in WebAssembly bots in the form of a crash. ex: Here's the crash dump from one of the failing tests: /usr/local/google/home/blaikie/dev/llvm/build/default/./bin/llc < /usr/local/google/home/blaikie/dev/llvm/src/test/CodeGen/WebAssembly/global.ll -asm-verbose=false -disable-wasm-fallthrough-return-opt -disable-wasm-explicit-locals | /usr/local/google/home/blaikie/dev/llvm/build/default/./bin/FileCheck /usr/local/google/home/blaikie/dev/llvm/src/test/CodeGen/WebAssembly/global.ll -- Exit Code: 2 Command Output (stderr): -- Stack dump: 0. Program arguments: build/default/./bin/llc -asm-verbose=false -disable-wasm-fallthrough-return-opt -disable-wasm-explicit-locals 1. Running pass 'Function Pass Manager' on module '<stdin>'. 2. Running pass 'WebAssembly Assembly Printer' on function '@call_memcpy' FileCheck error: '-' is empty. FileCheck command line: build/default/./bin/FileCheck src/test/CodeGen/WebAssembly/global.ll The problem is in lib/Target/WebAssembly/WebAssemblyRuntimeLibcallSignatures.cpp. There’s an array declared: static const char * RuntimeLibcallNames[RTLIB::UNKNOWN_LIBCALL] = { That is defining a runtime lib call name for each entry in the enum RTLIB:Libcall from include/llvm/CodeGen/RuntimeLibcalls.h. Revision 307796 added entries to the enum, but didn’t add entries to the RuntimeLibcallNames array, which caused a crash when attempting to access past the end of the array. This patch fixes the issue by adding the element atomic memmove to the WebAssembly arrays. Reviewed by: reames llvm-svn: 307831
* [LoopRotate] Fix DomTree update logic for unreachable nodes. Fix PR33701.Jakub Kuderski2017-07-121-4/+16
| | | | | | | | | | | | | | | | | | | Summary: LoopRotate manually updates the DoomTree by iterating over all predecessors of a basic block and computing the Nearest Common Dominator. When a predecessor happens to be unreachable, `DT.findNearestCommonDominator` returns nullptr. This patch teaches LoopRotate to handle this case and fixes [[ https://bugs.llvm.org/show_bug.cgi?id=33701 | PR33701 ]]. In the future, LoopRotate should be taught to use the new incremental API for updating the DomTree. Reviewers: dberlin, davide, uabelho, grosser Subscribers: efriedma, mzolotukhin Differential Revision: https://reviews.llvm.org/D35074 llvm-svn: 307828
* Use std::mutex to avoid memory allocation after OOMReid Kleckner2017-07-121-13/+18
| | | | | | | | | | | | | | | ManagedStatic<sys::Mutex> would lazilly allocate a sys::Mutex to lock when reporting an OOM, which is a bad idea. The three STL implementations that I know of use pthread_mutex_lock and EnterCriticalSection to implement std::mutex. I'm pretty sure that neither of those allocate heap memory. It seems that we unconditionally use std::mutex without testing LLVM_ENABLE_THREADS elsewhere in the codebase, so this should be portable. llvm-svn: 307827
* [libFuzzer] Add a dependency on symbolizer from libFuzzer testsGeorge Karpenkov2017-07-121-1/+1
| | | | | | | | | Some libFuzzer tests on Linux would fail with bizarre error messages unless llvm-symbolizer binary is present. Differential Revision: https://reviews.llvm.org/D35313 llvm-svn: 307826
* [libFuzzer] NFC Declare LIBFUZZER_FLAGS_BASE outside of an if-blockGeorge Karpenkov2017-07-121-1/+1
| | | | | | | | | | | The current code relies on the assumption that tests are included only if LLVM_USE_SANITIZE_COVERAGE is enabled. This commit makes it easier to relax the assumption in the future, as the variable LIBFUZZER_FLAGS_BASE is used further in libFuzzer tests. Differential Revision: https://reviews.llvm.org/D35314 llvm-svn: 307825
* [libFuzzer] Do not use LLVM ostream in testsGeorge Karpenkov2017-07-121-0/+3
| | | | | | Differential Revision: https://reviews.llvm.org/D35312 llvm-svn: 307824
* [x86] improve SBB optimizations for SETB/SETA with subtractSanjay Patel2017-07-121-26/+33
| | | | | | | | | | | | | | This is another step towards removing a combine that turns sext into select of constants and preparing the backend for an IR future where select is the canonical form. Earlier commits in this area: https://reviews.llvm.org/rL306040 https://reviews.llvm.org/rL306072 https://reviews.llvm.org/rL307404 (https://reviews.llvm.org/D34652) https://reviews.llvm.org/rL307471 llvm-svn: 307821
* GlobalISel: Handle selection of G_IMPLICIT_DEF in AArch64Justin Bogner2017-07-121-0/+3
| | | | | | | | A generic variant of IMPLICIT_DEF was added in r306875, but this survives to selection and hits a `Cannot Select`. Add handling that converts the note to a regular IMPLICIT_DEF. llvm-svn: 307817
* [mips][mt][5/7] Add support for fork and yield instructions.Simon Dardis2017-07-124-2/+65
| | | | | | | | Reviewers: slthakur, atanasyan Differential Revision: https://reviews.llvm.org/D35252 llvm-svn: 307808
* [CodeGen] Add dependency printerEvandro Menezes2017-07-121-35/+56
| | | | | | | | Add SDep printer to make debugging sessions more productive. Differential revision: https://reviews.llvm.org/D35144 llvm-svn: 307799
* [X86/FastIsel] Fall-back to SelectionDAG when lowering soft-floats.Davide Italiano2017-07-121-0/+3
| | | | | | | | | | FastIsel can't handle them, so we would end up crashing during register class selection. Fixes PR26522. Differential Revision: https://reviews.llvm.org/D35272 llvm-svn: 307797
* Add element atomic memmove intrinsicDaniel Neilson2017-07-123-0/+101
| | | | | | | | | | | | | | Summary: Continuing the work from https://reviews.llvm.org/D33240, this change introduces an element unordered-atomic memmove intrinsic. This intrinsic is essentially memmove with the implementation requirement that all loads/stores used for the copy are done with unordered-atomic loads/stores of a given element size. Reviewers: eli.friedman, reames, mkazantsev, skatkov Reviewed By: reames Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D34884 llvm-svn: 307796
* [mips][mt][4/7] Add IAS support for dvpe, evpe instructions.Simon Dardis2017-07-124-5/+28
| | | | | | | | Reviewers: slthakur, atanasyan Differential Revision: https://reviews.llvm.org/D35251 llvm-svn: 307793
* [ARM] Adjust ifcvt heuristic for the diamond ifcvt caseJohn Brawn2017-07-121-0/+3
| | | | | | | | | When we have a diamond ifcvt the fallthough block will have a branch at the end of it that disappears when predicated, so discount it from the predication cost. Differential Revision: https://reviews.llvm.org/D34952 llvm-svn: 307788
* [mips][mt] Add missing files from last commitSimon Dardis2017-07-122-0/+104
| | | | llvm-svn: 307779
* [mips][mt][3/7] Add IAS support for emt, dmt instructions.Simon Dardis2017-07-124-2/+21
| | | | | | | | Reviewers: slthakur, atanasyan Differential Revision: https://reviews.llvm.org/D35250 llvm-svn: 307774
* [Linker] Add directives to support mixing ARM/Thumb module-level inline asm.Florian Hahn2017-07-121-2/+16
| | | | | | | | | | | | | | | | | | | | | | Summary: By prepending `.text .thumb .balign 2` to the module-level inline assembly from a Thumb module, the assembler will generate the assembly from that module as Thumb, even if the destination module uses an ARM triple. Similar directives are used for module-level inline assembly in ARM modules. The alignment and instruction set are reset based on the target triple before emitting the first function label. Reviewers: olista01, tejohnson, echristo, t.p.northover, rafael Reviewed By: echristo Subscribers: aemerson, javed.absar, eraman, kristof.beyls, llvm-commits Differential Revision: https://reviews.llvm.org/D34622 llvm-svn: 307772
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