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| author | Simon Pilgrim <llvm-dev@redking.me.uk> | 2017-07-13 09:36:04 +0000 |
|---|---|---|
| committer | Simon Pilgrim <llvm-dev@redking.me.uk> | 2017-07-13 09:36:04 +0000 |
| commit | 5ee68bcc2221fb78f88cf54f8e7c5bde4fd7fc63 (patch) | |
| tree | 71f2c9a7d81246aaec615b977b66770e5aa51dc6 /llvm/lib | |
| parent | 6860a60c075307c5235cee074fe65ebdca58d271 (diff) | |
| download | bcm5719-llvm-5ee68bcc2221fb78f88cf54f8e7c5bde4fd7fc63.tar.gz bcm5719-llvm-5ee68bcc2221fb78f88cf54f8e7c5bde4fd7fc63.zip | |
Fix whitespace indentation. NFCI.
llvm-svn: 307894
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/X86/X86ISelLowering.cpp | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index ad3f4123c34..65486cf7f52 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -29635,8 +29635,8 @@ static SDValue combineBasicSADPattern(SDNode *Extract, SelectionDAG &DAG, // (extends the sign bit which is zero). // So it is correct to skip the sign/zero extend instruction. if (Root && (Root.getOpcode() == ISD::SIGN_EXTEND || - Root.getOpcode() == ISD::ZERO_EXTEND || - Root.getOpcode() == ISD::ANY_EXTEND)) + Root.getOpcode() == ISD::ZERO_EXTEND || + Root.getOpcode() == ISD::ANY_EXTEND)) Root = Root.getOperand(0); // If there was a match, we want Root to be a select that is the root of an |
