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* Add patterns for unaligned load and store instructions and enable theAkira Hatanaka2011-10-082-46/+76
| | | | | | instruction selector to generate them. llvm-svn: 141471
* Add an extra safety check in front of the optimization in r141442.Andrew Trick2011-10-081-0/+9
| | | | llvm-svn: 141470
* Use the code that lowers the arguments and spills any values which are aliveBill Wendling2011-10-081-2/+125
| | | | | | | | across unwind edges. This is for the back-end which expects such things. The code is from the original SjLj EH pass. llvm-svn: 141463
* Object: Add support for opening stdin.Michael J. Spencer2011-10-081-1/+1
| | | | llvm-svn: 141449
* Object: constize Archive.Michael J. Spencer2011-10-081-2/+2
| | | | llvm-svn: 141448
* ARM NEON assembly parsing and encoding for VDUP(scalar).Jim Grosbach2011-10-075-14/+173
| | | | llvm-svn: 141446
* LSR should only reuse phis that match its formula.Andrew Trick2011-10-072-61/+114
| | | | | | Fixes rdar://problem/5064068 llvm-svn: 141442
* Fix APInt::operator*= so that it computes the correct result for large ↵Eli Friedman2011-10-072-2/+3
| | | | | | integers where there is unsigned overflow. Fix APFloat::toString so that it doesn't depend on the incorrect behavior in common cases (and computes the correct result in some rare cases). Fixes PR11086. llvm-svn: 141441
* Don't emit the symbol table entry for the .symtab_shndx section either.Nick Lewycky2011-10-071-1/+2
| | | | llvm-svn: 141440
* Remove extraneous curlies. No functionality change.Nick Lewycky2011-10-071-2/+1
| | | | llvm-svn: 141439
* ARM prefix asmparser operand kind enums for readability.Jim Grosbach2011-10-071-172/+172
| | | | llvm-svn: 141438
* Take all of the invoke basic blocks and make the dispatch basic block their newBill Wendling2011-10-071-4/+28
| | | | | | | | | | | successor. Remove the old landing pad from their successor list, because it's now the successor of the dispatch block. Now that the landing pad blocks are no longer the destination of invokes, we can mark them as normal basic blocks instead of landing pads. This more closely resembles what the CFG is actually doing. llvm-svn: 141436
* Take the code that was emitted for the llvm.eh.dispatch.setup intrinsic and emitBill Wendling2011-10-072-0/+52
| | | | | | | it with the new SjLj emitter stuff. This way there's no need to emit that kind-of-hacky intrinsic. llvm-svn: 141419
* Thread the chain through the eh.sjlj.setjmp intrinsic, like it's documented toBill Wendling2011-10-072-3/+10
| | | | | | do. This will be useful later on with the new SJLJ stuff. llvm-svn: 141416
* Don't emit a shstrtabindex in the reserved range. Spotted by inspection andNick Lewycky2011-10-071-1/+1
| | | | | | patch by Cary Coutant! llvm-svn: 141413
* Clarify/fix typo. No functionality change.Nick Lewycky2011-10-071-2/+2
| | | | llvm-svn: 141412
* Constrain both operands on MOVZX32_NOREXrr8.Jakob Stoklund Olesen2011-10-072-4/+7
| | | | | | | | | | | | This instruction is explicitly encoded without an REX prefix, so both operands but be *_NOREX. Also add an assertion to copyPhysReg() that fires when the MOV8rr_NOREX constraints are not satisfied. This fixes a miscompilation in 20040709-2 in the gcc test suite. llvm-svn: 141410
* Fix GCC again.Michael J. Spencer2011-10-071-1/+1
| | | | llvm-svn: 141389
* Change relocation API to be per section. This time without breaking GCC.Michael J. Spencer2011-10-074-157/+467
| | | | llvm-svn: 141385
* Improve ARM assembly parser diagnostic for unexpected tokens.Jim Grosbach2011-10-071-1/+2
| | | | | | | | | | | | | | | | | Consider: mov r8, r11 fred Previously, we issued the not very informative: x.s:6:1: error: unexpected token in argument list ^ Now we generate: x.s:5:14: error: unexpected token in argument list mov r8, r11 fred ^ llvm-svn: 141380
* Revert 141376 and 141377 due to breaking the build.Bill Wendling2011-10-074-466/+157
| | | | | | | | | | | | | | | | --- Reverse-merging r141377 into '.': U tools/llvm-objdump/MachODump.cpp --- Reverse-merging r141376 into '.': U include/llvm/Object/COFF.h U include/llvm/Object/ObjectFile.h U include/llvm-c/Object.h U tools/llvm-objdump/llvm-objdump.cpp U lib/Object/MachOObjectFile.cpp U lib/Object/COFFObjectFile.cpp U lib/Object/Object.cpp U lib/Object/ELFObjectFile.cpp llvm-svn: 141379
* Remove MultidefsDavid Greene2011-10-074-178/+2
| | | | | | | | | | | | | | | | | | | Multidefs are a bit unwieldy and incomplete. Remove them in favor of another mechanism, probably for loops. Revert "Make Test More Thorough" Revert "Fix a typo." Revert "Vim Support for Multidefs" Revert "Emacs Support for Multidefs" Revert "Document Multidefs" Revert "Add a Multidef Test" Revert "Update Test for Multidefs" Revert "Process Multidefs" Revert "Parser Multidef Support" Revert "Lexer Support for Multidefs" Revert "Add Multidef Data Structures" llvm-svn: 141378
* Change relocation API to be per section.Michael J. Spencer2011-10-074-157/+466
| | | | llvm-svn: 141376
* High bits of movmskp{s|d} and pmovmskb are known zero. rdar://10247336Evan Cheng2011-10-071-0/+27
| | | | llvm-svn: 141371
* Reenable tail calls for iOS 5.0 and later.Bob Wilson2011-10-073-2/+11
| | | | llvm-svn: 141370
* Reenable use of divmod compiler_rt functions for iOS 5.0 and later.Bob Wilson2011-10-071-0/+7
| | | | llvm-svn: 141368
* Move default to top of switchMatt Beaumont-Gay2011-10-071-6/+4
| | | | llvm-svn: 141366
* Peephole optimization for ABS on ARM.Anton Korobeynikov2011-10-074-0/+162
| | | | | | Patch by Ana Pazos! llvm-svn: 141365
* Teach GVN to also propagate switch cases. For example, in this codeDuncan Sands2011-10-071-31/+59
| | | | | | | | | | | | | | switch (n) { case 27: do_something(x); ... } the call do_something(x) will be replaced with do_something(27). In gcc-as-one-big-file this results in the removal of about 500 lines of bitcode (about 0.02%), so has about 1/10 of the effect of propagating branch conditions. llvm-svn: 141360
* Add X86 disassembler support for RDFSBASE, RDGSBASE, WRFSBASE, and WRGSBASE.Craig Topper2011-10-071-0/+23
| | | | llvm-svn: 141358
* PostRA scheduler fix. Clear stale loop dependencies.Andrew Trick2011-10-072-1/+3
| | | | | | Fixes <rdar://problem/10235725> llvm-svn: 141357
* whitespaceAndrew Trick2011-10-072-3/+3
| | | | llvm-svn: 141356
* Add X86 disassembler support for XSAVE, XRSTOR, and XSAVEOPT.Craig Topper2011-10-071-0/+15
| | | | llvm-svn: 141354
* Revert part of r141274. Only need to change encoding for xchg %eax, %eax in ↵Craig Topper2011-10-072-21/+16
| | | | | | 64-bit mode. This is because in 64-bit mode xchg %eax, %eax implies zeroing the upper 32-bits of RAX which makes it not a NOP. In 32-bit mode using NOP encoding is fine. llvm-svn: 141353
* Use the correct vreg here.Bill Wendling2011-10-061-1/+1
| | | | llvm-svn: 141342
* Generate the dispatch code for a 'thumb' function. This is very similar to theBill Wendling2011-10-061-2/+53
| | | | | | | others. They take the call site value. Determine if it's a proper value. And then jumps to the correct call site via a jump table. llvm-svn: 141341
* Fix the check for nested IT instructions in the disassembler. We need to ↵Owen Anderson2011-10-061-3/+6
| | | | | | perform the check before adding the Thumb predicate, which pops on entry off the ITBlock queue. llvm-svn: 141339
* Remove the old atomic instrinsics. autoupgrade functionality is included ↵Eli Friedman2011-10-066-189/+92
| | | | | | with this patch. llvm-svn: 141333
* Generate the dispatch table for ARM mode.Bill Wendling2011-10-061-29/+71
| | | | llvm-svn: 141327
* Refactor some of the code that sets up the entry block for SjLj EH. No ↵Bill Wendling2011-10-062-79/+105
| | | | | | functionality change. llvm-svn: 141323
* Use a thumb ORR instead of thumb2 ORR when in thumb-only mode. (Picky! Picky!)Bill Wendling2011-10-061-7/+12
| | | | | | Place the immediate to OR into a register so that it works. llvm-svn: 141319
* * Set the low bit of the return address when we are in thumb mode.Bill Wendling2011-10-061-73/+90
| | | | | | * Some code cleanup. llvm-svn: 141317
* Fix List-of-List ProcessingDavid Greene2011-10-061-1/+3
| | | | | | | | | Fix VarListElementInit::resolveListElementReference to return a partially resolved VarListElementInint in the case where full resolution is not possible. This allows TableGen to make forward progress resolving certain complex list expressions. llvm-svn: 141315
* Fix -asserts buildMatt Beaumont-Gay2011-10-061-0/+2
| | | | llvm-svn: 141313
* PTX: Implement signed divisionJustin Holewinski2011-10-061-5/+34
| | | | llvm-svn: 141306
* Use StringSwitch.Benjamin Kramer2011-10-061-19/+21
| | | | llvm-svn: 141305
* Simplify code. No functionality change.Benjamin Kramer2011-10-061-26/+24
| | | | llvm-svn: 141299
* Fix TypoDavid Greene2011-10-061-1/+1
| | | | | | Compare the entire keyword string. llvm-svn: 141295
* Don't require C bindings opcode numbers to be kept in sync.Torok Edwin2011-10-061-3/+28
| | | | | | | | They are not in sync now, for example Bitcast would show up as LLVMCall. So instead introduce 2 functions that map to and from the opcodes in the C bindings. llvm-svn: 141290
* ocaml/C bindings: type->isSized()Torok Edwin2011-10-061-0/+5
| | | | llvm-svn: 141288
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