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* Call generateCompactUnwindEncodings() right before we need to output the ↵Bill Wendling2013-09-096-18/+18
| | | | | | | | | | | | | frame information. There are more than one paths to where the frame information is emitted. Place the call to generateCompactUnwindEncodings() into the method which outputs the frame information, thus ensuring that the encoding is there for every path. This involved threading the MCAsmBackend object through to this method. <rdar://problem/13623355> llvm-svn: 190335
* Debug Info: Use DIScopeRef for DIType::getContext.Manman Ren2013-09-095-12/+20
| | | | | | | | | | | | | | | | | In DIBuilder, the context field of a TAG_member is updated to use the scope reference. Verifier is updated accordingly. DebugInfoFinder now needs to generate a type identifier map to have access to the actual scope. Same applies for BreakpointPrinter. processModule of DebugInfoFinder is called during initialization phase of the verifier to make sure the type identifier map is constructed early enough. We are now able to unique a simple class as demonstrated by the added testing case. llvm-svn: 190334
* Debug Info: move DIScope::getContext to DwarfDebug.Manman Ren2013-09-094-28/+31
| | | | | | | | | | | | DIScope::getContext is a wrapper function that calls the specific getContext method on each subclass. When we switch DIType::getContext to return DIScopeRef instead of DIScope, DIScope::getContext can no longer return a DIScope without a type identifier map. DIScope::getContext is only used by DwarfDebug, so we move it to DwarfDebug to have easy access to the type identifier map. llvm-svn: 190330
* Revert patches to add case-range support for PR1255.Bob Wilson2013-09-0912-269/+167
| | | | | | | | | | | | | | | | | The work on this project was left in an unfinished and inconsistent state. Hopefully someone will eventually get a chance to implement this feature, but in the meantime, it is better to put things back the way the were. I have left support in the bitcode reader to handle the case-range bitcode format, so that we do not lose bitcode compatibility with the llvm 3.3 release. This reverts the following commits: 155464, 156374, 156377, 156613, 156704, 156757, 156804 156808, 156985, 157046, 157112, 157183, 157315, 157384, 157575, 157576, 157586, 157612, 157810, 157814, 157815, 157880, 157881, 157882, 157884, 157887, 157901, 158979, 157987, 157989, 158986, 158997, 159076, 159101, 159100, 159200, 159201, 159207, 159527, 159532, 159540, 159583, 159618, 159658, 159659, 159660, 159661, 159703, 159704, 160076, 167356, 172025, 186736 llvm-svn: 190328
* Debug Info: Move isSubprogramContext from DebugInfo to DwarfDebug.Manman Ren2013-09-094-14/+18
| | | | | | | | | | This helper function needs the type identifier map when we switch DIType::getContext to return DIScopeRef instead of DIScope. Since isSubprogramContext is used by DwarfDebug only, We move it to DwarfDebug to have easy access to the map. llvm-svn: 190325
* Debug Info: Rename DITypeRef to DIScopeRef.Manman Ren2013-09-093-29/+35
| | | | | | | | | | | | | | | | | | | | | | A reference to a scope is more general than a reference to a type since DIType is a subclass of DIScope. A reference to a type can be either an identifier for the type or the DIType itself, while a reference to a scope can be either an identifier for the type (when the scope is indeed a type) or the DIScope itself. A reference to a type and a reference to a scope will be resolved in the same way. The only difference is in the verifier when a field is a reference to a type (i.e. the containing type field of a DICompositeType) or a field is a reference to a scope (i.e. the context field of a DIType). This is to get ready for switching DIType::getContext to return DIScopeRef instead of DIScope. Tighten up isTypeRef and isScopeRef to make sure the identifier is not empty and the MDNode is DIType for TypeRef and DIScope for ScopeRef. llvm-svn: 190322
* Debug Info: Update isScope to make sure DIType is a scope andManman Ren2013-09-091-1/+2
| | | | | | TAG_file_type is also a scope. llvm-svn: 190321
* [mips] When double precision loads and stores are split into two i32 loads andAkira Hatanaka2013-09-091-3/+3
| | | | | | | stores, make sure the load or store that accesses the higher half does not have an alignment that is larger than the offset from the original address. llvm-svn: 190318
* [stackprotector] Modernize code with IRBuilderBenjamin Kramer2013-09-091-32/+17
| | | | llvm-svn: 190317
* [ARMv8] Prevent generation of deprecated IT blocks on ARMv8 in Thumb mode.Joey Gouly2013-09-095-57/+139
| | | | | | | | | IT blocks can only be one instruction lonf, and can only contain a subset of the 16 instructions. Patch by Artyom Skrobov! llvm-svn: 190309
* A better way to silence the warning in MSVC (replaces r190304).Aaron Ballman2013-09-091-2/+1
| | | | llvm-svn: 190308
* Silencing a warning about control flow reaching the end of a non-void function.Aaron Ballman2013-09-091-0/+1
| | | | llvm-svn: 190304
* XCore handling of thread local loweringRobert Lytton2013-09-091-9/+94
| | | | | | | | | | | Fix XCoreLowerThreadLocal trying to initialise globals which have no initializer. Add handling of const expressions containing thread local variables. These need to be replaced with instructions, as the thread ID is used to access the thread local variable. llvm-svn: 190300
* XCore target: change to Sched::SourceRobert Lytton2013-09-091-1/+1
| | | | | | | This sidesteps a bug in PrescheduleNodesWithMultipleUses() which does not check if callResources will be affected by the transformation. llvm-svn: 190299
* XCore target: fix weak linkage attribute handlingRobert Lytton2013-09-091-1/+0
| | | | llvm-svn: 190298
* Generate compact unwind encoding from CFI directives.Bill Wendling2013-09-0919-345/+419
| | | | | | | | | | | | | | | We used to generate the compact unwind encoding from the machine instructions. However, this had the problem that if the user used `-save-temps' or compiled their hand-written `.s' file (with CFI directives), we wouldn't generate the compact unwind encoding. Move the algorithm that generates the compact unwind encoding into the MCAsmBackend. This way we can generate the encoding whether the code is from a `.ll' or `.s' file. <rdar://problem/13623355> llvm-svn: 190290
* Implement aarch64 neon instruction set AdvSIMD (3V Diff), covering the ↵Jiangning Liu2013-09-092-1/+696
| | | | | | | | following 26 instructions, SADDL, UADDL, SADDW, UADDW, SSUBL, USUBL, SSUBW, USUBW, ADDHN, RADDHN, SABAL, UABAL, SUBHN, RSUBHN, SABDL, UABDL, SMLAL, UMLAL, SMLSL, UMLSL, SQDMLAL, SQDMLSL, SMULL, UMULL, SQDMULL, PMULL llvm-svn: 190288
* Revert r190269 to fix dragonegg failures.Manman Ren2013-09-081-1/+1
| | | | llvm-svn: 190271
* Debug Info: use null instead of "i32 0" in DIBuilder.Manman Ren2013-09-081-13/+5
| | | | | | For context field of subroutine_type and when creating artificial types. llvm-svn: 190270
* Debug Info: pass in DIScope instead of DIDescriptor in createMemberType.Manman Ren2013-09-081-1/+1
| | | | | | Improve readability. No functionality change. llvm-svn: 190269
* Add neverHasSideEffects=1 on a couple move instructions.Craig Topper2013-09-082-2/+2
| | | | llvm-svn: 190259
* Using popcount should check the popcount feature flag not the SSE41 feature ↵Craig Topper2013-09-081-2/+2
| | | | | | flag. llvm-svn: 190258
* [mips] Enhance command line option "-mno-ldc1-sdc1" to expand base+index doubleAkira Hatanaka2013-09-076-74/+84
| | | | | | | | | | precision loads and stores as well as reg+imm double precision loads and stores. Previously, expansion of loads and stores was done after register allocation, but now it takes place during legalization. As a result, users will see double precision stores and loads being emitted to spill and restore 64-bit FP registers. llvm-svn: 190235
* [mips] Place parentheses around && to silence warning.Akira Hatanaka2013-09-071-3/+3
| | | | llvm-svn: 190234
* Remove verifier check that attribute 'builtin' is only applied to calls toRichard Smith2013-09-071-8/+0
| | | | | | | | functions marked 'nobuiltin'. That approach doesn't play well with LTO, and there's no harm in marking a call as 'builtin' if it was going to be a builtin regardless. llvm-svn: 190233
* [mips] Add definition of instruction "drotr32" (double rotate right plus 32).Akira Hatanaka2013-09-072-0/+5
| | | | llvm-svn: 190232
* Debug Info: Use identifier to reference DIType in containing type field ofManman Ren2013-09-073-3/+3
| | | | | | | | a DISubprogram. Verifier is updated accordingly. llvm-svn: 190229
* [mips] Use uimm5 and uimm6 instead of shamt and imm, if the immediate has to fitAkira Hatanaka2013-09-076-46/+41
| | | | | | into a 5-bit or 6-bit field. llvm-svn: 190226
* Debug Info: pass in VTableHolder as DIType instead of MDNode *.Manman Ren2013-09-061-5/+5
| | | | | | Remove one cast and improve readability. No functionality change. llvm-svn: 190225
* [mips] Define "trap" as a pseudo instruction that turns into "break 0, 0".Akira Hatanaka2013-09-062-3/+11
| | | | llvm-svn: 190224
* [mips] Delete unused classes and defs.Akira Hatanaka2013-09-061-9/+1
| | | | llvm-svn: 190221
* [mips] Make "b" (unconditional branch) a pseudo. "b" is an assembly idiom, ↵Akira Hatanaka2013-09-064-16/+13
| | | | | | | | which is equivalent to "beq $zero, $zero, offset". llvm-svn: 190220
* [mips] Set instruction itineraries of loads, stores and conditional moves.Akira Hatanaka2013-09-063-33/+35
| | | | llvm-svn: 190219
* TBAA: add isTBAAVtableAccess to MDNode so clients can call the functionManman Ren2013-09-062-6/+21
| | | | | | | | | | | | | instead of having its own implementation. The implementation of isTBAAVtableAccess is in TypeBasedAliasAnalysis.cpp since it is related to the format of TBAA metadata. The path for struct-path tbaa will be exercised by test/Instrumentation/ThreadSanitizer/read_from_global.ll, vptr_read.ll, and vptr_update.ll when struct-path tbaa is on by default. llvm-svn: 190216
* R600: Add support for LDS atomic subtractAaron Watry2013-09-063-0/+13
| | | | | | Signed-off-by: Aaron Watry <awatry@gmail.com> Reviewed-by: Tom Stellard <thomas.stellard@amd.com> llvm-svn: 190200
* Debug Info: Use identifier to reference DIType in containing type field ofManman Ren2013-09-063-5/+5
| | | | | | | | a DICompositeType. Verifier is updated accordingly. llvm-svn: 190190
* Debug Info: Move a helper function getTypeIdentifier from DIBuilder to be partManman Ren2013-09-062-13/+12
| | | | | | | | | | | of DIType. Implement DIType::generateRef to return a type reference. This function will be used in setContaintingType and in DIBuilder to generete the type reference. No functionality change. llvm-svn: 190188
* mi-sched: cleanup register pressure update, remove a FIXME.Andrew Trick2013-09-061-19/+26
| | | | llvm-svn: 190181
* mi-sched: improve regpressure tracing.Andrew Trick2013-09-061-2/+7
| | | | llvm-svn: 190180
* mi-sched: print tree size in -view-misched-dagsAndrew Trick2013-09-061-1/+5
| | | | llvm-svn: 190179
* mi-sched: register pressure update tracing.Andrew Trick2013-09-061-0/+4
| | | | llvm-svn: 190178
* mi-sched: Reorder Cyclicpath (latency) and CriticalMax (pressure) heuristics.Andrew Trick2013-09-061-4/+4
| | | | | | The latency based scheduling could induce spills in some cases. llvm-svn: 190177
* Added MachineSchedPolicy.Andrew Trick2013-09-061-35/+51
| | | | | | | | Allow subtargets to customize the generic scheduling strategy. This is convenient for targets that don't need to add new heuristics by specializing the strategy. llvm-svn: 190176
* avoid unnecessary direct access to LiveInterval::rangesMatthias Braun2013-09-063-31/+30
| | | | llvm-svn: 190170
* remove unused argument from LiveRanges::join()Matthias Braun2013-09-062-4/+2
| | | | llvm-svn: 190169
* remove pointless assertMatthias Braun2013-09-061-2/+0
| | | | | | The if above it ensures the property anyway. llvm-svn: 190168
* fix commentMatthias Braun2013-09-061-1/+1
| | | | | | There's no 'B3' in the example. llvm-svn: 190167
* [mips][msa] IndentationDaniel Sanders2013-09-061-34/+34
| | | | llvm-svn: 190156
* [mips][msa] Requires<[HasMSA]> is redundant, it is also supplied via inheritanceDaniel Sanders2013-09-061-628/+628
| | | | | | | Tested with 'llvm-tblgen -print-records' which outputs identical records before and after this patch. llvm-svn: 190155
* This patch adds support for microMIPS Multiply and Add/Sub instructions. ↵Vladimir Medic2013-09-062-5/+11
| | | | | | Test cases are included in patch. llvm-svn: 190154
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