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| author | Andrew Trick <atrick@apple.com> | 2013-09-06 17:32:44 +0000 |
|---|---|---|
| committer | Andrew Trick <atrick@apple.com> | 2013-09-06 17:32:44 +0000 |
| commit | c573cd905aac879a83c98392035f176e5524946b (patch) | |
| tree | 6d2a2c8d4180567a486cfbd18fe3b479f51f67b5 /llvm/lib | |
| parent | 7609b7d1b58810b45169adca6864669a247e313d (diff) | |
| download | bcm5719-llvm-c573cd905aac879a83c98392035f176e5524946b.tar.gz bcm5719-llvm-c573cd905aac879a83c98392035f176e5524946b.zip | |
mi-sched: improve regpressure tracing.
llvm-svn: 190180
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/CodeGen/MachineScheduler.cpp | 9 |
1 files changed, 7 insertions, 2 deletions
diff --git a/llvm/lib/CodeGen/MachineScheduler.cpp b/llvm/lib/CodeGen/MachineScheduler.cpp index 274fb0ef94b..618586425f1 100644 --- a/llvm/lib/CodeGen/MachineScheduler.cpp +++ b/llvm/lib/CodeGen/MachineScheduler.cpp @@ -566,7 +566,8 @@ updateScheduledPressure(const std::vector<unsigned> &NewMaxPressure) { unsigned Limit = RegClassInfo->getRegPressureSetLimit(i); if (NewMaxPressure[i] > Limit ) { dbgs() << " " << TRI->getRegPressureSetName(i) << ": " - << NewMaxPressure[i] << " > " << Limit << "\n"; + << NewMaxPressure[i] << " > " << Limit << "(+ " + << BotRPTracker.getLiveThru()[i] << " livethru)\n"; } }); } @@ -2454,6 +2455,10 @@ void ConvergingScheduler::tryCandidate(SchedCandidate &Cand, } } } + DEBUG(if (TryCand.RPDelta.Excess.isValid()) + dbgs() << " SU(" << TryCand.SU->NodeNum << ") " + << TRI->getRegPressureSetName(TryCand.RPDelta.Excess.getPSet()) + << ":" << TryCand.RPDelta.Excess.getUnitInc() << "\n"); // Initialize the candidate if needed. if (!Cand.isValid()) { @@ -2614,7 +2619,7 @@ void ConvergingScheduler::traceCandidate(const SchedCandidate &Cand) { } #endif -/// Pick the best candidate from the top queue. +/// Pick the best candidate from the queue. /// /// TODO: getMaxPressureDelta results can be mostly cached for each SUnit during /// DAG building. To adjust for the current scheduling location we need to |
