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* Add the framework for a dag-dag iselChris Lattner2005-12-174-2/+185
| | | | llvm-svn: 24769
* Remove a few lines of dead code.Evan Cheng2005-12-171-3/+0
| | | | llvm-svn: 24768
* asmprinter done, added crucial missing stepChris Lattner2005-12-171-3/+2
| | | | llvm-svn: 24767
* Use the AsmPrinter for global variable init printing. This eliminates aChris Lattner2005-12-171-209/+2
| | | | | | | bunch of code and causes V8 to start using the fancy .asciz directive that the sun assembler supports. llvm-svn: 24766
* Switch constant pool printing over to use the Shared AsmPrinter versionChris Lattner2005-12-171-27/+10
| | | | llvm-svn: 24765
* Use the shared AsmPrinter code for some basic stuff. No functionalityChris Lattner2005-12-171-41/+14
| | | | | | change except for fewer .section directives emitted llvm-svn: 24764
* Added an idea about any_extend for performance tuning.Evan Cheng2005-12-171-0/+5
| | | | llvm-svn: 24763
* Convert the remaining instructions over, branches and calls. Fix a coupleChris Lattner2005-12-174-81/+49
| | | | | | minor bugs llvm-svn: 24762
* convert FP instructions to use an asmstring and operand list, allowing FPChris Lattner2005-12-172-28/+72
| | | | | | programs to work on V8 again llvm-svn: 24761
* Added truncate.Evan Cheng2005-12-171-0/+28
| | | | llvm-svn: 24760
* Added anyext, modelled as zext on X86.Evan Cheng2005-12-171-0/+5
| | | | llvm-svn: 24759
* Added some isel ideas.Evan Cheng2005-12-171-0/+14
| | | | llvm-svn: 24757
* Added support for cmp, test, and conditional move instructions.Evan Cheng2005-12-173-111/+327
| | | | llvm-svn: 24756
* Only lower SELECT when using DAG based isel.Evan Cheng2005-12-172-4/+8
| | | | llvm-svn: 24755
* X86 lowers SELECT to a cmp / test followed by a conditional move.Evan Cheng2005-12-173-1/+39
| | | | llvm-svn: 24754
* Added source file/line correspondence for dwarf (PowerPC only at this point.)Jim Laskey2005-12-167-5/+64
| | | | llvm-svn: 24748
* Weak and linkonce global vars should still have a .globl emitted for themChris Lattner2005-12-161-1/+2
| | | | llvm-svn: 24747
* Add a second vector type to the VRRC register class, and fix some patternsNate Begeman2005-12-162-6/+6
| | | | | | so that tablegen can infer all types. llvm-svn: 24746
* add some notesChris Lattner2005-12-161-0/+9
| | | | llvm-svn: 24745
* Add a couple more instrsChris Lattner2005-12-162-4/+8
| | | | llvm-svn: 24744
* remove some dead codeChris Lattner2005-12-161-22/+0
| | | | llvm-svn: 24743
* asmprint pseudo instrsChris Lattner2005-12-162-24/+10
| | | | llvm-svn: 24742
* Autogenerate asmprinter for F3_2 instructionsChris Lattner2005-12-163-127/+129
| | | | llvm-svn: 24741
* Switch F3_1 instructions over to use AsmStringsChris Lattner2005-12-163-111/+146
| | | | llvm-svn: 24740
* Plug in basic hooks for an autogenerated asm printer to fill in.Chris Lattner2005-12-162-14/+19
| | | | llvm-svn: 24739
* Add operand info for F3_[12] instructions, getting V8 back to basic ↵Chris Lattner2005-12-162-98/+198
| | | | | | | | | functionality. With this, Regression/CodeGen/SparcV8/basictest.ll now passes. Lets hear it for regression tests :) llvm-svn: 24738
* Remove JIT support, which doesn't work.Chris Lattner2005-12-165-295/+3
| | | | llvm-svn: 24736
* add some simple operand infoChris Lattner2005-12-161-7/+8
| | | | llvm-svn: 24735
* Update the darwin handling of linkonce & weak functions and GV stubs. ThisChris Lattner2005-12-161-57/+63
| | | | | | should work in all permutations. llvm-svn: 24728
* Don't globalize internal functionsChris Lattner2005-12-161-1/+2
| | | | llvm-svn: 24727
* * Promote all 1 bit entities to 8 bit.Evan Cheng2005-12-154-114/+9
| | | | | | | * Handling extload (1 bit -> 8 bit) and remove C++ code that handle 1 bit zextload. llvm-svn: 24726
* Don't create SEXTLOAD/ZEXTLOAD instructions that the target doesn't supportChris Lattner2005-12-151-2/+4
| | | | | | if after legalize. This fixes IA64 failures. llvm-svn: 24725
* Added frameindex, constpool, globaladdr, and externalsym as root nodes ofEvan Cheng2005-12-151-2/+3
| | | | | | leaaddr. llvm-svn: 24724
* Added constpool, frameindex, and externalsym nodes.Evan Cheng2005-12-151-3/+9
| | | | llvm-svn: 24723
* Handling zero extension of 1 bit value.Evan Cheng2005-12-151-17/+128
| | | | llvm-svn: 24722
* Use MOV8rm to load 1 bit value.Evan Cheng2005-12-151-0/+3
| | | | llvm-svn: 24721
* Remove a now unused statistic.Nate Begeman2005-12-141-1/+0
| | | | llvm-svn: 24720
* Use the new predicate support that Evan Cheng added to remove some codeNate Begeman2005-12-142-57/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | from the DAGToDAG cpp file. This adds pattern support for vector and scalar fma, which passes test/Regression/CodeGen/PowerPC/fma.ll, and does the right thing in the presence of -disable-excess-fp-precision. Allows us to match: void %foo(<4 x float> * %a) { entry: %tmp1 = load <4 x float> * %a; %tmp2 = mul <4 x float> %tmp1, %tmp1 %tmp3 = add <4 x float> %tmp2, %tmp1 store <4 x float> %tmp3, <4 x float> *%a ret void } As: _foo: li r2, 0 lvx v0, r2, r3 vmaddfp v0, v0, v0, v0 stvx v0, r2, r3 blr Or, with llc -disable-excess-fp-precision, _foo: li r2, 0 lvx v0, r2, r3 vxor v1, v1, v1 vmaddfp v1, v0, v0, v1 vaddfp v0, v1, v0 stvx v0, r2, r3 blr llvm-svn: 24719
* Fixed a typo: line 2323: MOVSX16rm8 -> MOVZX16rm8. This was the cause fo ↵Evan Cheng2005-12-141-1/+1
| | | | | | 12/14/2005 hbd failure. llvm-svn: 24717
* Added predicate !NoExcessFPPrecision to FMADD, FMADDS, FMSUB, and FMSUBS.Evan Cheng2005-12-141-4/+11
| | | | llvm-svn: 24716
* Added support to specify predicates.Evan Cheng2005-12-142-2/+17
| | | | llvm-svn: 24715
* Fixed extload type profile. The 4th operand is a ValueType node with typeEvan Cheng2005-12-141-2/+1
| | | | | | OtherVT, it cannot be compare to type of 1st operand which is an integer type. llvm-svn: 24713
* When folding loads into ops, immediately replace uses of the op with theChris Lattner2005-12-141-6/+6
| | | | | | | | | load. This reduces number of worklist iterations and avoid missing optimizations depending on folding of things into sext_inreg nodes (which aren't supported by all targets). Tested by Regression/CodeGen/X86/extend.ll:test2 llvm-svn: 24712
* Fix the (zext (zextload)) case to trigger, similarly for sign extends.Chris Lattner2005-12-141-7/+28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Allow (zext (truncate)) to apply after legalize if the target supports AND (which all do). This compiles short %foo() { %tmp.0 = load ubyte* %X ; <ubyte> [#uses=1] %tmp.3 = cast ubyte %tmp.0 to short ; <short> [#uses=1] ret short %tmp.3 } to: _foo: movzbl _X, %eax ret instead of: _foo: movzbl _X, %eax movzbl %al, %eax ret thanks to Evan for pointing this out. llvm-svn: 24709
* Fix Transforms/ScalarRepl/2005-12-14-UnionPromoteCrash.ll, a crash on undefinedChris Lattner2005-12-141-2/+2
| | | | | | behavior in 126.gcc on big-endian systems. llvm-svn: 24708
* Fix a miscompilation in crafty due to a recent patchChris Lattner2005-12-141-1/+1
| | | | llvm-svn: 24706
* Added sext and zext patterns.Evan Cheng2005-12-141-9/+34
| | | | llvm-svn: 24705
* Added sextld + zextld DAG nodes.Evan Cheng2005-12-141-0/+17
| | | | llvm-svn: 24703
* Fold (zext (load x) to (zextload x).Evan Cheng2005-12-141-1/+18
| | | | llvm-svn: 24702
* Add support for fmul node of type v4f32.Nate Begeman2005-12-142-0/+21
| | | | | | | | | | | | | | | | | | | | | | void %foo(<4 x float> * %a) { entry: %tmp1 = load <4 x float> * %a; %tmp2 = mul <4 x float> %tmp1, %tmp1 store <4 x float> %tmp2, <4 x float> *%a ret void } Is selected to: _foo: li r2, 0 lvx v0, r2, r3 vxor v1, v1, v1 vmaddfp v0, v0, v0, v1 stvx v0, r2, r3 blr llvm-svn: 24701
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