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* When no memoperands are present, assume unaligned, volatile.Jakob Stoklund Olesen2010-06-291-10/+13
| | | | llvm-svn: 107114
* Reapply my if-conversion cleanup from svn r106939 with fixes.Bob Wilson2010-06-291-34/+45
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There are 2 changes relative to the previous version of the patch: 1) For the "simple" if-conversion case, there's no need to worry about RemoveExtraEdges not handling an unanalyzable branch. Predicated terminators are ignored in this context, so RemoveExtraEdges does the right thing. This might break someday if we ever treat indirect branches (BRIND) as predicable, but for now, I just removed this part of the patch, because in the case where we do not add an unconditional branch, we rely on keeping the fall-through edge to CvtBBI (which is empty after this transformation). The change relative to the previous patch is: @@ -1036,10 +1036,6 @@ IterIfcvt = false; } - // RemoveExtraEdges won't work if the block has an unanalyzable branch, - // which is typically the case for IfConvertSimple, so explicitly remove - // CvtBBI as a successor. - BBI.BB->removeSuccessor(CvtBBI->BB); RemoveExtraEdges(BBI); // Update block info. BB can be iteratively if-converted. 2) My patch exposed a bug in the code for merging the tail of a "diamond", which had previously never been exercised. The code was simply checking that the tail had a single predecessor, but there was a case in MultiSource/Benchmarks/VersaBench/dbms where that single predecessor was neither edge of the diamond. I added the following change to check for that: @@ -1276,7 +1276,18 @@ // tail, add a unconditional branch to it. if (TailBB) { BBInfo TailBBI = BBAnalysis[TailBB->getNumber()]; - if (TailBB->pred_size() == 1 && !TailBBI.HasFallThrough) { + bool CanMergeTail = !TailBBI.HasFallThrough; + // There may still be a fall-through edge from BBI1 or BBI2 to TailBB; + // check if there are any other predecessors besides those. + unsigned NumPreds = TailBB->pred_size(); + if (NumPreds > 1) + CanMergeTail = false; + else if (NumPreds == 1 && CanMergeTail) { + MachineBasicBlock::pred_iterator PI = TailBB->pred_begin(); + if (*PI != BBI1->BB && *PI != BBI2->BB) + CanMergeTail = false; + } + if (CanMergeTail) { MergeBlocks(BBI, TailBBI); TailBBI.IsDone = true; } else { With these fixes, I was able to run all the SingleSource and MultiSource tests successfully. llvm-svn: 107110
* Add an Intraprocedural form of BasicAliasAnalysis, which aims toDan Gohman2010-06-292-34/+120
| | | | | | | properly handles instructions and arguments defined in different functions, or across recursive function iterations. llvm-svn: 107109
* Described the missing AVX forms of SSE2 convert instructionsBruno Cardoso Lopes2010-06-291-51/+200
| | | | llvm-svn: 107108
* Fix Thumb encoding of VMOV (scalar to ARM core register). The encoding isBob Wilson2010-06-291-1/+1
| | | | | | the same as ARM except that the condition code field is always set to ARMCC::AL. llvm-svn: 107107
* Unlike other targets, ARM now uses BUILD_VECTORs post-legalization so theyBob Wilson2010-06-281-1/+2
| | | | | | | can't be changed arbitrarily by the DAGCombiner without checking if it is running after legalization. llvm-svn: 107097
* Make the ARMCodeEmitter identify Thumb functions via ARMFunctionInfo insteadBob Wilson2010-06-281-5/+7
| | | | | | of the Subtarget. llvm-svn: 107086
* Use DW_FORM_addr for DW_AT_entry_pc.Devang Patel2010-06-282-1/+3
| | | | llvm-svn: 107085
* In asm's, output operands with matching input constraintsDale Johannesen2010-06-281-2/+7
| | | | | | | | have to be registers, per gcc documentation. This affects the logic for determining what "g" should lower to. PR 7393. A couple of existing testcases are affected. llvm-svn: 107079
* Added the darwin .secure_log_unique and .secure_log_reset directives.Kevin Enderby2010-06-282-0/+70
| | | | llvm-svn: 107077
* Constant fold x == undef to undef.Dan Gohman2010-06-281-1/+8
| | | | llvm-svn: 107074
* tidy up style. no functional change.Jim Grosbach2010-06-281-2/+3
| | | | llvm-svn: 107073
* Fix Value::stripPointerCasts and BasicAA to avoid trouble onDan Gohman2010-06-282-10/+38
| | | | | | | code in unreachable blocks, which have have use-def cycles. This fixes PR7514. llvm-svn: 107071
* Refactor encoding function for NEON 1-register with modified immediate format.Bob Wilson2010-06-281-5/+1
| | | | llvm-svn: 107070
* Support Thumb mode encoding of NEON instructions.Bob Wilson2010-06-281-0/+15
| | | | llvm-svn: 107068
* Reduce indentation via early exit. NFC.Bill Wendling2010-06-281-100/+110
| | | | llvm-svn: 107067
* Include inlined function in list of processed subprograms.Devang Patel2010-06-281-1/+1
| | | | llvm-svn: 107065
* new, no longer brain-dead, r106907Jim Grosbach2010-06-281-2/+9
| | | | llvm-svn: 107060
* After physreg coalescing, physical registers might not have live ranges whereJakob Stoklund Olesen2010-06-281-1/+2
| | | | | | | | | | you would expect. Don't assert on that case, just give up. This fixes PR7513. llvm-svn: 107046
* Add more special treatment for inline asm in RegAllocFast.Jakob Stoklund Olesen2010-06-281-21/+107
| | | | | | | | | | | | When an instruction has tied operands and physreg defines, we must take extra care that the tied operands conflict with neither physreg defs nor uses. The special treatment is given to inline asm and instructions with tied operands / early clobbers and physreg defines. This fixes PR7509. llvm-svn: 107043
* Fix thinko.Eric Christopher2010-06-281-2/+4
| | | | llvm-svn: 107042
* Pull in the libCrashReporterClient.a information with a warning comment.Eric Christopher2010-06-281-2/+9
| | | | | | Remove library check and regenerate configure. llvm-svn: 107028
* Preserve deleted function's local variables' debug info.Devang Patel2010-06-282-0/+39
| | | | | | Radar 8122864. llvm-svn: 107027
* use ArgOperand APIGabor Greif2010-06-281-12/+12
| | | | llvm-svn: 107017
* use ArgOperand APIGabor Greif2010-06-281-4/+4
| | | | llvm-svn: 107016
* employ CallInst::ArgOffset (for now)Gabor Greif2010-06-281-2/+2
| | | | llvm-svn: 107015
* simplify: we have solid argument iterator rangeGabor Greif2010-06-281-7/+4
| | | | llvm-svn: 107014
* Generalize AAEval so that it can be used both per-function andDan Gohman2010-06-281-38/+97
| | | | | | | interprocedurally. Note that as of this writing, existing alias analysis passes are not prepared to be used interprocedurally. llvm-svn: 107013
* Revert r106907, "make sure to handle dbg_value instructions in the middle of theDaniel Dunbar2010-06-281-10/+2
| | | | | | block, not...", it caused a bunch of nightly test regressions. llvm-svn: 107009
* use setArgOperandGabor Greif2010-06-281-6/+6
| | | | llvm-svn: 107004
* use CallInst::ArgOffsetGabor Greif2010-06-281-1/+1
| | | | llvm-svn: 107003
* use ArgOperand API and CallInst::ArgOffsetGabor Greif2010-06-281-17/+17
| | | | llvm-svn: 107002
* use cached valueGabor Greif2010-06-281-1/+1
| | | | llvm-svn: 107000
* Remove dead code.Devang Patel2010-06-282-3/+1
| | | | llvm-svn: 106990
* Use named MDNode, llvm.dbg.sp, to collect subprogram info. This will be used ↵Devang Patel2010-06-281-11/+23
| | | | | | to emit local variable's debug info of deleted functions. llvm-svn: 106989
* minor housekeeping cleanup: 80-column, trailing whitespace, spelling, etc.. ↵Jim Grosbach2010-06-283-68/+68
| | | | | | No functional change. llvm-svn: 106988
* Do not forget last element, function, while creating Subprogram definition ↵Devang Patel2010-06-271-1/+2
| | | | | | MDNode from subprogram declare MDNode. llvm-svn: 106985
* minor cleanup to SROA: when lowering type unsafe accesses toChris Lattner2010-06-271-1/+6
| | | | | | | | large integers, the first inserted value would always create an 'or X, 0'. Even though this is trivially zapped by instcombine, don't bother creating this pointless instruction. llvm-svn: 106979
* When splitting a VAARG, remember its alignment.Rafael Espindola2010-06-263-8/+28
| | | | | | This produces terrible but correct code. llvm-svn: 106952
* Revert my if-conversion cleanup since it caused a bunch of nightly testBob Wilson2010-06-261-37/+33
| | | | | | | | | | regressions. --- Reverse-merging r106939 into '.': U test/CodeGen/Thumb2/thumb2-ifcvt3.ll U lib/CodeGen/IfConversion.cpp llvm-svn: 106951
* Fix PR7328: when turning a tail recursion into a loop, need to preserveDuncan Sands2010-06-261-6/+6
| | | | | | | | the returned value after the tail call if it differs from other return values. The optimal thing to do would be to introduce a phi node for the return value, but for the moment just fix the miscompile. llvm-svn: 106947
* use ArgOperand APIGabor Greif2010-06-261-5/+5
| | | | llvm-svn: 106946
* use ArgOperand APIGabor Greif2010-06-261-24/+24
| | | | llvm-svn: 106945
* use ArgOperand APIGabor Greif2010-06-262-8/+8
| | | | llvm-svn: 106944
* VNInfos don't need to be destructed anymore.Benjamin Kramer2010-06-262-4/+4
| | | | llvm-svn: 106943
* resort to ArgOperand APIGabor Greif2010-06-261-9/+8
| | | | llvm-svn: 106942
* Followup to r106770: actually generate SXTB and SXTH for sign-extensions.Eli Friedman2010-06-261-5/+2
| | | | llvm-svn: 106940
* Clean up some problems with extra CFG edges being introduced duringBob Wilson2010-06-261-33/+37
| | | | | | | | | | | | | | | if-conversion. The RemoveExtraEdges function doesn't work for blocks that end with unanalyzable branches, so in those cases, the "extra" edges must be explicitly removed. The CopyAndPredicateBlock and MergeBlocks methods can also avoid copying successor edges due to branches that have already been removed. The latter case is especially helpful when MergeBlocks is called for handling "diamond" if-conversions, where otherwise you can end up with some weird intermediate states in the CFG. Unfortunately I've been unable to find cases where this cleanup actually makes a significant difference in the code. There is one test where we manage to remove an empty block at the end of a function. Radar 6911268. llvm-svn: 106939
* Add support for encoding NEON VMOV (from scalar to core register) instructions.Bob Wilson2010-06-261-0/+33
| | | | llvm-svn: 106938
* It's now possible to run code placement pass for ARM.Evan Cheng2010-06-261-4/+8
| | | | llvm-svn: 106935
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