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| author | Bob Wilson <bob.wilson@apple.com> | 2010-06-29 00:26:13 +0000 |
|---|---|---|
| committer | Bob Wilson <bob.wilson@apple.com> | 2010-06-29 00:26:13 +0000 |
| commit | 3d12ff797b1b407f89d6fba44f4098e09c6f7e68 (patch) | |
| tree | 00b8c2cf0115a2de0c981c587308cf4b1933e450 /llvm/lib | |
| parent | 8337ba6303db88e1690a7f52b934758cee36456f (diff) | |
| download | bcm5719-llvm-3d12ff797b1b407f89d6fba44f4098e09c6f7e68.tar.gz bcm5719-llvm-3d12ff797b1b407f89d6fba44f4098e09c6f7e68.zip | |
Fix Thumb encoding of VMOV (scalar to ARM core register). The encoding is
the same as ARM except that the condition code field is always set to ARMCC::AL.
llvm-svn: 107107
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/ARM/ARMCodeEmitter.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/Target/ARM/ARMCodeEmitter.cpp b/llvm/lib/Target/ARM/ARMCodeEmitter.cpp index 048529b18c4..f26074d358a 100644 --- a/llvm/lib/Target/ARM/ARMCodeEmitter.cpp +++ b/llvm/lib/Target/ARM/ARMCodeEmitter.cpp @@ -1600,7 +1600,7 @@ void ARMCodeEmitter::emitNEONGetLaneInstruction(const MachineInstr &MI) { unsigned Binary = getBinaryCodeForInstr(MI); // Set the conditional execution predicate - Binary |= II->getPredicate(&MI) << ARMII::CondShift; + Binary |= (IsThumb ? ARMCC::AL : II->getPredicate(&MI)) << ARMII::CondShift; unsigned RegT = MI.getOperand(0).getReg(); RegT = ARMRegisterInfo::getRegisterNumbering(RegT); |
