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* Delete dead code.Jakob Stoklund Olesen2011-03-012-68/+0
| | | | llvm-svn: 126801
* Move the value map from LiveIntervalMap to SplitEditor.Jakob Stoklund Olesen2011-03-012-86/+84
| | | | | | | | | | | The value map is currently not used, all values are 'complex mapped' and LiveIntervalMap::mapValue is used to dig them out. This is the first step in a series changes leading to the removal of LiveIntervalMap. Its data structures can be shared among all the live intervals created by a split, so it is wasteful to create a copy for each. llvm-svn: 126800
* Delete dead code.Jakob Stoklund Olesen2011-03-012-78/+0
| | | | | | | Local live range splitting is better driven by interference. This code was just guessing. llvm-svn: 126799
* Drop RAGreedy::trySpillInterferences().Jakob Stoklund Olesen2011-03-011-70/+0
| | | | | | | This is a waste of time since we already know how to evict all interferences which is a better approach anyway. llvm-svn: 126798
* Fixes warnings emitted by Visual Studio 2010 compiler.Oscar Fuentes2011-03-011-2/+2
| | | | | | Patch by Erik Olofsson! llvm-svn: 126796
* If argument numbering is encoded in metadata then emit arguments' debug info ↵Devang Patel2011-03-012-4/+42
| | | | | | in that order. llvm-svn: 126794
* Today, the language front ends produces llvm.dbg.* intrinsics, used to ↵Devang Patel2011-03-011-5/+5
| | | | | | | | encode arguments' debug info, in order any way, most of the times. However, if a front end mix-n-matches llvm.dbg.declare and llvm.dbg.value intrinsics to encode debug info for arguments then code generator needs a way to find argument order. Use 8 bits from line number field to keep track of argument ordering while encoding debug info for an argument. That leaves 24 bit for line no, DebugLoc also allocates 24 bit for line numbers. If a function has more than 255 arguments then rest of the arguments will be ordered by llvm.dbg.* intrinsics' ordering in IR. llvm-svn: 126793
* Stop computing the number of uses twice per value in CodeGenPrepare's sinking ofCameron Zwarich2011-03-011-3/+4
| | | | | | | | addressing code. On 403.gcc this almost halves CodeGenPrepare time and reduces total llc time by 9.5%. Unfortunately, getNumUses() is still the hottest function in llc. llvm-svn: 126782
* Keep track of which stage produced a live range, and bypass earlier stages ↵Jakob Stoklund Olesen2011-03-011-20/+76
| | | | | | | | | | | | | | | | | | | | | | when revisiting. This effectively disables the 'turbo' functionality of the greedy register allocator where all new live ranges created by splitting would be reconsidered as if they were originals. There are two reasons for doing this, 1. It guarantees that the algorithm terminates. Early versions were prone to infinite looping in certain corner cases. 2. It is a 2x speedup. We can skip a lot of unnecessary interference checks that won't lead to good splitting anyway. The problem is that region splitting only gets one shot, so it should probably be changed to target multiple physical registers at once. Local live range splitting is still 'turbo' enabled. It only accounts for a small fraction of compile time, so it is probably not necessary to do anything about that. llvm-svn: 126781
* Add datalayout information for the IEEE quad precision fp128 type.Duncan Sands2011-03-011-4/+4
| | | | llvm-svn: 126780
* Revert PathV2 changes, as sys::fs::unique_file is not finished yet.Dan Gohman2011-03-011-38/+36
| | | | llvm-svn: 126773
* Added missing va_end().Talin2011-03-011-0/+1
| | | | llvm-svn: 126759
* Add a few missed unary cases when legalizing vector results. Put some casesDuncan Sands2011-03-011-31/+43
| | | | | | in alphabetical order. llvm-svn: 126745
* Make InstCombiner::FoldAndOfICmps create a ConstantRange that's theAnders Carlsson2011-03-011-8/+12
| | | | | | | | | intersection of the LHS and RHS ConstantRanges and return "false" when the range is empty. This simplifies some code and catches some extra cases. llvm-svn: 126744
* Optimize "icmp pred (urem X, Y), Y" --> true/false depending on pred. There'sNick Lewycky2011-03-011-0/+18
| | | | | | | more work to do here, "icmp ult (urem X, 10), 11" doesn't optimize away yet. Fixes example 3 from PR9343! llvm-svn: 126741
* trailing whitespace.Jim Grosbach2011-03-011-1/+1
| | | | llvm-svn: 126733
* Generalize the register matching code in DAGISel a bit.Jim Grosbach2011-03-011-0/+12
| | | | llvm-svn: 126731
* Narrow right shifts need to encode their immediates differently from a normalBill Wendling2011-03-014-5/+56
| | | | | | | | | | shift. 16-bit: imm6<5:3> = '001', 8 - <imm> is encded in imm6<2:0> 32-bit: imm6<5:4> = '01',16 - <imm> is encded in imm6<3:0> 64-bit: imm6<5> = '1', 32 - <imm> is encded in imm6<4:0> llvm-svn: 126723
* Add an obvious missing safety check to DAE::RemoveDeadArgumentsFromCallers.Eli Friedman2011-03-011-1/+1
| | | | llvm-svn: 126720
* add a noteChris Lattner2011-03-011-0/+15
| | | | llvm-svn: 126719
* Unbreak CMake build.Ted Kremenek2011-03-011-5/+4
| | | | llvm-svn: 126717
* Unbreak CMake build.Ted Kremenek2011-02-281-1/+0
| | | | llvm-svn: 126715
* Add an END_WITH_NULL accessor for ConstantStruct.Talin2011-02-281-2/+13
| | | | llvm-svn: 126714
* update cmakeChris Lattner2011-02-281-1/+0
| | | | llvm-svn: 126694
* Fix .fpu printing in ARM assembly, regarding bug ↵Renato Golin2011-02-281-4/+38
| | | | | | http://llvm.org/bugs/show_bug.cgi?id=8931 llvm-svn: 126689
* Add missing whitespace in the formatting.Kevin Enderby2011-02-281-1/+1
| | | | llvm-svn: 126687
* Make all static functions become static class methods. Move shared ↵Jan Sjödin2011-02-285-138/+203
| | | | | | (duplicated) functions to new MCELF class. llvm-svn: 126686
* Use the correct shift amount type.Owen Anderson2011-02-281-1/+1
| | | | llvm-svn: 126684
* Clean whitespace.Owen Anderson2011-02-281-3/+3
| | | | llvm-svn: 126683
* fix a signed comparison warning.Chris Lattner2011-02-281-1/+1
| | | | llvm-svn: 126682
* Delete the GEPSplitter experiment.Dan Gohman2011-02-283-96/+0
| | | | llvm-svn: 126671
* Delete the SimplifyHalfPowrLibCalls pass, which was unused, andDan Gohman2011-02-282-161/+0
| | | | | | only existed as the result of a misunderstanding. llvm-svn: 126669
* Delete the LiveValues pass. I won't get get back to the project itDan Gohman2011-02-282-201/+0
| | | | | | was started for in the foreseeable future. llvm-svn: 126668
* [AVX] Add decode support for VUNPCKLPS/D instructions, both 128-bitDavid Greene2011-02-284-30/+120
| | | | | | | | and 256-bit forms. Because the number of elements in a vector does not determine the vector type (4 elements could be v4f32 or v4f64), pass the full type of the vector to decode routines. llvm-svn: 126664
* Fix the arm's disassembler for blx that was building an MCInst without theKevin Enderby2011-02-281-1/+13
| | | | | | needed two predicate operands before the imm operand. llvm-svn: 126662
* Fix a typo which cause dag combine crash. rdar://9059537.Evan Cheng2011-02-281-1/+1
| | | | llvm-svn: 126661
* Support for byval parameters on ARM. Will be enabled by a forthcomingStuart Hastings2011-02-284-9/+49
| | | | | | patch to the front-end. Radar 7662569. llvm-svn: 126655
* Add branch hinting for SPU. Kalle Raiskila2011-02-284-5/+94
| | | | | | | The implemented algorithm is overly simplistic (just speculate all branches are taken)- this is work in progress. llvm-svn: 126651
* Teach SimplifyCFG that (switch (select cond, X, Y)) is better expressed as a ↵Frits van Bommel2011-02-281-1/+26
| | | | | | | | branch. Based on a patch by Alistair Lynn. llvm-svn: 126647
* Fix comment.Nick Lewycky2011-02-281-1/+1
| | | | llvm-svn: 126645
* srem doesn't actually have the same resulting sign as its numerator, you couldNick Lewycky2011-02-282-22/+0
| | | | | | | also have a zero when numerator = denominator. Reverts parts of r126635 and r126637. llvm-svn: 126644
* Teach InstCombine to fold "(shr exact X, Y) == 0" --> X == 0, fixing #1 fromNick Lewycky2011-02-281-5/+13
| | | | | | PR9343. llvm-svn: 126643
* Teach value tracking to make use of flags in more situations.Nick Lewycky2011-02-281-0/+25
| | | | llvm-svn: 126642
* Teach ValueTracking to look at the dividend when determining the sign bit of anNick Lewycky2011-02-281-0/+12
| | | | | | srem instruction. llvm-svn: 126637
* Add preliminary support for .f32 in the PTX backend.Che-Liang Chiou2011-02-285-10/+131
| | | | | | | | | | | | - Add appropriate TableGen patterns for fadd, fsub, fmul. - Add .f32 as the PTX type for the LLVM float type. - Allow parameters, return values, and global variable declarations to accept the float type. - Add appropriate test cases. Patch by Justin Holewinski llvm-svn: 126636
* The sign of an srem instruction is the sign of its dividend (the firstNick Lewycky2011-02-281-3/+13
| | | | | | | argument), regardless of the divisor. Teach instcombine about this and fix test7 in PR9343! llvm-svn: 126635
* Silence enum conversion warnings.Benjamin Kramer2011-02-271-2/+2
| | | | llvm-svn: 126578
* Legalize support for fpextend of vector. PR9309.Duncan Sands2011-02-271-0/+2
| | | | llvm-svn: 126574
* Target/X86: Always emit "push/pop GPRs" in prologue/epilogue and emit ↵NAKAMURA Takumi2011-02-271-17/+39
| | | | | | | | "spill/reload frames" for XMMs. It improves Win64's prologue/epilogue but it would not affect ia32 and amd64 (lack of nonvolatile XMMs). llvm-svn: 126568
* Fix typos in the comments.Nadav Rotem2011-02-271-4/+7
| | | | llvm-svn: 126565
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