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authorNick Lewycky <nicholas@mxc.ca>2011-02-28 06:52:12 +0000
committerNick Lewycky <nicholas@mxc.ca>2011-02-28 06:52:12 +0000
commit29dbbd12c17e8f87ba95dc9bdbf2cad7ed6e88d3 (patch)
tree92e3cefa24c290434841f81851c358e1509d84c9 /llvm/lib
parent75a800d3bf8731b83907f10ba6b6cee3a0829979 (diff)
downloadbcm5719-llvm-29dbbd12c17e8f87ba95dc9bdbf2cad7ed6e88d3.tar.gz
bcm5719-llvm-29dbbd12c17e8f87ba95dc9bdbf2cad7ed6e88d3.zip
Teach ValueTracking to look at the dividend when determining the sign bit of an
srem instruction. llvm-svn: 126637
Diffstat (limited to 'llvm/lib')
-rw-r--r--llvm/lib/Analysis/ValueTracking.cpp12
1 files changed, 12 insertions, 0 deletions
diff --git a/llvm/lib/Analysis/ValueTracking.cpp b/llvm/lib/Analysis/ValueTracking.cpp
index 1060bc5349e..fac0407da52 100644
--- a/llvm/lib/Analysis/ValueTracking.cpp
+++ b/llvm/lib/Analysis/ValueTracking.cpp
@@ -460,6 +460,18 @@ void llvm::ComputeMaskedBits(Value *V, const APInt &Mask,
assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
}
}
+ if (Mask.isNegative()) { // We're looking for the sign bit.
+ APInt Mask2 = APInt::getSignBit(BitWidth);
+ KnownZero2 = 0;
+ KnownOne2 = 0;
+ ComputeMaskedBits(I->getOperand(0), Mask2, KnownZero2, KnownOne2, TD,
+ Depth+1);
+ if (KnownOne2[BitWidth-1])
+ KnownOne |= Mask2;
+ if (KnownZero2[BitWidth-1])
+ KnownZero |= Mask2;
+ assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
+ }
break;
case Instruction::URem: {
if (ConstantInt *Rem = dyn_cast<ConstantInt>(I->getOperand(1))) {
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