| Commit message (Collapse) | Author | Age | Files | Lines |
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it, so that it doesn't appear to be a known size.
llvm-svn: 118748
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This is the first small step towards using closed intervals for liveness instead
of the half-open intervals we're using now.
We want to be able to distinguish between a SlotIndex that represents a variable
being live-out of a basic block, and an index representing a variable live-in to
its successor.
That requires two separate indexes between blocks. One for live-outs and one for
live-ins.
With this change, getMBBEndIdx(MBB).getPrevSlot() becomes stable so it stays
greater than any instructions inserted at the end of MBB.
llvm-svn: 118747
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llvm-svn: 118742
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constant loads.
llvm-svn: 118741
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encoding bits.
llvm-svn: 118738
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llvm-svn: 118736
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llvm-svn: 118733
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llvm-svn: 118732
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llvm-svn: 118730
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the reverse map too. This fixes seflhost build errors.
llvm-svn: 118729
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llvm-svn: 118728
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function specific local variable's info.
This fixes radar 8653152. I am checking in testcase as a separate check-in.
llvm-svn: 118726
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llvm-svn: 118725
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for a given instruction into a helper function.
llvm-svn: 118723
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llvm-svn: 118722
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type is insufficient for, or incompatible with, the current query.
llvm-svn: 118721
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vector with 2 elts
llvm-svn: 118720
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Probably it should just be 1, but compromise with 3.
llvm-svn: 118718
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references. For example, this allows gvn to eliminate the load in
this example:
void foo(int n, int* p, int *q) {
p[0] = 0;
p[1] = 1;
if (n) {
*q = p[0];
}
}
llvm-svn: 118714
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llvm-svn: 118709
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Whenever splitting wants to insert a copy, it checks if the value can be
rematerialized cheaply instead.
Missing features:
- Delete instructions when all uses have been rematerialized.
- Truncate live ranges to the remaining uses after rematerialization.
llvm-svn: 118702
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benchmarks hitting an assertion.
Adds LiveIntervalUnion::collectInterferingVRegs.
Fixes "late spilling" by checking for any unspillable live vregs among
all physReg aliases.
llvm-svn: 118701
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llvm-svn: 118699
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instructions instead of hard-coding operand numbers.
llvm-svn: 118698
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nodes can be used in loops, this could result in infinite looping
if there is no recursion limit, so add such a limit. It is also
used for the SelectInst case because in theory there could be an
infinite loop there too if the basic block is unreachable.
llvm-svn: 118694
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it, and to be consistent.
llvm-svn: 118692
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double quoting of ObjC symbol names in constant pool entries.
rdar://8652107
llvm-svn: 118688
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arbitrary memory into a helper function, and adjust some comments.
llvm-svn: 118687
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llvm-svn: 118683
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llvm-svn: 118681
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The simplifications performed here never create new instructions, they
only return existing instructions (or a constant), and so are always a
win. In theory they should transform (for example)
%z = and i32 %x, %y
%s = select i1 %cond, i32 %y, i32 %z
%r = and i32 %x, %s
into
%r = and i32 %x, y
but in practice they get into a fight with instcombine, and lose.
Unfortunately instcombine does a poor job in this case. Nonetheless
I'm committing this transform to make it easier to discuss what to
do to make peace with instcombine.
llvm-svn: 118679
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not check by FILE_TYPE_CHAR. It must be better to check it with Console API.
The special file "NUL" is FILE_TYPE_CHAR with GetFileType(h). It was treated as display device and discarding output to NUL had failed. (eg. opt -o nul)
llvm-svn: 118678
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VariantKind marker to indicate the additional information necessary. Update
MC to handle the new Kinds. rdar://8647623
llvm-svn: 118671
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minor tweaks
llvm-svn: 118667
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order to reduce ((x<<30)>>24) to x<<6, check the
correct bits. PR 8547.
llvm-svn: 118665
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llvm-svn: 118662
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llvm-svn: 118661
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chaining and simplify FunctionAttrs' GetModRefBehavior logic.
llvm-svn: 118660
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llvm-svn: 118656
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llvm-svn: 118653
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earlier. Implicit bool -> int conversions are evil!
llvm-svn: 118651
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llvm-svn: 118648
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llvm-svn: 118645
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llvm-svn: 118644
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as derived from the target triple. This is important for enabling
features that are implied based on the architecture version.
llvm-svn: 118643
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It is only supported for ARM code. Normally Thumb2 code would use DMB instead,
but depending on how the compiler is invoked (e.g., -mattr=-db) that might be
disabled. This prevents a "cannot select MEMBARRIER_MCR" error in that
situation. Radar 8644195
llvm-svn: 118642
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* LDM, et al, uses a bit mask to indicate the register list.
* VLDM, et al, uses a base register plus number.
The LDM instructions may be non-contiguous, but the VLDM ones must be
contiguous. Those are semantic checks that should be done later in the
compiler. Also postpone the creation of the bit mask until it's needed.
llvm-svn: 118640
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llvm-svn: 118639
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help in MC'izing the references that use them.
llvm-svn: 118633
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(retry now that the windows build is green)
llvm-svn: 118630
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