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* Simplify.Devang Patel2009-06-051-15/+6
| | | | llvm-svn: 72970
* Add explicit keywords.Dan Gohman2009-06-057-15/+17
| | | | llvm-svn: 72969
* Simplify.Devang Patel2009-06-051-15/+5
| | | | llvm-svn: 72965
* Add new function attribute - noimplicitfloatDevang Patel2009-06-058-31/+39
| | | | | | | Update code generator to use this attribute and remove NoImplicitFloat target option. Update llc to set this attribute when -no-implicit-float command line option is used. llvm-svn: 72959
* Adapt the x86 build_vector dagcombine to the current state of the legalizer.Nate Begeman2009-06-053-52/+95
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | build vectors with i64 elements will only appear on 32b x86 before legalize. Since vector widening occurs during legalize, and produces i64 build_vector elements, the dag combiner is never run on these before legalize splits them into 32b elements. Teach the build_vector dag combine in x86 back end to recognize consecutive loads producing the low part of the vector. Convert the two uses of TLI's consecutive load recognizer to pass LoadSDNodes since that was required implicitly. Add a testcase for the transform. Old: subl $28, %esp movl 32(%esp), %eax movl 4(%eax), %ecx movl %ecx, 4(%esp) movl (%eax), %eax movl %eax, (%esp) movaps (%esp), %xmm0 pmovzxwd %xmm0, %xmm0 movl 36(%esp), %eax movaps %xmm0, (%eax) addl $28, %esp ret New: movl 4(%esp), %eax pmovzxwd (%eax), %xmm0 movl 8(%esp), %eax movaps %xmm0, (%eax) ret llvm-svn: 72957
* Changing allocation ordering from r3 ... r0 back to r0 ... r3. The order ↵Evan Cheng2009-06-052-10/+10
| | | | | | change no longer make sense after the coalescing changes we have made since then. llvm-svn: 72955
* Evan thinks NoImplicitFloat check is not required here.Devang Patel2009-06-051-1/+1
| | | | llvm-svn: 72954
* Fix a copy+pasto in an assertion string that Jay Foad noticed.Dan Gohman2009-06-051-1/+1
| | | | llvm-svn: 72953
* When merging multiple load / store instructions. Use the DebugLoc of the ↵Evan Cheng2009-06-051-11/+16
| | | | | | first one. llvm-svn: 72952
* Code clean up: return vector by reference rather than by value. No ↵Evan Cheng2009-06-051-21/+21
| | | | | | functionality changes. llvm-svn: 72950
* Move SCEVExpander::getOrInsertCanonicalInductionVariable out of line.Dan Gohman2009-06-051-0/+13
| | | | llvm-svn: 72949
* Remove some unnecessary #includes.Dan Gohman2009-06-057-7/+0
| | | | llvm-svn: 72948
* Update the Verifier to be aware of the difference between Add and FAdd, etc.Dan Gohman2009-06-051-15/+33
| | | | llvm-svn: 72946
* Lower i16/i32 sdiv/udiv/srem/urem using libcalls.Sanjiv Gupta2009-06-051-0/+24
| | | | llvm-svn: 72942
* Allow libcalls for i16 sdiv/udiv/rem operations.Sanjiv Gupta2009-06-051-4/+12
| | | | llvm-svn: 72941
* ELF Code Emitter now uses CurBufferPtr, BufferBegin and BufferEnd, as do JIT andBruno Cardoso Lopes2009-06-053-32/+57
| | | | | | | MachO Writer. This will change with the arrival of ObjectCodeEmitter and BinaryObject llvm-svn: 72906
* Fix an erroneous check for isFNeg; the FNeg case is handledDan Gohman2009-06-041-1/+1
| | | | | | a few lines later on. llvm-svn: 72904
* The DWARF unwind info was incorrect. While compiling withBill Wendling2009-06-041-15/+16
| | | | | | | | | | | | | | | | `-fomit-frame-pointer', we would lack the DW_CFA_advance_loc information for a lot of function, and then they would be `0'. The linker (at least on Darwin) needs to encode the stack size. In some cases, the stack size is too large to directly encode. So the linker checks to see if there is a "subl $xxx,%esp" instruction at the point where the `DW_CFA_def_cfa_offset' says the pc was. If so, the compact encoding records the offset in the function to where the stack size is embedded. But because the `DW_CFA_advance_loc' instructions are missing, it looks before the function and dies. So, instead of emitting the EH debug label before the stack adjustment operations, emit it afterwards, right before the frame move stuff. llvm-svn: 72898
* Split the Add, Sub, and Mul instruction opcodes into separateDan Gohman2009-06-0426-211/+446
| | | | | | | | | | | | | | | integer and floating-point opcodes, introducing FAdd, FSub, and FMul. For now, the AsmParser, BitcodeReader, and IRBuilder all preserve backwards compatability, and the Core LLVM APIs preserve backwards compatibility for IR producers. Most front-ends won't need to change immediately. This implements the first step of the plan outlined here: http://nondot.org/sabre/LLVMNotes/IntegerOverflow.txt llvm-svn: 72897
* Add new function attribute - noredzone. Devang Patel2009-06-047-7/+7
| | | | | | | Update code generator to use this attribute and remove DisableRedZone target option. Update llc to set this attribute when -disable-red-zone command line option is used. llvm-svn: 72894
* Fix FP_TO_UINT->i32 on ppc32 -mcpu=g5. This wasDale Johannesen2009-06-043-16/+17
| | | | | | | | | | | | | | using Promote which won't work because i64 isn't a legal type. It's easy enough to use Custom, but then we have the problem that when the type legalizer is promoting FP_TO_UINT->i16, it has no way of telling it should prefer FP_TO_SINT->i32 to FP_TO_UINT->i32. I have uncomfortably hacked this by making the type legalizer choose FP_TO_SINT when both are Custom. This fixes several regressions in the testsuite. llvm-svn: 72891
* RALinScan::attemptTrivialCoalescing() was returning a virtual register ↵Evan Cheng2009-06-041-3/+9
| | | | | | instead of the physical register it is allocated to. This resulted in virtual register(s) being added the live-in sets. llvm-svn: 72890
* A value defined by an implicit_def can be liven to a use BB. This is ↵Evan Cheng2009-06-041-0/+18
| | | | | | unfortunate. But register allocator still has to add it to the live-in set of the use BB. llvm-svn: 72889
* Removed SimpleRewriter.Lang Hames2009-06-041-82/+2
| | | | llvm-svn: 72880
* Don't do the X * 0.0 -> 0.0 transformation in instcombine, becauseDan Gohman2009-06-043-10/+16
| | | | | | | | instcombine doesn't know when it's safe. To partially compensate for this, introduce new code to do this transformation in dagcombine, which can use UnsafeFPMath. llvm-svn: 72872
* Fix comments.Dan Gohman2009-06-041-2/+2
| | | | llvm-svn: 72870
* Remove unused code.Sanjiv Gupta2009-06-041-10/+0
| | | | llvm-svn: 72866
* Custom lower SUB with two register operands.Sanjiv Gupta2009-06-041-0/+1
| | | | llvm-svn: 72861
* Fix comments.Torok Edwin2009-06-041-1/+2
| | | | llvm-svn: 72858
* Add support for outputting ANSI colors to raw_fd_ostream.Torok Edwin2009-06-043-0/+155
| | | | llvm-svn: 72854
* PR3739, part 2: Use an explicit store to spill XMM registers. (Previously,Eli Friedman2009-06-041-4/+17
| | | | | | the code tried to use "push", which doesn't exist for XMM registers.) llvm-svn: 72836
* PR3739, part 1: Disable the red zone on Win64.Eli Friedman2009-06-041-1/+2
| | | | llvm-svn: 72830
* Remove a #include of <iostream>.Dan Gohman2009-06-041-1/+0
| | | | llvm-svn: 72828
* Re-apply 72756 with fixes. One of those was introduced by we changed ↵Evan Cheng2009-06-041-1/+8
| | | | | | MachineInstrBuilder::addReg() interface. llvm-svn: 72826
* Removed more testing code that snuck in earlier.Lang Hames2009-06-041-20/+2
| | | | llvm-svn: 72825
* Use uint8_t and int32_t in {JIT,Machine}CodeEmitersBruno Cardoso Lopes2009-06-042-35/+33
| | | | llvm-svn: 72821
* Evan says it's wrong; back out 72808.Stuart Hastings2009-06-031-2/+0
| | | | llvm-svn: 72817
* Recognize another euphemism for MOVDQ2Q.Stuart Hastings2009-06-031-0/+2
| | | | llvm-svn: 72808
* For Darwin / x86_64, override -relocation-model=static to pic if the output ↵Evan Cheng2009-06-031-0/+7
| | | | | | | | is assembly since Darwin assembler does not really support -static codeine. I view this as a temporary workaround until the assembler / linker changes. llvm-svn: 72806
* Convert Alpha and Mips to use a MachineFunctionInfo subclass toDan Gohman2009-06-0310-65/+205
| | | | | | | | | | carry GlobalBaseReg, and GlobalRetAddr too in Alpha's case. This eliminates the need for them to search through the MachineRegisterInfo livein list in order to identify these virtual registers. EmitLiveInCopies is now the only user of the virtual register portion of MachineRegisterInfo's livein data. llvm-svn: 72802
* Remove the redundant TM member from X86DAGToDAGISel; replace itDan Gohman2009-06-031-12/+22
| | | | | | | with an accessor method which simply casts the parent class SelectionDAGISel's TM to the target-specific type. llvm-svn: 72801
* Don't attempt to simplify an non-affine IV expression if it can'tDan Gohman2009-06-031-12/+10
| | | | | | be simplified to a loop-invariant value. This fixes PR4315. llvm-svn: 72798
* Make the buildbot see green (to make it easier to spot the next personMike Stump2009-06-031-1/+2
| | | | | | that puts a new warning in). llvm-svn: 72797
* Move ELFCodeEmiter stuff to new filesBruno Cardoso Lopes2009-06-034-140/+184
| | | | llvm-svn: 72785
* Revert 72650Bruno Cardoso Lopes2009-06-032-33/+35
| | | | llvm-svn: 72783
* Remove unnecessary #includes.Dan Gohman2009-06-031-3/+0
| | | | llvm-svn: 72782
* Emit file directives correctly in case of a .bc is generated by llvm-ld ↵Sanjiv Gupta2009-06-033-11/+34
| | | | | | after linking in several .bc files. llvm-svn: 72781
* FrameIndex could be used as a value (addressof (arg)) or as an address.Sanjiv Gupta2009-06-034-6/+62
| | | | | | | Expand it exactly like GlobalAddress. Fix some more crashes (InsertBranch() not being implemented) for compiling hitec libs. llvm-svn: 72776
* CMake: Added missing source file to lib/CodeGen/CMakeLists.txt.Oscar Fuentes2009-06-031-0/+1
| | | | llvm-svn: 72775
* Fixed a bug in which signed comparisons were being used instead of unsigned ↵Sanjiv Gupta2009-06-032-2/+4
| | | | | | comparisons. llvm-svn: 72771
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