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authorEvan Cheng <evan.cheng@apple.com>2009-06-04 20:53:36 +0000
committerEvan Cheng <evan.cheng@apple.com>2009-06-04 20:53:36 +0000
commitfa0ac19b8284cb8e3987f05a9f2d50394dc83fa2 (patch)
tree2d22c80aa748dda9f9bf45af9dce9c75afcdec81 /llvm/lib
parent9ff058b674b6cda18207bcbabd7d5999892fca57 (diff)
downloadbcm5719-llvm-fa0ac19b8284cb8e3987f05a9f2d50394dc83fa2.tar.gz
bcm5719-llvm-fa0ac19b8284cb8e3987f05a9f2d50394dc83fa2.zip
RALinScan::attemptTrivialCoalescing() was returning a virtual register instead of the physical register it is allocated to. This resulted in virtual register(s) being added the live-in sets.
llvm-svn: 72890
Diffstat (limited to 'llvm/lib')
-rw-r--r--llvm/lib/CodeGen/RegAllocLinearScan.cpp12
1 files changed, 9 insertions, 3 deletions
diff --git a/llvm/lib/CodeGen/RegAllocLinearScan.cpp b/llvm/lib/CodeGen/RegAllocLinearScan.cpp
index ab4068e6e4c..804fae55e54 100644
--- a/llvm/lib/CodeGen/RegAllocLinearScan.cpp
+++ b/llvm/lib/CodeGen/RegAllocLinearScan.cpp
@@ -398,7 +398,7 @@ unsigned RALinScan::attemptTrivialCoalescing(LiveInterval &cur, unsigned Reg) {
}
++NumCoalesce;
- return SrcReg;
+ return PhysReg;
}
return Reg;
@@ -555,8 +555,11 @@ void RALinScan::linearScan()
re = mri_->reg_end(); ri != re; ++ri) {
MachineInstr *UseMI = &*ri;
MachineBasicBlock *UseMBB = UseMI->getParent();
- if (Seen.insert(UseMBB))
+ if (Seen.insert(UseMBB)) {
+ assert(TargetRegisterInfo::isPhysicalRegister(Reg) &&
+ "Adding a virtual register to livein set?");
UseMBB->addLiveIn(Reg);
+ }
}
}
}
@@ -565,8 +568,11 @@ void RALinScan::linearScan()
const LiveRange &LR = *I;
if (li_->findLiveInMBBs(LR.start, LR.end, LiveInMBBs)) {
for (unsigned i = 0, e = LiveInMBBs.size(); i != e; ++i)
- if (LiveInMBBs[i] != EntryMBB)
+ if (LiveInMBBs[i] != EntryMBB) {
+ assert(TargetRegisterInfo::isPhysicalRegister(Reg) &&
+ "Adding a virtual register to livein set?");
LiveInMBBs[i]->addLiveIn(Reg);
+ }
LiveInMBBs.clear();
}
}
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