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* Check bb to ensure that alloca is in separate basic block.Devang Patel2010-09-151-7/+9
| | | | | | This fixes funcargs.exp regression reported by gdb testsuite. llvm-svn: 113992
* Recognize VST1q64Pseudo and VSTMQ as stack slot stores.Jakob Stoklund Olesen2010-09-151-0/+22
| | | | | | | | | Recognize VLD1q64Pseudo as a stack slot load. Reject these if they are loading or storing a subregister. The API (and VirtRegRewriter) doesn't know how to deal with that. llvm-svn: 113985
* Reapply Gabor's 113839, 113840, and 113876 with a fix for a problemBob Wilson2010-09-151-0/+17
| | | | | | | | encountered while building llvm-gcc for arm. This is probably the same issue that the ppc buildbot hit. llvm::prior works on a MachineBasicBlock::iterator, not a plain MachineInstr. llvm-svn: 113983
* the darwin9-powerpc buildbot keeps consistently crashing,Gabor Greif2010-09-151-16/+0
| | | | | | | | | | backing out following to get it back to green, so I can investigate in peace: svn merge -c -113840 llvm/test/CodeGen/ARM/arm-and-tst-peephole.ll svn merge -c -113876 -c -113839 llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp llvm-svn: 113980
* Move ARM is{LoadFrom,StoreTo}StackSlot closer to their siblings so they won't beJakob Stoklund Olesen2010-09-151-78/+64
| | | | | | | | | | forgotten in the future. Coalesce identical cases in switch. No functional changes intended. llvm-svn: 113979
* Spelling fix.Bob Wilson2010-09-152-2/+2
| | | | llvm-svn: 113978
* llvmc: make -x work with unknown suffixes.Mikhail Glushenkov2010-09-151-2/+3
| | | | llvm-svn: 113972
* If dbg.declare from non-entry block is using alloca from entry block then ↵Devang Patel2010-09-151-2/+14
| | | | | | use offset available in StaticAllocaMap to emit DBG_VALUE. Right now, this has no material impact because varible info also collected using offset table maintained in machine module info. llvm-svn: 113967
* lcall and ljmp always default to lcalll and ljmpl. This finallyChris Lattner2010-09-151-10/+8
| | | | | | wraps up r8418316 llvm-svn: 113949
* apparently jmpl $1,$2 is an alias for ljmpl, similiarlyChris Lattner2010-09-151-0/+21
| | | | | | for call. Add this. llvm-svn: 113948
* Disambiguate lcall/ljmp to the 32-bit version. This happensChris Lattner2010-09-151-0/+10
| | | | | | even in 64-bit mode apparently. llvm-svn: 113945
* fix the encoding of sldt GR16 to have the 0x66 prefix, andChris Lattner2010-09-151-1/+3
| | | | | | | add sldt GR32, which isn't documented in the intel manual but which gas accepts. Part of rdar://8418316 llvm-svn: 113938
* implement aliases for shld/shrd, part of rdar://8418316Chris Lattner2010-09-151-0/+9
| | | | llvm-svn: 113937
* fix rdar://8431880 - rcl/rcr with no shift amount not recognizedChris Lattner2010-09-151-1/+9
| | | | llvm-svn: 113936
* add various broken forms of fnstsw. I didn't add the %raxChris Lattner2010-09-151-0/+19
| | | | | | | version because it adds a prefix and makes even less sense than the other broken forms. This wraps up rdar://8431422 llvm-svn: 113932
* add some aliases for f[u]comi, part of rdar://8431422Chris Lattner2010-09-151-7/+9
| | | | llvm-svn: 113930
* add a bunch of aliases for fp operations with no operand,Chris Lattner2010-09-151-5/+22
| | | | | | rdar://8431422 llvm-svn: 113929
* Diagnose invalid instructions like "incl" with "too few operands for ↵Chris Lattner2010-09-151-2/+4
| | | | | | | | | instruction" instead of crashing. This fixes: rdar://8431815 - crash when invalid operand is one that isn't present llvm-svn: 113921
* Use VLD1/VST1 pseudo instructions for loadRegFromStackSlot andBob Wilson2010-09-152-33/+9
| | | | | | storeRegToStackSlot. llvm-svn: 113918
* trailing whitespaceJim Grosbach2010-09-151-25/+25
| | | | llvm-svn: 113915
* Add x86MMX a few more places.Dale Johannesen2010-09-152-0/+2
| | | | llvm-svn: 113914
* fix PR8144, a bug where constant merge would merge globals markedChris Lattner2010-09-151-1/+27
| | | | | | attribute(used). llvm-svn: 113911
* Reapply r113875 with additional cleanups.Jim Grosbach2010-09-143-116/+33
| | | | | | | | | | | | | | | "The register specified for a dregpair is the corresponding Q register, so to get the pair, we need to look up the sub-regs based on the qreg. Create a lookup function since we don't have access to TargetRegisterInfo here to be able to use getSubReg(ARM::dsub_[01])." Additionaly, fix the NEON VLD1* and VST1* instruction patterns not to use the dregpair modifier for the 2xdreg versions. Explicitly specifying the two registers as operands is more correct and more consistent with the other instruction patterns. This enables further cleanup of special case code in the disassembler as a nice side-effect. llvm-svn: 113903
* add a terrible hack to allow out with dx is parens, a gas bug.Chris Lattner2010-09-141-0/+14
| | | | | | This fixes PR8114 llvm-svn: 113894
* Convert TBAA to use the new TBAATag field of AliasAnalysis::Location.Dan Gohman2010-09-141-20/+4
| | | | llvm-svn: 113892
* Emit libcalls for SDIV, this requires some call infrastructureEric Christopher2010-09-141-0/+154
| | | | | | that needs to be shared a bit more widely around. llvm-svn: 113886
* revert 113875 momentarilly. Need to fix the MC disassembler to handle theJim Grosbach2010-09-141-23/+77
| | | | | | change. llvm-svn: 113878
* trailing whitespace cleanupJim Grosbach2010-09-141-23/+23
| | | | llvm-svn: 113877
* an attempt to salvage the darwin9-powerpc buildbot, which could be ↵Gabor Greif2010-09-141-1/+2
| | | | | | miscompiling this line llvm-svn: 113876
* The register specified for a dregpair is the corresponding Q register, so toJim Grosbach2010-09-141-77/+23
| | | | | | | | get the pair, we need to look up the sub-regs based on the qreg. Create a lookup function since we don't have access to TargetRegisterInfo here to be able to use getSubReg(ARM::dsub_[01]). llvm-svn: 113875
* set isCompare for another three Thumb1 instructionsGabor Greif2010-09-141-2/+2
| | | | llvm-svn: 113867
* Add predicate and 's' bit operands to PICADD instruction lowering.Jim Grosbach2010-09-141-0/+5
| | | | llvm-svn: 113860
* Remove the experimental AliasAnalysis::getDependency interface, whichDan Gohman2010-09-149-379/+143
| | | | | | | | | | | isn't a good level of abstraction for memdep. Instead, generalize AliasAnalysis::alias and related interfaces with a new Location class for describing a memory location. For now, this is the same Pointer and Size as before, plus an additional field for a TBAA tag. Also, introduce a fixed MD_tbaa metadata tag kind. llvm-svn: 113858
* Avoid warnings.Bob Wilson2010-09-141-2/+3
| | | | llvm-svn: 113857
* fix comment typoJim Grosbach2010-09-141-1/+1
| | | | llvm-svn: 113856
* Make NEON ld/st pseudo instruction classes take the instruction itinerary asBob Wilson2010-09-141-123/+123
| | | | | | | | | an argument, so that we can distinguish instructions with the same register classes but different numbers of registers (e.g., vld3 and vld4). Fix some of the non-pseudo NEON ld/st instruction itineraries to reflect the number of registers loaded or stored, not just the opcode name. llvm-svn: 113854
* Remove the option to disable LazyValueInfo in JumpThreading, as it is nowOwen Anderson2010-09-141-110/+37
| | | | | | on by default and has received significant testing. llvm-svn: 113852
* set comparable for a bunch of Thumb instructionsGabor Greif2010-09-141-2/+2
| | | | llvm-svn: 113849
* must not peephole away side effectsGabor Greif2010-09-141-1/+2
| | | | llvm-svn: 113848
* Don't ignore the CPSR implicit def when lowering a MachineInstruction to an ↵Jim Grosbach2010-09-141-2/+3
| | | | | | MCInst. llvm-svn: 113847
* Clarify commentJim Grosbach2010-09-141-2/+2
| | | | llvm-svn: 113846
* Use frame index, if available for byval argument while lowering dbg_declare. ↵Devang Patel2010-09-141-16/+20
| | | | | | Otherwise let getRegForValue() find register for this argument. llvm-svn: 113843
* Eliminate a 'tst' that immediately follows an 'and'Gabor Greif2010-09-141-0/+15
| | | | | | | | | | | | | | | | by morphing the 'and' to its recording form 'andS'. This is basically a test commit into this area, to see whether the bots like me. Several generalizations can be applied and various avenues of code simplification are open. I'll introduce those as I go. I am aware of stylistic input from Bill Wendling, about where put the analysis complexity, but I am positive that we can move things around easily and will find a satisfactory solution. llvm-svn: 113839
* Fix QOpcode assignment to Opc.Eric Christopher2010-09-141-2/+2
| | | | llvm-svn: 113837
* CBackend: Fix MSVC build.Michael J. Spencer2010-09-141-0/+4
| | | | | | This may produce warnings on MSVS, but it's better than failures. llvm-svn: 113834
* CBackend: Cleanup whitespace before I do this next commit.Michael J. Spencer2010-09-141-155/+155
| | | | llvm-svn: 113833
* When a function-local value with function-local metadata uses gets RAUWed with aDan Gohman2010-09-141-0/+18
| | | | | | | | | | | non-function-local value, it may result in the metadata no longer needing to be function-local. Check for this condition, and clear the isFunctionLocal flag, if it's still in the uniquing map, since any node in the uniquing map needs to have an accurate function-local flag. Also, add an assert to help catch problematic cases. llvm-svn: 113828
* fix PR8102, a case where we'd copyValue from a value that we alreadyChris Lattner2010-09-141-11/+11
| | | | | | | | deleted. Fix this by doing the copyValue's before we delete stuff! The testcase only repros the problem on my system with valgrind. llvm-svn: 113820
* Revert "CMake: Get rid of LLVMLibDeps.cmake and export the libraries normally."Michael J. Spencer2010-09-1327-135/+14
| | | | | | | | | | This reverts commit r113632 Conflicts: cmake/modules/AddLLVM.cmake llvm-svn: 113819
* Convert some VTBL and VTBX instructions to use pseudo instructions prior toBob Wilson2010-09-138-290/+86
| | | | | | | register allocation. Remove the NEONPreAllocPass, which is no longer needed. Yeah!! llvm-svn: 113818
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