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* [ExecutionEngine] Fix dependence issue by moving RTDyldMemoryManager intoLang Hames2015-02-154-2/+2
| | | | | | | | RuntimeDyld. This should fix http://llvm.org/PR22593. llvm-svn: 229343
* Removing LLVM_DELETED_FUNCTION, as MSVC 2012 was the last reason for ↵Aaron Ballman2015-02-1523-59/+58
| | | | | | requiring the macro. NFC; LLVM edition. llvm-svn: 229340
* Format: Modernize using variadic templates.Benjamin Kramer2015-02-152-4/+4
| | | | | | | | | | | Introduces a subset of C++14 integer sequences in STLExtras. This is just enough to support unpacking a std::tuple into the arguments of snprintf, we can add more of it when it's actually needed. Also removes an ancient macro hack that leaks a macro into the global namespace. Clean up users that made use of the convenient hack. llvm-svn: 229337
* Removing LLVM_EXPLICIT, as MSVC 2012 was the last reason for requiring the ↵Aaron Ballman2015-02-153-3/+3
| | | | | | macro. NFC; LLVM edition. llvm-svn: 229335
* llvm-pdbdump: Add flags controlling the type of values to dump.Zachary Turner2015-02-1532-226/+240
| | | | llvm-svn: 229330
* Revert 229175Philip Reames2015-02-151-3/+1
| | | | | | This change is a logical suspect in 22587 and 22590. Given it's of minimal importanance and I can't get clang to build on my home machine, I'm reverting so that I can deal with this next week. llvm-svn: 229322
* [ADCE] Convert another loop for a range-based forHal Finkel2015-02-151-2/+2
| | | | | | We can use a range-based for for the operands loop too; NFC. llvm-svn: 229319
* [ADCE] Use inst_range and range-based forsHal Finkel2015-02-151-14/+13
| | | | | | Convert a few loops to range-based fors; NFC. llvm-svn: 229318
* [ADCE] Fix formatting of pointer typesHal Finkel2015-02-151-2/+2
| | | | | | We prefer to put the * with the variable, not with the type; NFC. llvm-svn: 229317
* [ADCE] Fix capitalization of another local variableHal Finkel2015-02-151-2/+2
| | | | | | Bring another local variable in compliance with our naming conventions, NFC. llvm-svn: 229316
* [ADCE] Fix capitalization of some local variablesHal Finkel2015-02-151-14/+14
| | | | | | Bring some local variables in compliance with our naming conventions, NFC. llvm-svn: 229315
* Coding style fixes to recent patches. NFC.Simon Pilgrim2015-02-151-6/+6
| | | | llvm-svn: 229312
* [X86][AVX2] vpslldq/vpsrldq byte shifts for AVX2Simon Pilgrim2015-02-152-62/+79
| | | | | | | | | | This patch refactors the existing lowerVectorShuffleAsByteShift function to add support for 256-bit vectors on AVX2 targets. It also fixes a tablegen issue that prevented the lowering of vpslldq/vpsrldq vec256 instructions. Differential Revision: http://reviews.llvm.org/D7596 llvm-svn: 229311
* [x86] Teach the decomposed shuffle/blend lowering to use an early blendChandler Carruth2015-02-151-3/+14
| | | | | | | | | | | | when that will allow it to lower with a single permute instead of multiple permutes. It tries to detect when it will only have to do a single permute in either case to maximize folding of loads and such. This cuts a *lot* of the avx2 shuffle permute counts in half. =] llvm-svn: 229309
* [SDAG] Teach the SelectionDAG to canonicalize vector shuffles of splatsChandler Carruth2015-02-151-0/+28
| | | | | | | | | | | | | | | directly into blends of the splats. These patterns show up even very late in the vector shuffle lowering where we don't have any chance for DAG combining to kick in, and blending is a tremendously simpler operation to model. By coercing the shuffle into a blend we can much more easily match and lower shuffles of splats. Immediately with this change there are significantly more blends being matched in the x86 vector shuffle lowering. llvm-svn: 229308
* [x86] Teach the shuffle mask equivalence test to look through buildChandler Carruth2015-02-151-52/+65
| | | | | | | | | | | | | | | | vectors and detect equivalent inputs. This lets the code match unpck-style instructions when only one of the inputs are lined up but the other input is a splat and so which lanes we pull from doesn't matter. Today, this doesn't really happen, but just by accident. I have a patch that normalizes how we shuffle splats, and with that patch this will be necessary for a lot of the mask equivalence tests to work. I don't really know how to write a test case for this specific change until the other change lands though. llvm-svn: 229307
* [x86] Tweak the ordering of unpack matching vs. element insertion, andChandler Carruth2015-02-151-17/+21
| | | | | | | | | | | | | | | | | don't try to do element insertion for non-zero-index floating point vectors. We don't have any useful patterns or lowering for element insertion into high elements of a floating point vector, and the generic shuffle lowering will end up being better -- namely it will fall back to unpck. But we should try to handle other forms of element insertion before matching unpck patterns. While this doesn't matter much right now, I'm working on a patch that makes unpck matching much more powerful, and that patch will break without this re-ordering. llvm-svn: 229306
* [x86] Stop shuffling zero vectors. =]Chandler Carruth2015-02-151-0/+7
| | | | | | | | | I was somewhat surprised this pattern really came up, but it does. It seems better to just directly handle it than try to special case every place where we end up forming a shuffle that devolves to a shuffle of a zero vector. llvm-svn: 229301
* [x86] Use a more helpful parenthesizing of these comparisons. SilencesChandler Carruth2015-02-151-2/+2
| | | | | | a -Wparentheses complaint from GCC. llvm-svn: 229300
* [x86] When splitting 256-bit vectors into 128-bit vectors, don't extractChandler Carruth2015-02-151-8/+37
| | | | | | | | | | | | | subvectors from buildvectors. That doesn't really make any sense and it breaks all of the down-stream matching of buildvectors to cleverly lower shuffles. With this, we now get the shift-based lowering of 256-bit vector shuffles with AVX1 when we split them into 128-bit vectors. We also do much better on the zero-extension patterns, although there remains quite a bit of room for improvement here. llvm-svn: 229299
* [x86] Make computing the zeroable elements slightly more powerful, atChandler Carruth2015-02-151-3/+8
| | | | | | | | | | | | least in theory. I don't actually have a test case that benefits from this, but theoretically, it could come up, and I don't want to try to think about whether this is the culprit or something else is, so I'd rather just make this code powerful. =/ Makes me sad that I can't really test it though. llvm-svn: 229298
* [x86] Add a slight variation on some of the other generic shuffleChandler Carruth2015-02-151-0/+55
| | | | | | | | | | | | | | | lowerings -- one which decomposes into an initial blend followed by a permute. Particularly on newer chips, blends are handled independently of shuffles and so this is much less bottlenecked on the single port that floating point shuffles are executed with on Intel. I'll be adding this lowering to a bunch of other code paths in subsequent commits to handle still more places where we can effectively leverage blends when they're available in the ISA. llvm-svn: 229292
* Enabled cost calculation for masked memory operations.Elena Demikhovsky2015-02-151-1/+5
| | | | | | | We already have implementation for cost calculation for masked memory operations. I just call it from the loop vectorizer. llvm-svn: 229290
* [X86] Add assembly parser support for mnemonic aliases for AVX-512 vpcmp ↵Craig Topper2015-02-151-12/+39
| | | | | | instructions. llvm-svn: 229287
* [x86] Fix PR22377, a regression with the new vector shuffle legalityChandler Carruth2015-02-151-2/+3
| | | | | | | | | | | test. This was just a matter of the DAG combine for vector shuffles being too aggressive. This is a bit of a grey area, but I think generally if we can re-use intermediate shuffles, we should. Certainly, given the test cases I have available, this seems like the right call. llvm-svn: 229285
* [X86] Add assembler predicates for the rest of the AVX512 feature flags. ↵Craig Topper2015-02-151-6/+11
| | | | | | This makes the assembly matching consistent across all AVX512 instructions. Without this we were allowing some AVX512 instructions to be parsed always, but not the foundation instructions. llvm-svn: 229280
* [X86] Add the remaining 11 possible exact ModRM formats. This makes their ↵Craig Topper2015-02-153-103/+57
| | | | | | encodings linear which can then be used to simplify some other code. llvm-svn: 229279
* [X86][XOP] Enable commutation for XOP instructionsSimon Pilgrim2015-02-142-68/+115
| | | | | | | | | | Patch to allow XOP instructions (integer comparison and integer multiply-add) to be commuted. The comparison instructions sometimes require the compare mode to be flipped but the remaining instructions can use default commutation modes. This patch also sets the SSE domains of all the XOP instructions. Differential Revision: http://reviews.llvm.org/D7646 llvm-svn: 229267
* [X86] Improve parsing support AVX/SSE floating point compare instruction ↵Craig Topper2015-02-141-19/+9
| | | | | | mnemonic aliases. They'll now print with the alias the parser received instead of converting to the explicit immediate form. llvm-svn: 229266
* InstCombine: propagate deref via new addDereferenceableAttrRamkumar Ramachandra2015-02-144-2/+33
| | | | | | | | | | | | | | | | | The "dereferenceable" attribute cannot be added via .addAttribute(), since it also expects a size in bytes. AttrBuilder#addAttribute or AttributeSet#addAttribute is wrapped by classes Function, InvokeInst, and CallInst. Add corresponding wrappers to AttrBuilder#addDereferenceableAttr. Having done this, propagate the dereferenceable attribute via gc.relocate, adding a test to exercise it. Note that -datalayout is required during execution over and above -instcombine, because InstCombine only optionally requires DataLayoutPass. Differential Revision: http://reviews.llvm.org/D7510 llvm-svn: 229265
* Target: Canonicalize access to function attributes, NFCDuncan P. N. Exon Smith2015-02-141-4/+2
| | | | | | | | | | | | Canonicalize access to function attributes to use the simpler API. getAttributes().getAttribute(AttributeSet::FunctionIndex, Kind) => getFnAttribute(Kind) getAttributes().hasAttribute(AttributeSet::FunctionIndex, Kind) => hasFnAttribute(Kind) llvm-svn: 229261
* NVPTX: Canonicalize access to function attributes, NFCDuncan P. N. Exon Smith2015-02-141-3/+1
| | | | | | | | | | | | Canonicalize access to function attributes to use the simpler API. getAttributes().getAttribute(AttributeSet::FunctionIndex, Kind) => getFnAttribute(Kind) getAttributes().hasAttribute(AttributeSet::FunctionIndex, Kind) => hasFnAttribute(Kind) llvm-svn: 229260
* [optnone] Skip pass Constant Hoisting on optnone functions.Andrea Di Biagio2015-02-141-0/+3
| | | | | | | Added test CodeGen/X86/constant-hoisting-optnone.ll to verify that pass Constant Hoisting is not run on optnone functions. llvm-svn: 229258
* Line ending fix. NFC.Simon Pilgrim2015-02-141-81/+81
| | | | llvm-svn: 229256
* Remove a variable only used in an assert and sink its initializer intoChandler Carruth2015-02-141-2/+1
| | | | | | the assert. Fixes -Wunused-variable on non-asserts builds. llvm-svn: 229250
* R600/SI: Implement correct f64 fdivMatt Arsenault2015-02-146-25/+79
| | | | | | This version passes the OpenCL conformance test. llvm-svn: 229239
* R600/SI: Use complex operand folding for div_scaleMatt Arsenault2015-02-141-12/+7
| | | | llvm-svn: 229238
* R600/SI: Fix implicit vcc operand to v_div_fmas_*Matt Arsenault2015-02-144-7/+46
| | | | | | | | | This should allow finally fixing the f64 fdiv implementation. Test is disabled for VI since there seems to be a problem with one of the buffer load instructions on it. llvm-svn: 229236
* R600/SI: Fix schedule model for v_div_scale_{f32|f64}Matt Arsenault2015-02-141-1/+3
| | | | llvm-svn: 229235
* R600/SI: Really fix size of VReg_1Matt Arsenault2015-02-141-1/+3
| | | | llvm-svn: 229234
* R600/SI: Rename encoding field to match docs for VOP3bMatt Arsenault2015-02-141-2/+2
| | | | llvm-svn: 229233
* llvm-pdbdump: Only dump whitelisted global symbols.Zachary Turner2015-02-143-25/+37
| | | | | | | | | | Dumping the global scope contains a lot of very uninteresting things and is generally polluted with a lot of random junk. Furthermore, it dumps values unsorted, making it hard to read. This patch dumps known interesting types only, and as a side effect sorts the list by symbol type. llvm-svn: 229232
* llvm-pdbdump: Re-order header files according to LLVM style guide.Zachary Turner2015-02-1436-38/+109
| | | | llvm-svn: 229231
* R600/SI: Fix not encoding src2 for v_div_scale_{f32|f64}Matt Arsenault2015-02-141-1/+14
| | | | | | This apparently got lost in the VI changes. llvm-svn: 229230
* R600/SI: Fix VOP3b encoding on VIMatt Arsenault2015-02-143-11/+43
| | | | llvm-svn: 229228
* R600/SI: Fix phys reg copies in SIFoldOperandsMatt Arsenault2015-02-141-3/+13
| | | | llvm-svn: 229227
* R600/SI: Fix copies from SGPR to VCCMatt Arsenault2015-02-141-5/+10
| | | | | | | This shows up without optimizations when vcc is required to be used. llvm-svn: 229226
* R600/SI: Add hack to copy from a VGPR to VCCMatt Arsenault2015-02-141-0/+10
| | | | | | This hopefully should be fixed when VReg_1 is removed. llvm-svn: 229225
* PowerPC: Canonicalize access to function attributes, NFCDuncan P. N. Exon Smith2015-02-144-19/+9
| | | | | | | | | | | | Canonicalize access to function attributes to use the simpler API. getAttributes().getAttribute(AttributeSet::FunctionIndex, Kind) => getFnAttribute(Kind) getAttributes().hasAttribute(AttributeSet::FunctionIndex, Kind) => hasFnAttribute(Kind) llvm-svn: 229224
* R600/SI: Fix size of VReg_1Matt Arsenault2015-02-141-1/+1
| | | | | | | This is really a 32-bit register, if we try to check the size of it, we want 32-bits. llvm-svn: 229223
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