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* [mips][msa] Fix vector insertions where the index is variableDaniel Sanders2014-04-303-0/+172
| | | | | | | | | | | | | | | | | | | | | Summary: This isn't supported directly so we rotate the vector by the desired number of elements, insert to element zero, then rotate back. The i64 case generates rather poor code on MIPS32. There is an obvious optimisation to be made in future (do both insert.w's inside a shared rotate/unrotate sequence) but for now it's sufficient to select valid code instead of aborting. Depends on D3536 Reviewers: matheusalmeida Reviewed By: matheusalmeida Differential Revision: http://reviews.llvm.org/D3537 llvm-svn: 207640
* ARM64: accept ELF-relocated load/store insts without a #.Tim Northover2014-04-301-0/+1
| | | | | | | E.g. we print "ldr x0, [x0, :lo12:symbol]" so we need to accept that syntax too. llvm-svn: 207639
* ARM64: remove duplication by templating InstPrinter methodsTim Northover2014-04-304-215/+65
| | | | | | No functional change, so no tests. llvm-svn: 207638
* [mips] Add support for .cpload.Matheus Almeida2014-04-303-0/+100
| | | | | | | | | | | | | | | | | | | | Summary: This directive is used for setting up $gp in the beginning of a function. It expands to three instructions if PIC is enabled: lui $gp, %hi(_gp_disp) addui $gp, $gp, %lo(_gp_disp) addu $gp, $gp, $reg _gp_disp is a special symbol that the linker sets to the distance between the lui instruction and the context pointer (_gp). Reviewers: dsanders Reviewed By: dsanders Differential Revision: http://reviews.llvm.org/D3480 llvm-svn: 207637
* ARM64: use hex immediates for movz/movk instructionsTim Northover2014-04-301-0/+1
| | | | | | | | Since these are mostly used in "lsl #16", "lsl #32", "lsl #48" combinations to piece together an immediate in 16-bit chunks, hex is probably the most appropriate format. llvm-svn: 207635
* ARM64: hexify printing various immediate operandsTim Northover2014-04-303-0/+10
| | | | | | | | | | This is mostly aimed at the NEON logical operations and MOVI/MVNI (since they accept weird shifts which are more naturally understandable in hex notation). Also changes BRK/HINT etc, which is probably a neutral change, but easier than the alternative. llvm-svn: 207634
* ARM64: print canonical syntax for add/sub (imm) instructions.Tim Northover2014-04-301-3/+5
| | | | | | | | | | Since these instructions only accept a 12-bit immediate, possibly shifted left by 12, the canonical syntax used by the architecture reference manual is "#N {, lsl #12 }". We should accept an immediate that has already been shifted, (e.g. Also, print a comment giving the full addend since it can be helpful. llvm-svn: 207633
* [LCG] Add the really, *really* boring edge insertion case: adding anChandler Carruth2014-04-301-4/+19
| | | | | | | | | | edge entirely within an existing SCC. Shockingly, making the connected component more connected is ... a total snooze fest. =] Anyways, its wired up, and I even added a test case to make sure it pretty much sorta works. =D llvm-svn: 207631
* [ARM64] Simplify if condition.James Molloy2014-04-301-6/+2
| | | | | | | v2f32 and v4f32 were missed out of these conditions, so this is also a bugfix. llvm-svn: 207628
* [ARM64] Fix stupid copy-pasto in ARM64MCAsmInfo.cpp - aarch64_be -> arm64_beJames Molloy2014-04-301-1/+1
| | | | llvm-svn: 207627
* [ARM64] Try and make the ELF MCJIT *slightly* less broken for ARM64.James Molloy2014-04-303-3/+11
| | | | | | | | | A bunch of switch cases were missing, not just for ARM64 but also for AArch64_BE. I've fixed all those, but there's zero testing as ExecutionEngine tests are disabled when crosscompiling and I don't have a native platform available to test on. llvm-svn: 207626
* [ARM64] Ensure arm64_be is dealt with when emitting debug info.James Molloy2014-04-301-1/+2
| | | | | | | This is a partial port of r204816 (cpirker "Elf support for MC-JIT runtime dynamic linker") from AArch64 to ARM64. llvm-svn: 207625
* ARM64: make sure FastISel uses a GPR64 source in 64-bit extensions.Tim Northover2014-04-301-0/+9
| | | | llvm-svn: 207620
* [LCG] Actually test the *basic* edge removal bits (IE, the non-SCCChandler Carruth2014-04-301-4/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | bits), and discover that it's totally broken. Yay tests. Boo bug. Fix the basic edge removal so that it works by nulling out the removed edges rather than actually removing them. This leaves the indices valid in the map from callee to index, and preserves some of the locality for iterating over edges. The iterator is made bidirectional to reflect that it now has to skip over null entries, and the skipping logic is layered onto it. As future work, I would like to track essentially the "load factor" of the edge list, and when it falls below a threshold do a compaction. An alternative I considered (and continue to consider) is storing the callees in a doubly linked list where each element of the list is in a set (which is essentially the classical linked-hash-table datastructure). The problem with that approach is that either you need to heap allocate the linked list nodes and use pointers to them, or use a bucket hash table (with even *more* linked list pointer overhead!), etc. It's pretty easy to get 5x overhead for values that are just pointers. So far, I think punching holes in the vector, and periodic compaction is likely to be much more efficient overall in the space/time tradeoff. llvm-svn: 207619
* Add a <tuple> include to more files that aren't getting it transitively on MSVC.Benjamin Kramer2014-04-302-0/+2
| | | | llvm-svn: 207617
* Use makeArrayRef insted of calling ArrayRef<T> constructor directly. I ↵Craig Topper2014-04-3013-44/+37
| | | | | | introduced most of these recently. llvm-svn: 207616
* ARM: support stack probe emission for Windows on ARMSaleem Abdulrasool2014-04-301-4/+59
| | | | | | | | | | | | | | | | | This introduces the stack lowering emission of the stack probe function for Windows on ARM. The stack on Windows on ARM is a dynamically paged stack where any page allocation which crosses a page boundary of the following guard page will cause a page fault. This page fault must be handled by the kernel to ensure that the page is faulted in. If this does not occur and a write access any memory beyond that, the page fault will go unserviced, resulting in an abnormal program termination. The watermark for the stack probe appears to be at 4080 bytes (for accommodating the stack guard canaries and stack alignment) when SSP is enabled. Otherwise, the stack probe is emitted on the page size boundary of 4096 bytes. llvm-svn: 207615
* ConstantHoisting.cpp: Add <tuple> for std::tie, since r207593 removed ↵NAKAMURA Takumi2014-04-301-0/+1
| | | | | | FileSystem.h, it includes <tuple>. llvm-svn: 207614
* ARM: print COFF function header for Windows on ARMSaleem Abdulrasool2014-04-301-1/+23
| | | | | | | | | Emit the COFF header when printing out the function. This is important as the header contains two important pieces of information: the storage class for the symbol and the symbol type information. This bit of information is required for the linker to correctly identify the type of symbol that it is dealing with. llvm-svn: 207613
* De-virtualize or remove some methods that have no overrides nor override ↵Craig Topper2014-04-307-27/+7
| | | | | | anything. In some cases remove all together if there are no callers either. llvm-svn: 207610
* ARM: move llvm_unreachable useSaleem Abdulrasool2014-04-301-1/+1
| | | | | | | | When building with -Werror=covered-switch-default (as on the buildbots), the build would fail since all cases are covered by the switch. Move the llvm_unreachable to the end of the function as an annotation. llvm-svn: 207609
* ARM: partially handle 32-bit relocations for WoASaleem Abdulrasool2014-04-301-0/+45
| | | | | | | | | | | | | | | IMAGE_REL_ARM_MOV32T relocations require that the movw/movt pair-wise relocation is not split up and reordered. When expanding the mov32imm pseudo-instruction, create a bundle if the machine operand is referencing an address. This helps ensure that the relocatable address load is not reordered by subsequent passes. Unfortunately, this only partially handles the case as the Constant Island Pass occurs after the instructions are unbundled and does not properly handle bundles. That is a more fundamental issue with the pass itself and beyond the scope of this change. llvm-svn: 207608
* Simplify getSymbolOffset.Rafael Espindola2014-04-301-26/+28
| | | | | | | We can now use EvaluateAsValue to make it non recursive and remove some code duplication. llvm-svn: 207604
* [DWARF parser] Cleanup code in DWARFDebugLine.Alexey Samsonov2014-04-303-128/+112
| | | | | | | | | | | | | | | | | | Streamline parsing and dumping line tables: Prefer composition to multiple inheritance in DWARFDebugLine::ParsingState. Get rid of the weird concept of "DumpingState" structure. was: DWARFDebugLine::DumpingState state(OS); DWARFDebugLine::parseStatementTable(..., state); now: DWARFDebugLine::LineTable LineTable; LineTable.parse(...); LineTable.dump(OS); No functionality change. llvm-svn: 207599
* Implement X86 code generation for musttailReid Kleckner2014-04-291-45/+50
| | | | | | | | | | | | | | | | | | Currently, musttail codegen is relying on sibcall optimization, and reporting a fatal error if fails. Sibcall optimization fails when stack arguments need to be modified, which is insufficient for musttail. The logic for moving arguments in memory safely is already implemented for GuaranteedTailCallOpt. This change merely arranges for musttail calls to use it. No functional change for GuaranteedTailCallOpt. Reviewers: espindola Differential Revision: http://reviews.llvm.org/D3493 llvm-svn: 207598
* Fix the build with MSVC 2013 by explicitly requesting llvm::make_uniqueReid Kleckner2014-04-291-13/+17
| | | | | | | MSVC 2013 provides std::make_unique, which it finds with ADL when one of the parameters is std::unique_ptr, leading to an ambiguous overload. llvm-svn: 207597
* Another missing include for MSVC.Benjamin Kramer2014-04-291-1/+1
| | | | llvm-svn: 207596
* Fix some 80 cols violations committed in r207539David Blaikie2014-04-292-4/+8
| | | | | | Caught by Eric Christopher in post-commit review. llvm-svn: 207595
* Try to fix the msvc build.Benjamin Kramer2014-04-291-0/+1
| | | | llvm-svn: 207594
* raw_ostream: Forward declare OpenFlags and include FileSystem.h only where ↵Benjamin Kramer2014-04-2913-0/+13
| | | | | | necessary. llvm-svn: 207593
* R600: Remove duplicate setting of SELECT expansion.Tom Stellard2014-04-291-2/+0
| | | | | | | | | | It's already set in AMDGPUISelLowering for all GPUs Patch By: Jan Vesely Signed-off-by: Jan Vesely <jan.vesely@rutgers.edu> Reviewed-by: Tom Stellard <thomas.stellard@amd.com> llvm-svn: 207592
* R600/SI: Custom lower SI_IF and SI_ELSE to avoid machine verifier errorsTom Stellard2014-04-292-15/+63
| | | | | | | | | | | | | | | | SI_IF and SI_ELSE are terminators which also produce a value. For these instructions ISel always inserts a COPY to move their value to another basic block. This COPY ends up between SI_(IF|ELSE) and the S_BRANCH* instruction at the end of the block. This breaks MachineBasicBlock::getFirstTerminator() and also the machine verifier which assumes that terminators are grouped together at the end of blocks. To solve this we coalesce the copy away right after ISel to make sure there are no instructions in between terminators at the end of blocks. llvm-svn: 207591
* R600/SI: Only select SALU instructions in the entry or exit blockTom Stellard2014-04-292-27/+117
| | | | | | | | SALU instructions ignore control flow, so it is not always safe to use them within branches. This is a partial solution to this problem until we can come up with something better. llvm-svn: 207590
* R600: optimize the UDIVREM 64 algorithmTom Stellard2014-04-291-22/+44
| | | | | | | | | | | | | | | | This is a squash of several optimization commits: - calculate DIV_Lo and DIV_Hi separately - use BFE_U32 if we are operating on 32bit values - use precomputed constants instead of shifting in UDVIREM - skip the first 32 iterations of udivrem v2: Check whether BFE is supported before using it Patch by: Jan Vesely Signed-off-by: Jan Vesely <jan.vesely@rutgers.edu> Reviewed-by: Tom Stellard <thomas.stellard@amd.com> llvm-svn: 207589
* R600: Implement iterative algorithm for udivremTom Stellard2014-04-291-0/+50
| | | | | | | | | | Initial implementation, rather slow Patch by: Jan Vesely Signed-off-by: Jan Vesely <jan.vesely@rutgers.edu> Reviewed-by: Tom Stellard <thomas.stellard@amd.com> llvm-svn: 207588
* R600: Change UDIV/UREM to UDIVREM when legalizing typesTom Stellard2014-04-293-1/+28
| | | | | | | | | | | | | | | | | | When legalizing ops, with UDIV/UREM set to expand, they automatically expand to UDIVREM (if legal or custom). We need to do this manually for legalize types. v2: SI should be set to Expand because the type is legal, and it is automatically lowered to UDIVREM if UDIVREM is Legal/Custom R600 should set to UDIV/UREM to Custom because it needs to lower them during type legalization Patch by: Jan Vesely Signed-off-by: Jan Vesely <jan.vesely@rutgers.edu> Reviewed-by: Tom Stellard <thomas.stellard@amd.com> llvm-svn: 207587
* R600: remove unused variableTom Stellard2014-04-291-2/+0
| | | | | | | | Patch by: Jan Vesely Signed-off-by: Jan Vesely <jan.vesely@rutgers.edu> Reviewed-by: Tom Stellard <thomas.stellard@amd.com> llvm-svn: 207586
* Tidy up.Jim Grosbach2014-04-291-2/+2
| | | | llvm-svn: 207585
* Spelling.Jim Grosbach2014-04-291-1/+1
| | | | llvm-svn: 207584
* Tidy up whitespace.Jim Grosbach2014-04-291-7/+7
| | | | llvm-svn: 207583
* Also handle ConstantAggregateZero when optimizing vpermilvar*.Rafael Espindola2014-04-291-20/+22
| | | | llvm-svn: 207582
* Fix MSVC build broken by r207580David Blaikie2014-04-291-0/+5
| | | | | | | | Seems MSVC wants to be able to codegen inline-definitions of virtual functions even in TUs that don't define the key function - and it's well within its rights to do so. llvm-svn: 207581
* PR19553: Memory leak in RuntimeDyldELF::createObjectImageFromFileDavid Blaikie2014-04-297-54/+75
| | | | | | | | | | | | | | | | This starts in MCJIT::getSymbolAddress where the unique_ptr<object::Binary> is release()d and (after a cast) passed to a single caller, MCJIT::addObjectFile. addObjectFile calls RuntimeDyld::loadObject. RuntimeDld::loadObject calls RuntimeDyldELF::createObjectFromFile And the pointer is never owned at this point. I say this point, because the alternative codepath, RuntimeDyldMachO::createObjectFile certainly does take ownership, so this seemed like a good hint that this was a/the right place to take ownership. llvm-svn: 207580
* [DWARF parser] Cleanup code in DWARFDebugLine.Alexey Samsonov2014-04-293-98/+119
| | | | | | | | | | | | | Move several function definitions into .cpp, unify constructors and clear() methods (fixing a couple of latent bugs from copy-paste), turn static function parsePrologue() into Prologue::parse(). More work needed here to untangle weird multiple inheritance in table parsing and dumping. No functionality change. llvm-svn: 207579
* Remove tabs.Rafael Espindola2014-04-291-4/+4
| | | | | | Sorry, new machine and I forgot to change the editor setting. llvm-svn: 207578
* Two fixes to the vpermilvar optimization.Rafael Espindola2014-04-291-1/+24
| | | | | | | | The instcomine logic to handle vpermilvar's pd and 256 variants was incorrect. The _256 variants have indexes into the individual 128 bit lanes and in all cases it also has to mask out unused bits. llvm-svn: 207577
* Fix vectorization remarks.Diego Novillo2014-04-291-6/+13
| | | | | | | | | This patch changes the vectorization remarks to also inform when vectorization is possible but not beneficial. Added tests to exercise some loop remarks. llvm-svn: 207574
* Continue slp vectorization even the BB already has vectorized store ↵Yi Jiang2014-04-291-1/+1
| | | | | | radar://16641956 llvm-svn: 207572
* Add slp vectorization to LTO passesYi Jiang2014-04-291-0/+3
| | | | llvm-svn: 207571
* Reapply r207271 without the testcaseAdam Nemet2014-04-291-9/+12
| | | | | | PR19608 was filed to find a suitable testcase. llvm-svn: 207569
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