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authorTim Northover <tnorthover@apple.com>2014-04-30 11:19:28 +0000
committerTim Northover <tnorthover@apple.com>2014-04-30 11:19:28 +0000
commit4b2f8a990e104bac335945dd7d1b1b48bde39cbd (patch)
treec6307342421f57d01564652d0ce4f81dc93e99cb /llvm/lib
parentcfd6e66544a39a7a8a5c6b7c82b71b438232b67a (diff)
downloadbcm5719-llvm-4b2f8a990e104bac335945dd7d1b1b48bde39cbd.tar.gz
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ARM64: hexify printing various immediate operands
This is mostly aimed at the NEON logical operations and MOVI/MVNI (since they accept weird shifts which are more naturally understandable in hex notation). Also changes BRK/HINT etc, which is probably a neutral change, but easier than the alternative. llvm-svn: 207634
Diffstat (limited to 'llvm/lib')
-rw-r--r--llvm/lib/Target/ARM64/ARM64InstrFormats.td3
-rw-r--r--llvm/lib/Target/ARM64/InstPrinter/ARM64InstPrinter.cpp6
-rw-r--r--llvm/lib/Target/ARM64/InstPrinter/ARM64InstPrinter.h1
3 files changed, 10 insertions, 0 deletions
diff --git a/llvm/lib/Target/ARM64/ARM64InstrFormats.td b/llvm/lib/Target/ARM64/ARM64InstrFormats.td
index 86ddb0722a1..f1d6f3d6bb7 100644
--- a/llvm/lib/Target/ARM64/ARM64InstrFormats.td
+++ b/llvm/lib/Target/ARM64/ARM64InstrFormats.td
@@ -222,6 +222,7 @@ def imm0_65535 : Operand<i32>, ImmLeaf<i32, [{
return ((uint32_t)Imm) < 65536;
}]> {
let ParserMatchClass = Imm0_65535Operand;
+ let PrintMethod = "printHexImm";
}
def Imm1_8Operand : AsmOperandClass {
@@ -452,6 +453,7 @@ def imm0_255 : Operand<i32>, ImmLeaf<i32, [{
return ((uint32_t)Imm) < 256;
}]> {
let ParserMatchClass = Imm0_255Operand;
+ let PrintMethod = "printHexImm";
}
// imm0_127 predicate - True if the immediate is in the range [0,127]
@@ -460,6 +462,7 @@ def imm0_127 : Operand<i32>, ImmLeaf<i32, [{
return ((uint32_t)Imm) < 128;
}]> {
let ParserMatchClass = Imm0_127Operand;
+ let PrintMethod = "printHexImm";
}
// NOTE: These imm0_N operands have to be of type i64 because i64 is the size
diff --git a/llvm/lib/Target/ARM64/InstPrinter/ARM64InstPrinter.cpp b/llvm/lib/Target/ARM64/InstPrinter/ARM64InstPrinter.cpp
index 875c758b1ad..55aca160d12 100644
--- a/llvm/lib/Target/ARM64/InstPrinter/ARM64InstPrinter.cpp
+++ b/llvm/lib/Target/ARM64/InstPrinter/ARM64InstPrinter.cpp
@@ -1008,6 +1008,12 @@ void ARM64InstPrinter::printOperand(const MCInst *MI, unsigned OpNo,
}
}
+void ARM64InstPrinter::printHexImm(const MCInst *MI, unsigned OpNo,
+ raw_ostream &O) {
+ const MCOperand &Op = MI->getOperand(OpNo);
+ O << format("#%#llx", Op.getImm());
+}
+
void ARM64InstPrinter::printPostIncOperand(const MCInst *MI, unsigned OpNo,
unsigned Imm, raw_ostream &O) {
const MCOperand &Op = MI->getOperand(OpNo);
diff --git a/llvm/lib/Target/ARM64/InstPrinter/ARM64InstPrinter.h b/llvm/lib/Target/ARM64/InstPrinter/ARM64InstPrinter.h
index 66bf6b00bce..990b37b6b40 100644
--- a/llvm/lib/Target/ARM64/InstPrinter/ARM64InstPrinter.h
+++ b/llvm/lib/Target/ARM64/InstPrinter/ARM64InstPrinter.h
@@ -44,6 +44,7 @@ protected:
bool printSysAlias(const MCInst *MI, raw_ostream &O);
// Operand printers
void printOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O);
+ void printHexImm(const MCInst *MI, unsigned OpNo, raw_ostream &O);
void printPostIncOperand(const MCInst *MI, unsigned OpNo, unsigned Imm,
raw_ostream &O);
void printPostIncOperand1(const MCInst *MI, unsigned OpNo, raw_ostream &O);
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