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* add a noteChris Lattner2007-03-251-0/+1
| | | | llvm-svn: 35334
* 1. Avoid unnecessary APInt construction if possible.Zhou Sheng2007-03-251-7/+5
| | | | | | | 2. Use isStrictlyPositive() instead of isPositive() in two places where they need APInt value > 0 not only >=0. llvm-svn: 35333
* Implement support for vector operands to inline asm, implementingChris Lattner2007-03-251-4/+16
| | | | | | CodeGen/X86/2007-03-24-InlineAsmVectorOp.ll llvm-svn: 35332
* add a noteChris Lattner2007-03-251-0/+13
| | | | llvm-svn: 35330
* Fix CodeGen/PowerPC/2007-03-24-cntlzd.llChris Lattner2007-03-251-1/+4
| | | | llvm-svn: 35329
* implement initial support for the silly X constraint. Testcase here: ↵Chris Lattner2007-03-251-0/+2
| | | | | | CodeGen/X86/2007-03-24-InlineAsmXConstraint.ll llvm-svn: 35327
* Make more uses of getHighBitsSet and get rid of some pointless & of anReid Spencer2007-03-251-12/+12
| | | | | | APInt with its type mask. llvm-svn: 35325
* Implement CodeGen/X86/2007-03-24-InlineAsmMultiRegConstraint.llChris Lattner2007-03-251-1/+4
| | | | llvm-svn: 35324
* switch TargetLowering::getConstraintType to take the entire constraint,Chris Lattner2007-03-2510-65/+79
| | | | | | not just the first letter. No functionality change. llvm-svn: 35322
* More APIntification:Reid Spencer2007-03-251-24/+24
| | | | | | | | | | | | | | | * Convert the last use of a uint64_t that should have been an APInt. * Change ComputeMaskedBits to have a const reference argument for the Mask so that recursions don't cause unneeded temporaries. This causes temps to be needed in other places (where the mask has to change) but this change optimizes for the recursion which is more frequent. * Remove two instances of &ing a Mask with getAllOnesValue. Its not needed any more because APInt is accurate in its bit computations. * Start using the getLowBitsSet and getHighBits set methods on APInt instead of shifting. This makes it more clear in the code what is going on. llvm-svn: 35321
* Allow the b/h/w/k constraints to be applied to values that have multiple ↵Chris Lattner2007-03-251-1/+4
| | | | | | alternatives, and end up not being registers. llvm-svn: 35320
* enforce the proper range for the i386 N constraint.Chris Lattner2007-03-251-8/+9
| | | | llvm-svn: 35319
* Fix test/CodeGen/X86/2007-03-24-InlineAsmPModifier.llChris Lattner2007-03-251-0/+4
| | | | llvm-svn: 35318
* fix a regression on vector or instructions.Chris Lattner2007-03-241-9/+9
| | | | llvm-svn: 35314
* don't rely on ADLChris Lattner2007-03-241-1/+1
| | | | llvm-svn: 35299
* add a valuetype for v1i64, which is needed by mmx.Chris Lattner2007-03-241-0/+3
| | | | llvm-svn: 35298
* Make some codes more efficient.Zhou Sheng2007-03-241-15/+17
| | | | llvm-svn: 35297
* add a bad case evan though of.Chris Lattner2007-03-241-0/+32
| | | | llvm-svn: 35296
* For PR1205:Reid Spencer2007-03-241-12/+11
| | | | | | | Convert some calls to ConstantInt::getZExtValue() into getValue() and use APInt facilities in the subsequent computations. llvm-svn: 35294
* Adjust offset to compensate for big endian machines.Evan Cheng2007-03-241-7/+5
| | | | llvm-svn: 35293
* Autodetect MMX & SSE stuff for AMD processorsAnton Korobeynikov2007-03-231-10/+11
| | | | llvm-svn: 35292
* PR1260:Bill Wendling2007-03-231-2/+6
| | | | | | Add final support to get the QT example to compile. llvm-svn: 35290
* Make sure SEXTLOAD of the specific type is supported on the target.Evan Cheng2007-03-231-0/+4
| | | | llvm-svn: 35289
* For PR1205:Reid Spencer2007-03-231-762/+37
| | | | | | | | | | | | * APIntify visitAdd and visitSelectInst * Remove unused uint64_t versions of utility functions that have been replaced with APInt versions. This completes most of the changes for APIntification of InstCombine. This passes llvm-test and llvm/test/Transforms/InstCombine/APInt. Patch by Zhou Sheng. llvm-svn: 35287
* Also replace uses of SRL if that's also folded during ReduceLoadWidth().Evan Cheng2007-03-231-1/+8
| | | | llvm-svn: 35286
* For PR1205:Reid Spencer2007-03-231-25/+22
| | | | | | | | APIntify visitDiv, visitMul and visitRem. Patch by Zhou Sheng. llvm-svn: 35283
* switch AddReachableCodeToWorklist from being recursive to being iterative.Chris Lattner2007-03-231-46/+54
| | | | llvm-svn: 35282
* For PR1205:Reid Spencer2007-03-231-37/+39
| | | | | | | | | APIntify several utility functions supporting logical operators and shift operators. Patch by Zhou Sheng. llvm-svn: 35281
* Fix constant fold of div by zero and rem by zero to match IEEE 754Reid Spencer2007-03-231-8/+18
| | | | | | | requirements. We must return NaN in some cases and correctly signed infinity in other cases. Passes CFP2006 (not that that says much). llvm-svn: 35277
* Make the "KnownZero ^ TypeMask" computation just once.Zhou Sheng2007-03-231-3/+4
| | | | llvm-svn: 35276
* Simplify the code.Zhou Sheng2007-03-231-1/+1
| | | | llvm-svn: 35275
* A couple of bug fixes for reducing load width xform:Evan Cheng2007-03-231-7/+16
| | | | | | | 1. Address offset is in bytes. 2. Make sure truncate node uses are replaced with new load. llvm-svn: 35274
* For PR1205:Reid Spencer2007-03-221-21/+25
| | | | | | | | APInt support for logical operators in visitAnd, visitOr, and visitXor. Patch by Zhou Sheng. llvm-svn: 35273
* For PR1205:Reid Spencer2007-03-221-16/+17
| | | | | | | | | | * APIntify commonIntCastTransforms * APIntify visitTrunc * APIntify visitZExt Patch by Zhou Sheng. llvm-svn: 35271
* For PR1205:Reid Spencer2007-03-221-63/+63
| | | | | | | | * Re-enable the APInt version of MaskedValueIsZero. * APIntify the Comput{Un}SignedMinMaxValuesFromKnownBits functions * APIntify visitICmpInst. llvm-svn: 35270
* We generate a shufflevector instruction, so we don't need the builtinBill Wendling2007-03-221-6/+13
| | | | | | intrinsic. llvm-svn: 35269
* Support added for shifts and unpacking MMX instructions.Bill Wendling2007-03-224-2/+211
| | | | llvm-svn: 35266
* Change uses of Function::front to Function::getEntryBlock for readability.Dan Gohman2007-03-2213-15/+19
| | | | llvm-svn: 35265
* Add the NoUnwind function attribute.Reid Spencer2007-03-221-0/+2
| | | | llvm-svn: 35260
* Regenerate.Reid Spencer2007-03-225-1546/+1580
| | | | llvm-svn: 35259
* Add support for the noreturn and nounwind function attributes.Reid Spencer2007-03-222-1/+4
| | | | llvm-svn: 35258
* Fix broken optimization disabled by a logic bug.Nick Lewycky2007-03-221-10/+51
| | | | | | | | | Analyze GEPs. If the indices are all zero, transfer whether the pointer is known to be not null through the GEP. Add a few more cases for xor and shift instructions. llvm-svn: 35257
* More opportunities to reduce load size.Evan Cheng2007-03-221-45/+101
| | | | llvm-svn: 35254
* Fix for PR1257. Bug in live range shortening as a result of copy coalescingEvan Cheng2007-03-221-11/+9
| | | | | | where the destination is dead. llvm-svn: 35252
* For PR1248:Reid Spencer2007-03-211-18/+26
| | | | | | | | | | | | * Fix some indentation and comments in InsertRangeTest * Add an "IsSigned" parameter to AddWithOverflow and make it handle signed additions. Also, APIntify this function so it works with any bitwidth. * For the icmp pred ([us]div %X, C1), C2 transforms, exit early if the div instruction's RHS is zero. * Finally, for icmp pred (sdiv %X, C1), -C2, fix an off-by-one error. The HiBound needs to be incremented in order to get the range test correct. llvm-svn: 35247
* repair x86 performance, dejagnu problems from previous changeDale Johannesen2007-03-215-5/+34
| | | | llvm-svn: 35245
* Add TODO list for MSIL backendAnton Korobeynikov2007-03-211-0/+51
| | | | llvm-svn: 35244
* Let the new backend begin!Anton Korobeynikov2007-03-213-0/+1594
| | | | llvm-svn: 35242
* add generation of unnecessary push/pop around callsDale Johannesen2007-03-211-0/+42
| | | | llvm-svn: 35241
* fold (truncate (srl (load x), c)) -> (smaller load (x+c/vt bits))Evan Cheng2007-03-211-6/+24
| | | | llvm-svn: 35239
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