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* add a noteChris Lattner2007-03-251-0/+1
* 1. Avoid unnecessary APInt construction if possible.Zhou Sheng2007-03-251-7/+5
* Implement support for vector operands to inline asm, implementingChris Lattner2007-03-251-4/+16
* add a noteChris Lattner2007-03-251-0/+13
* Fix CodeGen/PowerPC/2007-03-24-cntlzd.llChris Lattner2007-03-251-1/+4
* implement initial support for the silly X constraint. Testcase here: CodeGen...Chris Lattner2007-03-251-0/+2
* Make more uses of getHighBitsSet and get rid of some pointless & of anReid Spencer2007-03-251-12/+12
* Implement CodeGen/X86/2007-03-24-InlineAsmMultiRegConstraint.llChris Lattner2007-03-251-1/+4
* switch TargetLowering::getConstraintType to take the entire constraint,Chris Lattner2007-03-2510-65/+79
* More APIntification:Reid Spencer2007-03-251-24/+24
* Allow the b/h/w/k constraints to be applied to values that have multiple alte...Chris Lattner2007-03-251-1/+4
* enforce the proper range for the i386 N constraint.Chris Lattner2007-03-251-8/+9
* Fix test/CodeGen/X86/2007-03-24-InlineAsmPModifier.llChris Lattner2007-03-251-0/+4
* fix a regression on vector or instructions.Chris Lattner2007-03-241-9/+9
* don't rely on ADLChris Lattner2007-03-241-1/+1
* add a valuetype for v1i64, which is needed by mmx.Chris Lattner2007-03-241-0/+3
* Make some codes more efficient.Zhou Sheng2007-03-241-15/+17
* add a bad case evan though of.Chris Lattner2007-03-241-0/+32
* For PR1205:Reid Spencer2007-03-241-12/+11
* Adjust offset to compensate for big endian machines.Evan Cheng2007-03-241-7/+5
* Autodetect MMX & SSE stuff for AMD processorsAnton Korobeynikov2007-03-231-10/+11
* PR1260:Bill Wendling2007-03-231-2/+6
* Make sure SEXTLOAD of the specific type is supported on the target.Evan Cheng2007-03-231-0/+4
* For PR1205:Reid Spencer2007-03-231-762/+37
* Also replace uses of SRL if that's also folded during ReduceLoadWidth().Evan Cheng2007-03-231-1/+8
* For PR1205:Reid Spencer2007-03-231-25/+22
* switch AddReachableCodeToWorklist from being recursive to being iterative.Chris Lattner2007-03-231-46/+54
* For PR1205:Reid Spencer2007-03-231-37/+39
* Fix constant fold of div by zero and rem by zero to match IEEE 754Reid Spencer2007-03-231-8/+18
* Make the "KnownZero ^ TypeMask" computation just once.Zhou Sheng2007-03-231-3/+4
* Simplify the code.Zhou Sheng2007-03-231-1/+1
* A couple of bug fixes for reducing load width xform:Evan Cheng2007-03-231-7/+16
* For PR1205:Reid Spencer2007-03-221-21/+25
* For PR1205:Reid Spencer2007-03-221-16/+17
* For PR1205:Reid Spencer2007-03-221-63/+63
* We generate a shufflevector instruction, so we don't need the builtinBill Wendling2007-03-221-6/+13
* Support added for shifts and unpacking MMX instructions.Bill Wendling2007-03-224-2/+211
* Change uses of Function::front to Function::getEntryBlock for readability.Dan Gohman2007-03-2213-15/+19
* Add the NoUnwind function attribute.Reid Spencer2007-03-221-0/+2
* Regenerate.Reid Spencer2007-03-225-1546/+1580
* Add support for the noreturn and nounwind function attributes.Reid Spencer2007-03-222-1/+4
* Fix broken optimization disabled by a logic bug.Nick Lewycky2007-03-221-10/+51
* More opportunities to reduce load size.Evan Cheng2007-03-221-45/+101
* Fix for PR1257. Bug in live range shortening as a result of copy coalescingEvan Cheng2007-03-221-11/+9
* For PR1248:Reid Spencer2007-03-211-18/+26
* repair x86 performance, dejagnu problems from previous changeDale Johannesen2007-03-215-5/+34
* Add TODO list for MSIL backendAnton Korobeynikov2007-03-211-0/+51
* Let the new backend begin!Anton Korobeynikov2007-03-213-0/+1594
* add generation of unnecessary push/pop around callsDale Johannesen2007-03-211-0/+42
* fold (truncate (srl (load x), c)) -> (smaller load (x+c/vt bits))Evan Cheng2007-03-211-6/+24
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