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* Fixed mingw\cygwin linkonce linkage once again.Anton Korobeynikov2006-10-182-27/+9
| | | | | | | | | | Added workaround for linker bug with linkonce sections. Changed sections prefix to allow linker merge them (PE loader doesn't like too much long-named sections :) ) All of this unbreaks libstdc++ on mingw32 allowing (small) programs to be compiled, linked and run. llvm-svn: 31033
* Add support for the new "target data" information in .ll files. This providesOwen Anderson2006-10-185-2372/+2224
| | | | | | | | | a better encoding of the targets data layout, rather than trying to guess it from the endianness and pointersize like before. Update the generated files. llvm-svn: 31031
* Add support for the new "target data" information in .ll files. This providesOwen Anderson2006-10-183-0/+10
| | | | | | | a better encoding of the targets data layout, rather than trying to guess it from the endianness and pointersize like before. llvm-svn: 31030
* set the ppc64 stack pointer right, dynamic alloca now works for ppc64Chris Lattner2006-10-181-1/+5
| | | | llvm-svn: 31028
* Expand alloca for ppc64Chris Lattner2006-10-181-1/+2
| | | | llvm-svn: 31027
* Teach the branch folder to update debug info if it removes blocks with lineChris Lattner2006-10-171-2/+23
| | | | | | # notes in it. llvm-svn: 31026
* add a method to remove a line # record.Chris Lattner2006-10-171-0/+14
| | | | llvm-svn: 31025
* expose DWARF_LABEL opcode# so the branch folder can update debug info properly.Chris Lattner2006-10-173-0/+19
| | | | llvm-svn: 31024
* Do not leak all of the SourceLineInfo objects. Do not bother mallocing eachChris Lattner2006-10-172-14/+15
| | | | | | one separately. llvm-svn: 31022
* Trivial patch to speed up legalizing common i64 constants.Chris Lattner2006-10-171-0/+7
| | | | llvm-svn: 31020
* Fix CodeGen/PowerPC/2006-10-17-brcc-miscompile.llChris Lattner2006-10-171-1/+1
| | | | llvm-svn: 31019
* Fix printer for StoreSDNode.Evan Cheng2006-10-171-4/+5
| | | | llvm-svn: 31017
* Reflect MemOpAddrMode change; added a helper to create pre-indexed load.Evan Cheng2006-10-171-4/+68
| | | | llvm-svn: 31016
* expand ISD::SDIV, ISD::UDIV, ISD::SREM and ISD::UREMRafael Espindola2006-10-171-0/+4
| | | | llvm-svn: 31014
* add the FPUnaryOp and DFPUnaryOp classesRafael Espindola2006-10-171-15/+14
| | | | llvm-svn: 31013
* add FABSS and FABSDRafael Espindola2006-10-171-0/+8
| | | | llvm-svn: 31012
* Adding linkonce linkage codegeneration support for mingw32\cygwinAnton Korobeynikov2006-10-172-1/+26
| | | | | | targets. llvm-svn: 31011
* Make it simplier to dump DAGs while in DAGCombiner. Remove a nasty ↵Jim Laskey2006-10-173-10/+7
| | | | | | optimization. llvm-svn: 31009
* remove extra [] in storesRafael Espindola2006-10-171-2/+2
| | | | llvm-svn: 31008
* Enable deleting branches to successor blocks. With the previous patches,Chris Lattner2006-10-171-4/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | branch folding can now compile stuff like this: void foo(int W, int X, int Y, int Z) { if (W & 1) { for (; X;--X) bar(); } else if (W & 2) { for (; Y;--Y) bar(); } else if (W & 4) { for (; Z;--Z) bar(); } else if (W & 8) { for (; W;--W) bar(); } if (W) { bar(); } } contrived testcase where loops exits all end up merging together. To have the loop merges be: ... cmplw cr0, r30, r27 bne cr0, LBB1_14 ;bb38 LBB1_16: ;cond_next48.loopexit mr r27, r29 LBB1_20: ;cond_next48 cmplwi cr0, r27, 0 beq cr0, LBB1_22 ;UnifiedReturnBlock ... instead of: ... cmplw cr0, r30, r27 bne cr0, LBB1_14 ;bb38 LBB1_16: ;cond_next48.loopexit mr r27, r29 b LBB1_20 ;cond_next48 LBB1_17: ;cond_next48.loopexit1 b LBB1_20 ;cond_next48 LBB1_18: ;cond_next48.loopexit2 b LBB1_20 ;cond_next48 LBB1_19: ;cond_next48.loopexit3 LBB1_20: ;cond_next48 cmplwi cr0, r27, 0 beq cr0, LBB1_22 ;UnifiedReturnBlock ... This is CodeGen/PowerPC/branch-opt.ll llvm-svn: 31006
* add support for inserting an uncond branchChris Lattner2006-10-171-2/+8
| | | | llvm-svn: 31003
* initial implementation of addressing mode 5Rafael Espindola2006-10-173-10/+47
| | | | llvm-svn: 31002
* Clean up interface to getGlobalLinkName.Jim Laskey2006-10-172-4/+4
| | | | llvm-svn: 31001
* Reenable this pass, fixing the bugs in it.Chris Lattner2006-10-171-23/+32
| | | | | | It now correctly deletes unreachable blocks and blocks that are empty. llvm-svn: 31000
* Make sure operand does have size and element type operands.Evan Cheng2006-10-171-1/+2
| | | | llvm-svn: 30999
* add the immediate to the Offset in eliminateFrameIndexRafael Espindola2006-10-171-2/+2
| | | | llvm-svn: 30998
* Basic support for getGlobalLinkName.Jim Laskey2006-10-172-2/+12
| | | | llvm-svn: 30997
* add FSTD and FSTSRafael Espindola2006-10-172-3/+12
| | | | llvm-svn: 30996
* add FCPYS and FCPYDRafael Espindola2006-10-172-3/+16
| | | | llvm-svn: 30995
* Use S_debug for dwarf info.Jim Laskey2006-10-171-11/+11
| | | | llvm-svn: 30994
* Proper fix.Evan Cheng2006-10-171-5/+4
| | | | llvm-svn: 30993
* One more try.Evan Cheng2006-10-161-4/+6
| | | | llvm-svn: 30992
* Undo Chris' last patch, it caused a regression.Reid Spencer2006-10-161-2/+2
| | | | llvm-svn: 30991
* Unbreak x86-64 build.Evan Cheng2006-10-161-2/+9
| | | | llvm-svn: 30990
* Be careful when looking through a vbit_convert. Optimizing this:Evan Cheng2006-10-161-2/+11
| | | | | | | | | | | (vector_shuffle (vbitconvert (vbuildvector (copyfromreg v4f32), 1, v4f32), 4, f32), (undef, undef, undef, undef), (0, 0, 0, 0), 4, f32) to the vbitconvert is a very bad idea. llvm-svn: 30989
* add fdivs e fdivdRafael Espindola2006-10-161-1/+2
| | | | llvm-svn: 30988
* expand ISD::SHL_PARTS, ISD::SRA_PARTS and ISD::SRL_PARTSRafael Espindola2006-10-163-8/+20
| | | | llvm-svn: 30987
* Added a X86CompilationCallback variant which saves XMM argument registers ↵Evan Cheng2006-10-161-1/+58
| | | | | | for targets with SSE. llvm-svn: 30986
* Proper fix for rdar://problem/4770604 Thanks to Stuart Hastings!Evan Cheng2006-10-162-12/+21
| | | | llvm-svn: 30985
* Pass AliasAnalysis thru to DAGCombiner.Jim Laskey2006-10-162-6/+18
| | | | llvm-svn: 30984
* Global name regression.Jim Laskey2006-10-161-1/+5
| | | | llvm-svn: 30982
* define the DFPBinOp classRafael Espindola2006-10-161-15/+10
| | | | llvm-svn: 30981
* add the FPBinOp classRafael Espindola2006-10-161-9/+8
| | | | llvm-svn: 30980
* define the Addr1BinOp classRafael Espindola2006-10-161-34/+14
| | | | llvm-svn: 30979
* define the IntBinOp class and use it to implement the multiply instructionsRafael Espindola2006-10-161-12/+13
| | | | llvm-svn: 30978
* fix assembly syntaxRafael Espindola2006-10-161-4/+4
| | | | llvm-svn: 30977
* implement LDRB, LDRSB, LDRH and LDRSHRafael Espindola2006-10-162-0/+20
| | | | llvm-svn: 30976
* implement smull and umullRafael Espindola2006-10-163-5/+24
| | | | llvm-svn: 30975
* Avoid getting into an infinite loop when -disable-x86-shuffle-opti is specified.Evan Cheng2006-10-161-8/+12
| | | | llvm-svn: 30974
* SelectScalarSSELoad should call CanBeFoldedBy as well.Evan Cheng2006-10-161-3/+7
| | | | llvm-svn: 30973
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