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* [libFuzzer] add generic signal handlers so that libFuzzer can report at ↵Kostya Serebryany2016-03-017-21/+94
| | | | | | least something if ASan is not handlig the signals for us. Remove abort_on_timeout flag. llvm-svn: 262415
* [NFC] Convert tabs to spaces.Colin LeMahieu2016-03-011-2/+2
| | | | llvm-svn: 262411
* AArch64: Reenable CompleteModel for A53, A57 and Kryo modelsMatthias Braun2016-03-013-3/+3
| | | | | | The fixes in r262393 completed them as well. llvm-svn: 262408
* [Hexagon] Modifying r262258 to only be in effect in the hand assembler path, ↵Colin LeMahieu2016-03-012-14/+18
| | | | | | not the integrated assembler. llvm-svn: 262400
* DAGCombiner: Turn truncate of a bitcasted vector to an extractMatt Arsenault2016-03-011-0/+16
| | | | | | | | | | | On AMDGPU where operations i64 operations are often bitcasted to v2i32 and back, this pattern shows up regularly where it breaks some expected combines on i64, such as load width reducing. This fixes some test failures in a future commit when i64 loads are changed to promote. llvm-svn: 262397
* Add LLVMBuild for ObjectYAML.Rafael Espindola2016-03-012-0/+15
| | | | | | Should fix the DBUILD_SHARED_LIBS bots. llvm-svn: 262396
* [lanai] Add ELF enum value and relocations.Jacques Pienaar2016-03-012-0/+12
| | | | | | | | | | Add ELF enum value and relocations for Lanai backed. General Lanai backend discussion on llvm-dev thread "[RFC] Lanai backend" (http://lists.llvm.org/pipermail/llvm-dev/2016-February/095118.html). Differential Revision: http://reviews.llvm.org/D17008 llvm-svn: 262394
* AArch64: Add missing schedinfo, check completeness for cycloneMatthias Braun2016-03-018-13/+41
| | | | | | | | | This adds some missing generic schedule info definitions, enables completeness checking for cyclone and fixes a typo uncovered by that. Differential Revision: http://reviews.llvm.org/D17748 llvm-svn: 262393
* [Power9] Implement new vector compare, extract, insert instructionsKit Barton2016-03-012-0/+96
| | | | | | | | | | | | | | | | | | This change implements the following vector operations: - Vector Compare Not Equal - vcmpneb(.) vcmpneh(.) vcmpnew(.) - vcmpnezb(.) vcmpnezh(.) vcmpnezw(.) - Vector Extract Unsigned - vextractub vextractuh vextractuw vextractd - vextublx vextubrx vextuhlx vextuhrx vextuwlx vextuwrx - Vector Insert - vinsertb vinserth vinsertw vinsertd 26 instructions. Phabricator: http://reviews.llvm.org/D15916 llvm-svn: 262392
* [x86] use getBitcast()Sanjay Patel2016-03-011-20/+20
| | | | | | | | This isn't quite NFC because some of the SDLocs may change which could cause scheduling differences. But no regression tests are affected and there is no functional change intended. llvm-svn: 262391
* Fix some warnings a bit harder/differentDavid Blaikie2016-03-012-3/+1
| | | | | | | This is an alternate fix to 262378 and a fix to a pessimizing-move warning. llvm-svn: 262390
* Revert "[AArch64] Fix isLegalAddImmediate() to return true for valid ↵Geoff Berry2016-03-011-2/+2
| | | | | | | | | | negative values." Revert r262248 in an attempt to fix the clang-native-aarch64-full bot and to investigate a performance regression in SingleSource/Benchmarks/CoyoteBench/huffbench llvm-svn: 262388
* Revert "[mips] Promote the result of SETCC nodes to GPR width."Vasileios Kalintiris2016-03-0118-566/+424
| | | | | | | | | This reverts commit r262316. It seems that my change breaks an out-of-tree chromium buildbot, so I'm reverting this in order to investigate the situation further. llvm-svn: 262387
* New file to track implementation status of new POWER9 instructionsKit Barton2016-03-011-0/+442
| | | | llvm-svn: 262386
* TableGen: Check scheduling models for completenessMatthias Braun2016-03-0119-3/+31
| | | | | | | | | | | | | | | | | | | | | | TableGen checks at compiletime that for scheduling models with "CompleteModel = 1" one of the following holds: - Is marked with the hasNoSchedulingInfo flag - The instruction is a subclass of Sched - There are InstRW definitions in the scheduling model Typical steps necessary to complete a model: - Ensure all pseudo instructions that are expanded before machine scheduling (usually everything handled with EmitYYY() functions in XXXTargetLowering). - If a CPU does not support some instructions mark the corresponding resource unsupported: "WriteRes<WriteXXX, []> { let Unsupported = 1; }". - Add missing scheduling information. Differential Revision: http://reviews.llvm.org/D17747 llvm-svn: 262384
* [NVPTX] Annotate param loads/stores as mayLoad/mayStore.Justin Lebar2016-03-012-56/+68
| | | | | | | | | | | | | | | | | | Summary: Tablegen was unable to determine that param loads/stores were actually reading or writing from memory. I think this isn't a problem in practice for param stores, because those occur in a block right before we make our call. But param loads don't have to at the very beginning of a function, so should be annotated as mayLoad so we don't incorrectly optimize them. Reviewers: jholewinski Subscribers: jholewinski, llvm-commits Differential Revision: http://reviews.llvm.org/D17471 llvm-svn: 262381
* [NVPTX] Remove workaround for tablegen crash in NVPTXInstrInfo.td.Justin Lebar2016-03-011-28/+7
| | | | | | | | | | | | Summary: Looks like this was caused by a typo. Reviewers: jholewinski Subscribers: jholewinski, llvm-commits, tra Differential Revision: http://reviews.llvm.org/D17357 llvm-svn: 262380
* Fix -Wnon-virtual-dtor warningsReid Kleckner2016-03-011-0/+2
| | | | llvm-svn: 262378
* Fix an issue where fast math flags were dropped during scalarization.Owen Anderson2016-03-011-2/+4
| | | | | | | Most portions of InstCombine properly propagate fast math flags, but apparently the vector scalarization section was overlooked. llvm-svn: 262376
* [SCEV] Minor cleanup: rename method, C++11'ify; NFCSanjoy Das2016-03-011-4/+3
| | | | llvm-svn: 262374
* [NVPTX] Use different, convergent MIs for convergent calls.Justin Lebar2016-03-014-52/+61
| | | | | | | | | | | | | | | | | | | | | | | Summary: Calls sometimes need to be convergent. This is already handled at the LLVM IR level, but it also needs to be handled at the MI level. Ideally we'd propagate convergence from instructions, down through the selection DAG, and into MIs. But this is Hard, and would affect optimizations in the SDNs -- right now only SDNs with two operands have any flags at all. Instead, here's a much simpler hack: Add new opcodes for NVPTX for convergent calls, and generate these when lowering convergent LLVM calls. Reviewers: jholewinski Subscribers: jholewinski, chandlerc, joker.eph, jhen, tra, llvm-commits Differential Revision: http://reviews.llvm.org/D17423 llvm-svn: 262373
* [NVPTX] Nix hack used to emit '{' and '}' for NVPTX calls.Justin Lebar2016-03-011-9/+3
| | | | | | | | | | | | Summary: Tablegen understands backslash as an escape char; that's sufficient. Reviewers: jholewinski Subscribers: llvm-commits, tra, jholewinski Differential Revision: http://reviews.llvm.org/D17432 llvm-svn: 262372
* [NVPTX] Reformat NVPTXInstrInfo.td, and add additional comments.Justin Lebar2016-03-011-1418/+1400
| | | | | | | | | | | | | | | Summary: Also simplify some of the embedded C++ logic. No functional changes. Reviewers: jholewinski Subscribers: llvm-commits, tra, jholewinski Differential Revision: http://reviews.llvm.org/D17354 llvm-svn: 262371
* [X86] Elide references to _chkstk for dynamic allocasDavid Majnemer2016-03-011-9/+29
| | | | | | | | | | | | | | | The _chkstk function is called by the compiler to probe the stack in an order consistent with Windows' expectations. However, it is possible to elide the call to _chkstk and manually adjust the stack pointer if we can prove that the allocation is fixed size and smaller than the probe size. This shrinks chrome.dll, chrome_child.dll and chrome.exe by a cummulative ~133 KB. Differential Revision: http://reviews.llvm.org/D17679 llvm-svn: 262370
* Move ObjectYAML code to a new library.Rafael Espindola2016-03-017-6/+9
| | | | | | | It is only ever used by obj2yaml and yaml2obj. No point in linking it everywhere. llvm-svn: 262368
* fix function names; NFCSanjay Patel2016-03-011-157/+151
| | | | llvm-svn: 262367
* [Verifier] Don't abort on invalid cleanupretsDavid Majnemer2016-03-011-1/+1
| | | | | | | Code in visitEHPadPredecessors assume a little too much about the validity of a cleanupret with an invalid cleanuppad operand. llvm-svn: 262364
* Fix breakage caused by r262360.Easwaran Raman2016-03-011-0/+1
| | | | llvm-svn: 262363
* Add the beginnings of an update API for preserving MemorySSADaniel Berlin2016-03-011-0/+107
| | | | | | | | | | | | | | | | | | | Summary: This adds the beginning of an update API to preserve MemorySSA. In particular, this patch adds a way to remove memory SSA accesses when instructions are deleted. It also adds relevant unit testing infrastructure for MemorySSA's API. (There is an actual user of this API, i will make that diff dependent on this one. In practice, a ton of opt passes remove memory instructions, so it's hopefully an obviously useful API :P) Reviewers: hfinkel, reames, george.burgess.iv Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D17157 llvm-svn: 262362
* [DebugInfo] Dump CIE augmentation data as a list of hex bytesSimon Atanasyan2016-03-011-2/+7
| | | | | | | | | CIE augmentation data might contain non-printable characters. The patch prints the data as a list of hex bytes. Differential Revision: http://reviews.llvm.org/D17759 llvm-svn: 262361
* Metadata support for profile summary.Easwaran Raman2016-03-011-2/+239
| | | | | | | | This adds support to convert ProfileSummary object to Metadata and create a ProfileSummary object from metadata. This would allow attaching profile summary information to Module allowing optimization passes to use it. llvm-svn: 262360
* DAGCombiner: Turn extract of bitcasted integer into truncateMatt Arsenault2016-03-012-7/+20
| | | | | | | This reduces the number of bitcast nodes and generally cleans up the DAG when bitcasting between integers and vectors everywhere. llvm-svn: 262358
* Add isScalarInteger helper to EVT/MVTMatt Arsenault2016-03-011-0/+5
| | | | llvm-svn: 262357
* AMDGPU/SI: Implement DS_PERMUTE/DS_BPERMUTE Instruction Definitions and ↵Changpeng Fang2016-03-013-0/+32
| | | | | | | | | | | | | | | | Intrinsics Summary: This patch impleemnts DS_PERMUTE/DS_BPERMUTE instruction definitions and intrinsics, which are new since VI. Reviewers: tstellarAMD, arsenm Subscribers: llvm-commits, arsenm Differential Revision: http://reviews.llvm.org/D17614 llvm-svn: 262356
* [libFuzzer] remove FuzzerSanitizerOptions.cppKostya Serebryany2016-03-012-18/+0
| | | | llvm-svn: 262354
* [LLVM][AVX512] PSRL{DI|QI} Change imm8 to intMichael Zuckerman2016-03-011-6/+6
| | | | | | Differential Revision: http://reviews.llvm.org/D17713 llvm-svn: 262353
* [X86] Check that attribute parameters match for tail calls (PR26590)Hans Wennborg2016-03-011-3/+24
| | | | | | | | | | | | In the code below on 32-bit targets, x would previously get forwarded to g() without sign-extension to 32 bits as required by the parameter attribute. void g(signed short); void f(unsigned short x) { g(x); } llvm-svn: 262352
* fix documentation comments; NFCSanjay Patel2016-03-011-85/+74
| | | | llvm-svn: 262351
* Revert "calculate builtin_object_size if argument is a removable pointer"Petar Jovanovic2016-03-011-19/+6
| | | | | | | Revert r262337 as "check-llvm ubsan" step failed on sanitizer-x86_64-linux-fast buildbot. llvm-svn: 262349
* function names start with a lowercase letter; NFCSanjay Patel2016-03-011-12/+12
| | | | llvm-svn: 262347
* [AMDGPU] Remove unused disassembler code.Nikolay Haustov2016-03-011-2/+0
| | | | llvm-svn: 262346
* Refactor duplicated code for linking with pthread.Rafael Espindola2016-03-014-18/+7
| | | | llvm-svn: 262344
* [AMDGPU] Fix build warnings.Nikolay Haustov2016-03-011-2/+2
| | | | llvm-svn: 262338
* calculate builtin_object_size if argument is a removable pointerPetar Jovanovic2016-03-011-6/+19
| | | | | | | | | | | | This patch fixes calculating correct value for builtin_object_size function when pointer is used only in builtin_object_size function call and never after that. Patch by Strahinja Petrovic. Differential Revision: http://reviews.llvm.org/D17337 llvm-svn: 262337
* [AMDGPU] Disassembler code refactored + error messages.Nikolay Haustov2016-03-013-385/+308
| | | | | | | | | | | | | | | | | | Idea behind this change is to make code shorter and as much common for all targets as possible. Let's even accept more code than is valid for a particular target, leaving it for the assembler to sort out. 64bit instructions decoding added. Error\warning messages on unrecognized instructions operands added, InstPrinter allowed to print invalid operands helping to find invalid/unsupported code. The change is massive and hard to compare with previous version, so it makes sense just to take a look on the new version. As a bonus, with a few TD changes following, it disassembles the majority of instructions. Currently it fully disassembles >300K binary source of some blas kernel. Previous TODOs were saved whenever possible. Patch by: Valery Pykhtin Differential Revision: http://reviews.llvm.org/D17720 llvm-svn: 262332
* [LTO] Fix error reporting from lto_module_create_in_local_context()Petr Pavlu2016-03-011-34/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | Function lto_module_create_in_local_context() would previously rely on the default LLVMContext being created for it by LTOModule::makeLTOModule(). This context exits the program on error and is not arranged to update sLastStringError in tools/lto/lto.cpp. Function lto_module_create_in_local_context() now creates an LLVMContext by itself, sets it up correctly to its needs and then passes it to LTOModule::createInLocalContext() which takes ownership of the context and keeps it present for the lifetime of the returned LTOModule. Function LTOModule::makeLTOModule() is modified to take a reference to LLVMContext (instead of a pointer) and no longer creates a default context when nullptr is passed to it. Method LTOModule::createInContext() that takes a pointer to LLVMContext is removed because it allows to pass a nullptr to it. Instead LTOModule::createFromBuffer() (that takes a reference to LLVMContext) should be used. Differential Revision: http://reviews.llvm.org/D17715 llvm-svn: 262330
* [AVX512][PSRAQ][PSRAD] Change imm8 to int.Michael Zuckerman2016-03-011-6/+6
| | | | | | Differential Revision: http://reviews.llvm.org/D17692 llvm-svn: 262320
* Disallow generating vzeroupper before return instruction (iret) in interrupt ↵Amjad Aboud2016-03-011-3/+8
| | | | | | | | | | handler function. This resolves https://llvm.org/bugs/show_bug.cgi?id=26412 Differential Revision: http://reviews.llvm.org/D17542 llvm-svn: 262319
* [MC][YAML] Rangify the loop. NFCSimon Atanasyan2016-03-011-6/+2
| | | | llvm-svn: 262317
* [mips] Promote the result of SETCC nodes to GPR width.Vasileios Kalintiris2016-03-0118-424/+566
| | | | | | | | | | | | | | | | | | | | Summary: This patch modifies the existing comparison, branch, conditional-move and select patterns, and adds new ones where needed. Also, the updated SLT{u,i,iu} set of instructions generate a GPR width result. The majority of the code changes in the Mips back-end fix the wrong assumption that the result of SETCC nodes always produce an i32 value. The changes in the common code path account for the fact that in 64-bit MIPS targets, i1 is promoted to i32 instead of i64. Reviewers: dsanders Subscribers: dsanders, llvm-commits Differential Revision: http://reviews.llvm.org/D10970 llvm-svn: 262316
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