| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | Unbreak CMake build. | Ted Kremenek | 2011-02-28 | 1 | -1/+0 |
| | | | | | llvm-svn: 126715 | ||||
| * | Add an END_WITH_NULL accessor for ConstantStruct. | Talin | 2011-02-28 | 1 | -2/+13 |
| | | | | | llvm-svn: 126714 | ||||
| * | update cmake | Chris Lattner | 2011-02-28 | 1 | -1/+0 |
| | | | | | llvm-svn: 126694 | ||||
| * | Fix .fpu printing in ARM assembly, regarding bug ↵ | Renato Golin | 2011-02-28 | 1 | -4/+38 |
| | | | | | | | http://llvm.org/bugs/show_bug.cgi?id=8931 llvm-svn: 126689 | ||||
| * | Add missing whitespace in the formatting. | Kevin Enderby | 2011-02-28 | 1 | -1/+1 |
| | | | | | llvm-svn: 126687 | ||||
| * | Make all static functions become static class methods. Move shared ↵ | Jan Sjödin | 2011-02-28 | 5 | -138/+203 |
| | | | | | | | (duplicated) functions to new MCELF class. llvm-svn: 126686 | ||||
| * | Use the correct shift amount type. | Owen Anderson | 2011-02-28 | 1 | -1/+1 |
| | | | | | llvm-svn: 126684 | ||||
| * | Clean whitespace. | Owen Anderson | 2011-02-28 | 1 | -3/+3 |
| | | | | | llvm-svn: 126683 | ||||
| * | fix a signed comparison warning. | Chris Lattner | 2011-02-28 | 1 | -1/+1 |
| | | | | | llvm-svn: 126682 | ||||
| * | Delete the GEPSplitter experiment. | Dan Gohman | 2011-02-28 | 3 | -96/+0 |
| | | | | | llvm-svn: 126671 | ||||
| * | Delete the SimplifyHalfPowrLibCalls pass, which was unused, and | Dan Gohman | 2011-02-28 | 2 | -161/+0 |
| | | | | | | | only existed as the result of a misunderstanding. llvm-svn: 126669 | ||||
| * | Delete the LiveValues pass. I won't get get back to the project it | Dan Gohman | 2011-02-28 | 2 | -201/+0 |
| | | | | | | | was started for in the foreseeable future. llvm-svn: 126668 | ||||
| * | [AVX] Add decode support for VUNPCKLPS/D instructions, both 128-bit | David Greene | 2011-02-28 | 4 | -30/+120 |
| | | | | | | | | | and 256-bit forms. Because the number of elements in a vector does not determine the vector type (4 elements could be v4f32 or v4f64), pass the full type of the vector to decode routines. llvm-svn: 126664 | ||||
| * | Fix the arm's disassembler for blx that was building an MCInst without the | Kevin Enderby | 2011-02-28 | 1 | -1/+13 |
| | | | | | | | needed two predicate operands before the imm operand. llvm-svn: 126662 | ||||
| * | Fix a typo which cause dag combine crash. rdar://9059537. | Evan Cheng | 2011-02-28 | 1 | -1/+1 |
| | | | | | llvm-svn: 126661 | ||||
| * | Support for byval parameters on ARM. Will be enabled by a forthcoming | Stuart Hastings | 2011-02-28 | 4 | -9/+49 |
| | | | | | | | patch to the front-end. Radar 7662569. llvm-svn: 126655 | ||||
| * | Add branch hinting for SPU. | Kalle Raiskila | 2011-02-28 | 4 | -5/+94 |
| | | | | | | | | The implemented algorithm is overly simplistic (just speculate all branches are taken)- this is work in progress. llvm-svn: 126651 | ||||
| * | Teach SimplifyCFG that (switch (select cond, X, Y)) is better expressed as a ↵ | Frits van Bommel | 2011-02-28 | 1 | -1/+26 |
| | | | | | | | | | branch. Based on a patch by Alistair Lynn. llvm-svn: 126647 | ||||
| * | Fix comment. | Nick Lewycky | 2011-02-28 | 1 | -1/+1 |
| | | | | | llvm-svn: 126645 | ||||
| * | srem doesn't actually have the same resulting sign as its numerator, you could | Nick Lewycky | 2011-02-28 | 2 | -22/+0 |
| | | | | | | | | also have a zero when numerator = denominator. Reverts parts of r126635 and r126637. llvm-svn: 126644 | ||||
| * | Teach InstCombine to fold "(shr exact X, Y) == 0" --> X == 0, fixing #1 from | Nick Lewycky | 2011-02-28 | 1 | -5/+13 |
| | | | | | | | PR9343. llvm-svn: 126643 | ||||
| * | Teach value tracking to make use of flags in more situations. | Nick Lewycky | 2011-02-28 | 1 | -0/+25 |
| | | | | | llvm-svn: 126642 | ||||
| * | Teach ValueTracking to look at the dividend when determining the sign bit of an | Nick Lewycky | 2011-02-28 | 1 | -0/+12 |
| | | | | | | | srem instruction. llvm-svn: 126637 | ||||
| * | Add preliminary support for .f32 in the PTX backend. | Che-Liang Chiou | 2011-02-28 | 5 | -10/+131 |
| | | | | | | | | | | | | | - Add appropriate TableGen patterns for fadd, fsub, fmul. - Add .f32 as the PTX type for the LLVM float type. - Allow parameters, return values, and global variable declarations to accept the float type. - Add appropriate test cases. Patch by Justin Holewinski llvm-svn: 126636 | ||||
| * | The sign of an srem instruction is the sign of its dividend (the first | Nick Lewycky | 2011-02-28 | 1 | -3/+13 |
| | | | | | | | | argument), regardless of the divisor. Teach instcombine about this and fix test7 in PR9343! llvm-svn: 126635 | ||||
| * | Silence enum conversion warnings. | Benjamin Kramer | 2011-02-27 | 1 | -2/+2 |
| | | | | | llvm-svn: 126578 | ||||
| * | Legalize support for fpextend of vector. PR9309. | Duncan Sands | 2011-02-27 | 1 | -0/+2 |
| | | | | | llvm-svn: 126574 | ||||
| * | Target/X86: Always emit "push/pop GPRs" in prologue/epilogue and emit ↵ | NAKAMURA Takumi | 2011-02-27 | 1 | -17/+39 |
| | | | | | | | | | "spill/reload frames" for XMMs. It improves Win64's prologue/epilogue but it would not affect ia32 and amd64 (lack of nonvolatile XMMs). llvm-svn: 126568 | ||||
| * | Fix typos in the comments. | Nadav Rotem | 2011-02-27 | 1 | -4/+7 |
| | | | | | llvm-svn: 126565 | ||||
| * | RegionPrinter: Ignore back edges when layouting the graph | Tobias Grosser | 2011-02-27 | 1 | -0/+26 |
| | | | | | llvm-svn: 126564 | ||||
| * | Pass the graph to the DOTGraphTraits.getEdgeAttributes(). | Tobias Grosser | 2011-02-27 | 2 | -2/+4 |
| | | | | | | | This follows the interface of getNodeAttributes. llvm-svn: 126562 | ||||
| * | Support: Add llvm::AreStatisticsEnabled(). | Daniel Dunbar | 2011-02-26 | 1 | -0/+4 |
| | | | | | llvm-svn: 126558 | ||||
| * | Add some DAGCombines for (adde 0, 0, glue), which are useful to optimize ↵ | Benjamin Kramer | 2011-02-26 | 2 | -37/+38 |
| | | | | | | | | | | | | legalized code for large integer arithmetic. 1. Inform users of ADDEs with two 0 operands that it never sets carry 2. Fold other ADDs or ADDCs into the ADDE if possible It would be neat if we could do the same thing for SETCC+ADD eventually, but we can't do that in target independent code. llvm-svn: 126557 | ||||
| * | Trailing whitespace. | Jim Grosbach | 2011-02-25 | 1 | -5/+5 |
| | | | | | llvm-svn: 126526 | ||||
| * | Allow targets to specify a the type of the RHS of a shift parameterized on ↵ | Owen Anderson | 2011-02-25 | 22 | -253/+278 |
| | | | | | | | the type of the LHS. llvm-svn: 126518 | ||||
| * | Roll out r126425 and r126450 to see if it fixes the failures on the buildbots. | Cameron Zwarich | 2011-02-25 | 18 | -128/+6 |
| | | | | | llvm-svn: 126488 | ||||
| * | Revert "SimplifyCFG: GEPs with just one non-constant index are also cheap." | Benjamin Kramer | 2011-02-25 | 1 | -5/+3 |
| | | | | | | | | Yes, there are other types than i8* and GEPs on them can produce an add+multiply. We don't consider that cheap enough to be speculatively executed. llvm-svn: 126481 | ||||
| * | Add patterns to use post-increment addressing for Neon VST1-lane instructions. | Bob Wilson | 2011-02-25 | 3 | -11/+39 |
| | | | | | llvm-svn: 126477 | ||||
| * | Fix formatting of debug helper string. | Jim Grosbach | 2011-02-25 | 1 | -1/+1 |
| | | | | | llvm-svn: 126471 | ||||
| * | Fix typo. | Evan Cheng | 2011-02-25 | 1 | -1/+1 |
| | | | | | llvm-svn: 126467 | ||||
| * | Set NumSignBits to 1 if KnownZero/KnownOne are being zero extended. In theory it | Cameron Zwarich | 2011-02-25 | 1 | -0/+1 |
| | | | | | | | | | is possible to do better if the high bit is set in either KnownZero/KnownOne, but in practice NumSignBits is always 1 when we are zero extending because nothing is known about that register. llvm-svn: 126465 | ||||
| * | We only want to zero extend the existing information if the bit width is | Cameron Zwarich | 2011-02-25 | 1 | -1/+1 |
| | | | | | | | actually larger. llvm-svn: 126464 | ||||
| * | Try harder to get the hint by preferring to evict hint interference. | Jakob Stoklund Olesen | 2011-02-25 | 2 | -0/+5 |
| | | | | | llvm-svn: 126463 | ||||
| * | Each prologue may have multiple vpush instructions to store callee-saved | Evan Cheng | 2011-02-25 | 1 | -2/+14 |
| | | | | | | | | | | | | D registers since the vpush list may not have gaps. Make sure the stack adjustment instruction isn't moved between them. Ditto for vpop in epilogues. Sorry, can't reduce a small test case. rdar://9043312 llvm-svn: 126457 | ||||
| * | SimplifyCFG: GEPs with just one non-constant index are also cheap. | Benjamin Kramer | 2011-02-24 | 1 | -3/+5 |
| | | | | | llvm-svn: 126452 | ||||
| * | Tweak the register allocator priority queue some more. | Jakob Stoklund Olesen | 2011-02-24 | 1 | -10/+22 |
| | | | | | | | | | | | | | New live ranges are assigned in long -> short order, but live ranges that have been evicted at least once are deferred and assigned in short -> long order. Also disable splitting and spilling for live ranges seen for the first time. The intention is to create a realistic interference pattern from the heavy live ranges before starting splitting and spilling around it. llvm-svn: 126451 | ||||
| * | Remove dead variable. | Nick Lewycky | 2011-02-24 | 1 | -1/+1 |
| | | | | | llvm-svn: 126450 | ||||
| * | SimplifyCFG: GEPs with constant indices are cheap enough to be executed ↵ | Benjamin Kramer | 2011-02-24 | 1 | -0/+5 |
| | | | | | | | unconditionally. llvm-svn: 126445 | ||||
| * | Restore r125595 (reverted in r126336) with modifications: | Joerg Sonnenberger | 2011-02-24 | 3 | -2/+25 |
| | | | | | | | | Introduce a variable in the AsmParserExtension whether [] is valid in an expression. If it is true, parse them like (). Enable this for ELF only. llvm-svn: 126443 | ||||
| * | remove command line option debugging hook. | Chris Lattner | 2011-02-24 | 1 | -6/+0 |
| | | | | | llvm-svn: 126441 | ||||

