| Commit message (Collapse) | Author | Age | Files | Lines |
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llvm-svn: 113115
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llvm-svn: 113114
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llvm-svn: 113113
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llvm-svn: 113109
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llvm-svn: 113108
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llvm-svn: 113106
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This reduces malloc traffic (yay!) and removes MergeFunctionsEqualityInfo.
llvm-svn: 113105
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strong functions first to make sure they're the canonical definitions and then
do a second pass looking only for weak functions.
llvm-svn: 113104
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Since mem2reg isn't run at -O0, we get a ton of reloads from the stack,
for example, before, this code:
int foo(int x, int y, int z) {
return x+y+z;
}
used to compile into:
_foo: ## @foo
subq $12, %rsp
movl %edi, 8(%rsp)
movl %esi, 4(%rsp)
movl %edx, (%rsp)
movl 8(%rsp), %edx
movl 4(%rsp), %esi
addl %edx, %esi
movl (%rsp), %edx
addl %esi, %edx
movl %edx, %eax
addq $12, %rsp
ret
Now we produce:
_foo: ## @foo
subq $12, %rsp
movl %edi, 8(%rsp)
movl %esi, 4(%rsp)
movl %edx, (%rsp)
movl 8(%rsp), %edx
addl 4(%rsp), %edx ## Folded load
addl (%rsp), %edx ## Folded load
movl %edx, %eax
addq $12, %rsp
ret
Fewer instructions and less register use = faster compiles.
llvm-svn: 113102
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Clobber ranges are no longer used when joining physical registers.
Instead, all aliases are checked for interference.
llvm-svn: 113084
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llvm-svn: 113077
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llvm-svn: 113073
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not SelectAddr
llvm-svn: 113072
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regarding mmx shuffles
llvm-svn: 113059
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llvm-svn: 113058
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into an inner loop, as the new loop iteration may differ substantially.
This fixes PR8078.
llvm-svn: 113057
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versions yet.
llvm-svn: 113056
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llvm-svn: 113055
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llvm-svn: 113050
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llvm-svn: 113048
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llvm-svn: 113047
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llvm-svn: 113045
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llvm-svn: 113044
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llvm-svn: 113043
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location is being re-stored to the memory location. We would get
a dangling pointer from the SSAUpdate data structure and miss a
use. This fixes PR8068
llvm-svn: 113042
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llvm-svn: 113035
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llvm-svn: 113034
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checking each standalone condition and decide whether emit target
specific nodes or remove the condition if it's already matched before.
llvm-svn: 113031
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llvm-svn: 113025
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invertible. ScalarEvolution's folding routines don't always succeed
in canonicalizing equal expressions to a single canonical form, and
this can cause these asserts to fail, even though there's no actual
correctness problem. This fixes PR8066.
llvm-svn: 113021
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"Use target specific nodes instead of relying in unpckl and
unpckh pattern fragments during isel time. Also place a
depth limit in getShuffleScalarElt.
llvm-svn: 113020
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overload UserInInstr. Explicitly check Allocatable. The early exit in the
condition will mean the performance impact of the extra test should be
minimal.
llvm-svn: 113016
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Bruno, please review.
llvm-svn: 113014
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llvm-svn: 113009
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functionality changes
llvm-svn: 113008
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functional changes
llvm-svn: 113007
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llvm-svn: 113006
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some infinite loop and select failures.
- Apologies for eager reverting, but its branch day.
llvm-svn: 113000
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infinite loop and select failures.
llvm-svn: 112999
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mask pattern fragment", which depends on r112934, which introduced some infinite
loop and select failures.
llvm-svn: 112998
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solve the root problem, but it corrects the bug in the code I added to
support legalizing in the case where the non-extended type is also legal.
llvm-svn: 112997
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llvm-svn: 112995
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global when it
is provable that they're equivalent. This fixes PR4855.
llvm-svn: 112994
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"For ARM stack frames that utilize variable sized objects and have either
large local stack areas or require dynamic stack realignment, allocate a
base register via which to access the local frame. This allows efficient
access to frame indices not accessible via the FP (either due to being out
of range or due to dynamic realignment) or the SP (due to variable sized
object allocation). In particular, this greatly improves efficiency of access
to spill slots in Thumb functions which contain VLAs."
r112986 fixed a latent bug exposed by the above.
llvm-svn: 112989
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slot.
Teach it to also check for early clobbered aliases, and early clobber operands
following the current operand.
This fixes the miscompilation in PR8044 where EC registers eax and ecx were
being used for inputs.
llvm-svn: 112988
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alignment should be performed. Otherwise dynamic realignment may trigger
when the register allocator has already used the frame pointer as a general
purpose register. That is, we need to make sure that the list of reserved
registers doesn't change after register allocation.
llvm-svn: 112986
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instructions prior to regalloc. Since it's getting a little close to
the 2.8 branch deadline, I'll have to leave the rest of the instructions
handled by the NEONPreAllocPass for now, but I didn't want to leave half
of the VLD instructions converted and the other half not.
llvm-svn: 112983
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either", it is breaking oggenc with Clang for ARMv6.
This reverts commit 8d6e29cfda270be483abf638850311670829ee65.
llvm-svn: 112962
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llvm-svn: 112955
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Original commit message:
Use the SSAUpdator to turn calls to eh.exception that are not in a
landing pad into uses of registers rather than loads from a stack
slot. Doesn't touch the 'orrible hack code - Bill needs to persuade
me harder :)
llvm-svn: 112952
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