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* Revert earlier change. ds permute operations affect lgkm counter. Kannan Narayanan2017-04-191-2/+0
| | | | | | Differential Revision: https://reviews.llvm.org/D32254 llvm-svn: 300791
* Fix bug that caused DwarfExpression to drop DW_OP_deref from FI locationsAdrian Prantl2017-04-195-19/+27
| | | | | | | | | | | - introduced in r300522 and found via the Swift LLDB testsuite. The fix is to set the location kind to memory whenever an FrameIndex location is emitted. rdar://problem/31707602 llvm-svn: 300790
* [libFuzzer] Always build libFuzzerKuba Mracek2017-04-191-14/+20
| | | | | | | | | | | | | There are two reasons why users might want to build libfuzzer: - To fuzz LLVM itself - To get the libFuzzer.a archive file, so that they can attach it to their code This change always builds libfuzzer, and supports the second use case if the specified flag is set. The point of this patch is to have something that can potentially be shipped with the compiler, and this also ensures that the version of libFuzzer is correct to use with that compiler. Differential Revision: https://reviews.llvm.org/D32096 llvm-svn: 300789
* [GlobalOpt] Simplify attribute code stripping nest, NFCReid Kleckner2017-04-191-10/+5
| | | | llvm-svn: 300787
* Simplify test for sret attribute in instcombineReid Kleckner2017-04-191-12/+6
| | | | | | | | | This change is correct because the verifier requires that at most one argument be marked 'sret'. NFC, removes a use of AttributeList slot APIs. llvm-svn: 300784
* Temporarily revert r299221 to fix nondeterminism in ThinLTO builder.Galina Kistanova2017-04-191-35/+1
| | | | llvm-svn: 300783
* X86FrameLowering: Fix getFrameIndexReference() for 'fixed' objectsMatthias Braun2017-04-192-6/+8
| | | | | | | | | | | Debug information is calculated with getFrameIndexReference() which was missing some logic for the fixed object cases (= parameters on the stack). rdar://24557797 Differential Revision: https://reviews.llvm.org/D32204 llvm-svn: 300781
* [Object] Fix some Clang-tidy modernize and Include What You Use warnings; ↵Eugene Zelenko2017-04-195-41/+90
| | | | | | other minor fixes (NFC). llvm-svn: 300779
* [sanitizer-coverage] remove some more stale codeKostya Serebryany2017-04-191-21/+5
| | | | llvm-svn: 300778
* Remove two unused variables (-Werror).Evgeniy Stepanov2017-04-191-3/+0
| | | | llvm-svn: 300777
* [DAG] add splat vector support for 'or' in SimplifyDemandedBitsSanjay Patel2017-04-191-2/+1
| | | | | | | | | | | I've changed one of the tests to not fold away, but we didn't and still don't do the transform that the comment claims we do (and I don't know why we'd want to do that). Follow-up to: https://reviews.llvm.org/rL300725 https://reviews.llvm.org/rL300763 llvm-svn: 300772
* [sanitizer-coverage] remove stale codeKostya Serebryany2017-04-191-66/+4
| | | | llvm-svn: 300769
* [libFuzzer] remove -output_csv option. It duplicates the default output and ↵Kostya Serebryany2017-04-194-14/+1
| | | | | | got out of sync llvm-svn: 300768
* [DAG] add splat vector support for 'xor' in SimplifyDemandedBitsSanjay Patel2017-04-192-3/+2
| | | | | | | | | This allows forming more 'not' ops, so we get improvements for ISAs that have and-not. Follow-up to: https://reviews.llvm.org/rL300725 llvm-svn: 300763
* ARMFrameLowering: Reserve emergency spill slot for large argumentsMatthias Braun2017-04-191-8/+35
| | | | | | | | | | | | | | | | Re-commit after revert in r300668. Changed getMaxFPOffset() to a more conservative heuristic instead of trying to be clever and missing for some exotic calling conventions. We need to reserve an emergency spill slot in cases with large argument types that could overflow immediate offsets for FP relative address calculations. rdar://31317893 Differential Revision: https://reviews.llvm.org/D31643 llvm-svn: 300761
* [APInt] Cast calls to add/sub/mul overflow methods to void if only their ↵Craig Topper2017-04-194-6/+6
| | | | | | | | | | overflow bool out param is used. This is preparation for a clang change to improve the [[nodiscard]] warning to not be ignored on methods that return a class marked [[nodiscard]] that are defined in the class itself. See D32207. We should consider adding wrapper methods to APInt that return the overflow flag directly and discard the APInt result. This would eliminate the void casts and the need to create a bool before the call to pass to the out param. llvm-svn: 300758
* AMDGPU: Custom lower illegal small select typesMatt Arsenault2017-04-191-0/+29
| | | | | | | Promote them to i32 vectors to avoid unpacking and re-packing the vectors. llvm-svn: 300754
* Code style change as suggested in https://reviews.llvm.org/D32177 (NFC)Dehao Chen2017-04-191-16/+11
| | | | llvm-svn: 300753
* [ARM] Remove redundant computeKnownBits helper.Eli Friedman2017-04-191-29/+14
| | | | | | | | | | | | Move the BFI logic to computeKnownBitsForTargetNode, and delete the redundant CMOV logic. This is intended as a cleanup, but it's probably possible to construct a case where moving the BFI logic allows more combines. Differential Revision: https://reviews.llvm.org/D31795 llvm-svn: 300752
* [GISEL]: Move getConstantVReg to UtilsAditya Nandakumar2017-04-193-17/+18
| | | | | | NFCI llvm-svn: 300751
* [ARM] Use TableGen patterns to select vtbl. NFC.Eli Friedman2017-04-193-92/+59
| | | | | | Differential Revision: https://reviews.llvm.org/D32103 llvm-svn: 300749
* [SCEV] Make SCEV or modeling more aggressive.Eli Friedman2017-04-191-22/+6
| | | | | | | | | | Use haveNoCommonBitsSet to figure out whether an "or" instruction is equivalent to addition. This handles more cases than just checking for a constant on the RHS. Differential Revision: https://reviews.llvm.org/D32239 llvm-svn: 300746
* Using address range map to speedup finding inline stack for address.Dehao Chen2017-04-192-43/+48
| | | | | | | | | | | | | | | | | | | | Summary: In the current implementation, to find inline stack for an address incurs expensive linear search in 2 places: * linear search for the top-level DIE * recursive linear traverse the DIE tree to find the path to the leaf DIE In this patch, a map is built from address to its corresponding leaf DIE. The inline stack is built by traversing from the leaf DIE up to the root DIE. This speeds up batch symbolization by ~10X without noticible memory overhead. Reviewers: dblaikie Reviewed By: dblaikie Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D32177 llvm-svn: 300742
* PR32710: Disable using PMADDWD for unsigned short.Dehao Chen2017-04-191-1/+1
| | | | | | | | | | | | | | Summary: PMADDWD can only handle signed short. Reviewers: mkuper, wmi Reviewed By: mkuper Subscribers: andreadb, llvm-commits Differential Revision: https://reviews.llvm.org/D32236 llvm-svn: 300737
* AMDGPU: Don't emit amd_kernel_code_t for callable functionsMatt Arsenault2017-04-191-1/+14
| | | | | | | | | | | | This is inserted directly in the text section. The relocation for the function ends up resolving to the beginning of the amd_kernel_code_t header rather than the actual function entry point. Also skip some of the comments for initialization that only makes sense for kernels. llvm-svn: 300736
* StructurizeCFG: Directly invert cmp instructionsMatt Arsenault2017-04-191-2/+12
| | | | | | | | | | | | | | | | The most common case for a branch condition is a single use compare. Directly invert the branch predicate rather than adding a lot of xor i1 true which the DAG will have to fold later. This produces nicer to read structurizer output. This produces some random changes in codegen due to the DAG swapping branch conditions itself, and then does a poor job of dealing with those inverts. llvm-svn: 300732
* [GVN] Don't coerce non-integral pointers to integers or vice versaSanjoy Das2017-04-191-0/+5
| | | | | | | | | | | | | | | | | Summary: See http://llvm.org/docs/LangRef.html#non-integral-pointer-type The NewGVN test does not fail without these changes (perhaps it does try to coerce pointers <-> integers to begin with?), but I added the test case anyway. Reviewers: dberlin Subscribers: mcrosier, llvm-commits, Prazek Differential Revision: https://reviews.llvm.org/D32208 llvm-svn: 300730
* ARM: TLS calling convention doesn't preserve r9 or r12 on Darwin.Tim Northover2017-04-191-3/+3
| | | | llvm-svn: 300726
* [DAG] add splat vector support for 'and' in SimplifyDemandedBitsSanjay Patel2017-04-192-2/+2
| | | | | | | | | | | | | | | | | | | | | The patch itself is simple: stop discriminating against vectors in visitAnd() and again in SimplifyDemandedBits(). Some notes for reference: 1. We're not consistent about calls to SimplifyDemandedBits in the various visitXXX functions. Sometimes, we check if the RHS is a constant first. Other times (like here), we just dive in. 2. I'd like to break the vector shackles in steps for the sake of risk minimization, but we could make similar simultaneous changes in other places if we think that would be better. 3. I don't know what the intent of the changed tests in this patch was supposed to be, but since they wiggled in a positive way, I'm just going with that. :) 4. In the rotate tests, note that we can see through non-splat constants. This is a result of D24253. 5. My motivation for being here now is to make D31944 look better, so this is step 1 of N towards improving the vector codegen in that patch without writing any actual new code. Differential Revision: https://reviews.llvm.org/D32230 llvm-svn: 300725
* AMDGPU: Don't align callable functions to 256Matt Arsenault2017-04-191-1/+3
| | | | llvm-svn: 300720
* AMDGPU: Change DivergenceAnalysis for function argumentsMatt Arsenault2017-04-191-9/+16
| | | | | | Stop assuming all functions are kernels. llvm-svn: 300719
* Prefer addAttr(Attribute::AttrKind) over the AttributeList overloadReid Kleckner2017-04-194-59/+39
| | | | | | | | This should simplify the call sites, which typically want to tweak one attribute at a time. It should also avoid creating ephemeral AttributeLists that live forever. llvm-svn: 300718
* [InstCombine] Reduce visitLoadInst() code duplication. NFCI.Davide Italiano2017-04-191-20/+18
| | | | llvm-svn: 300717
* [APInt] Move the 'return *this' from the slow cases of assignment operators ↵Craig Topper2017-04-191-10/+7
| | | | | | | | inline. We should let the compiler see that the fast/slow cases both return *this. I don't think we chain assignments together very often so this shouldn't matter much. llvm-svn: 300715
* [InstSimplify] fold identity shuffles (recursing if needed)Sanjay Patel2017-04-191-1/+76
| | | | | | | | | | | | | | | | | This patch simplifies the examples from D31509 and D31927 (PR30630) and catches the basic identity shuffle tests that Zvi recently added. I'm not sure if we have something like this in DAGCombiner, but we should? It's worth noting that "MaxRecurse / RecursionLimit" is only 3 on entry at the moment. We might want to bump that up if there are longer shuffle chains like this in the wild. For now, we're ignoring shuffles that have undef mask elements because it's not clear how those should be handled. Differential Revision: https://reviews.llvm.org/D31960 llvm-svn: 300714
* use 'auto' with 'dyn_cast' and fix formatting; NFCSanjay Patel2017-04-191-8/+7
| | | | llvm-svn: 300713
* Revert r300697 which causes buildbot failure.Dehao Chen2017-04-192-47/+43
| | | | llvm-svn: 300708
* [Hexagon] Generate proper offset in opt-addr-modeKrzysztof Parzyszek2017-04-192-11/+8
| | | | | | | | | Also, make a few changes to allow using the pass in .mir testcases. Among other things, change the abbreviation from opt-amode to amode-opt, because otherwise lit would expand the "opt" part to the full path to the opt binary. llvm-svn: 300707
* [Hexagon] Remove RDefMap, use Liveness:getNearestAliasedRef insteadKrzysztof Parzyszek2017-04-191-48/+5
| | | | llvm-svn: 300706
* [RDF] Switch NodeList to SmallVector from std::vectorKrzysztof Parzyszek2017-04-191-1/+2
| | | | | | | The list has a single element 75+% of the time, reservation of 4 elements is sufficient in 95% of cases. llvm-svn: 300705
* [RDF] Use faster version of findBlockKrzysztof Parzyszek2017-04-191-1/+1
| | | | llvm-svn: 300704
* [RDF] Cache register units for reg masks instead of recalculating themKrzysztof Parzyszek2017-04-192-31/+29
| | | | llvm-svn: 300702
* [Hexagon] Cache reached blocks in bit tracker instead of scanning listKrzysztof Parzyszek2017-04-192-10/+10
| | | | llvm-svn: 300701
* Using address range map to speedup finding inline stack for address.Dehao Chen2017-04-192-43/+47
| | | | | | | | | | | | | | | | | | | | Summary: In the current implementation, to find inline stack for an address incurs expensive linear search in 2 places: * linear search for the top-level DIE * recursive linear traverse the DIE tree to find the path to the leaf DIE In this patch, a map is built from address to its corresponding leaf DIE. The inline stack is built by traversing from the leaf DIE up to the root DIE. This speeds up batch symbolization by ~10X without noticible memory overhead. Reviewers: dblaikie Reviewed By: dblaikie Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D32177 llvm-svn: 300697
* [InstSimplify] Deduce correct type for vector GEP.Davide Italiano2017-04-191-0/+2
| | | | | | | | | | InstSimplify returned the wrong type when simplifying a vector GEP and we ended up crashing when trying to replace all uses with the new value. Fixes PR32697. Differential Revision: https://reviews.llvm.org/D32180 llvm-svn: 300693
* [DAG] Loop over remaining candidates on successful merge of stores ofNirav Dave2017-04-191-30/+43
| | | | | | extracted vectors types. NFCI. llvm-svn: 300688
* [GlobalIsel][X86] support G_TRUNC selection.Igor Breger2017-04-192-0/+62
| | | | | | | | | | | | | | | | Summary: [GlobalIsel][X86] support G_TRUNC selection. Add regbank-select and legalizer tests. Currently legalization of trunc i64 on 32bit platform not supported. Reviewers: ab, zvi, rovka Reviewed By: zvi Subscribers: dberris, kristof.beyls, llvm-commits Differential Revision: https://reviews.llvm.org/D32115 llvm-svn: 300678
* Revert "ARMFrameLowering: Reserve emergency spill slot for large arguments"Renato Golin2017-04-191-41/+8
| | | | | | This reverts commit r300639, as it broke self-hosting on ARM. PR32709. llvm-svn: 300668
* [ARM] GlobalISel: Add support for G_MULDiana Picus2017-04-193-1/+12
| | | | | | | | Support G_MUL, very similar to G_ADD and G_SUB. The only difference is in the instruction selector, where we have to select either MUL or MULv5 depending on the target. llvm-svn: 300665
* [GlobalISel] Support vector-of-pointers in LLTKristof Beyls2017-04-194-17/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This fixes PR32471. As comment 10 on that bug report highlights (https://bugs.llvm.org//show_bug.cgi?id=32471#c10), there are quite a few different defendable design tradeoffs that could be made, including not representing pointers at all in LLT. I decided to go for representing vector-of-pointer as a concept in LLT, while keeping the size of the LLT type 64 bits (this is an increase from 48 bits before). My rationale for keeping pointers explicit is that on some targets probably it's very handy to have the distinction between pointer and non-pointer (e.g. 68K has a different register bank for pointers IIRC). If we keep a scalar pointer, it probably is easiest to also have a vector-of-pointers to keep LLT relatively conceptually clean and orthogonal, while we don't have a very strong reason to break that orthogonality. Once we gain more experience on the use of LLT, we can of course reconsider this direction. Rejecting vector-of-pointer types in the IRTranslator is also an option to avoid the crash reported in PR32471, but that is only a very short-term solution; also needs quite a bit of code tweaks in places, and is probably fragile. Therefore I didn't consider this the best option. llvm-svn: 300664
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