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* [InstCombine] shrink truncated splat shuffle (2nd try)Sanjay Patel2017-03-071-0/+20
| | | | | | | | | | | | | | | | This was committed at r297155 and reverted at r297166 because of an over-reaching clang test. That should be fixed with r297189. This is one part of solving a recent bug report: http://lists.llvm.org/pipermail/llvm-dev/2017-February/110293.html This keeps with our general approach: changing arbitrary shuffles is off-limts, but changing splat is ok. The transform is very similar to the existing shrinkBitwiseLogic() canonicalization. Differential Revision: https://reviews.llvm.org/D30123 llvm-svn: 297232
* [ObjectYAML] Fix issue with DWARF2 AddrSize 8Chris Bieneman2017-03-071-2/+6
| | | | | | | | In my refactoring I introduced a bug where we were using the reference size instead of the offset size for DW_FORM_strp and similar forms. This patch resolves the error and adds a test case testing all the DWARF forms for DWARF2 AddrSize 8. There is similar coverage already in the DWARFDebugInfoTest sources that covers the parser. Once I migrate the DWARFGenerator APIs to be built on the YAML tools they will be fully covered under the same tests. llvm-svn: 297230
* GlobalISel: fix legalization of G_INSERTTim Northover2017-03-071-14/+19
| | | | | | | | We were calculating incorrect extract/insert offsets by trying to be too tricksy with min/max. It's clearer to just split the logic up into "register starts before this segment" vs "after". llvm-svn: 297226
* [coroutines] Add handling for unwind coro.endsGor Nishanov2017-03-071-4/+38
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: The purpose of coro.end intrinsic is to allow frontends to mark the cleanup and other code that is only relevant during the initial invocation of the coroutine and should not be present in resume and destroy parts. In landing pads coro.end is replaced with an appropriate instruction to unwind to caller. The handling of coro.end differs depending on whether the target is using landingpad or WinEH exception model. For landingpad based exception model, it is expected that frontend uses the `coro.end`_ intrinsic as follows: ``` ehcleanup: %InResumePart = call i1 @llvm.coro.end(i8* null, i1 true) br i1 %InResumePart, label %eh.resume, label %cleanup.cont cleanup.cont: ; rest of the cleanup eh.resume: %exn = load i8*, i8** %exn.slot, align 8 %sel = load i32, i32* %ehselector.slot, align 4 %lpad.val = insertvalue { i8*, i32 } undef, i8* %exn, 0 %lpad.val29 = insertvalue { i8*, i32 } %lpad.val, i32 %sel, 1 resume { i8*, i32 } %lpad.val29 ``` The `CoroSpit` pass replaces `coro.end` with ``True`` in the resume functions, thus leading to immediate unwind to the caller, whereas in start function it is replaced with ``False``, thus allowing to proceed to the rest of the cleanup code that is only needed during initial invocation of the coroutine. For Windows Exception handling model, a frontend should attach a funclet bundle referring to an enclosing cleanuppad as follows: ``` ehcleanup: %tok = cleanuppad within none [] %unused = call i1 @llvm.coro.end(i8* null, i1 true) [ "funclet"(token %tok) ] cleanupret from %tok unwind label %RestOfTheCleanup ``` The `CoroSplit` pass, if the funclet bundle is present, will insert ``cleanupret from %tok unwind to caller`` before the `coro.end`_ intrinsic and will remove the rest of the block. Reviewers: majnemer Reviewed By: majnemer Subscribers: llvm-commits, mehdi_amini Differential Revision: https://reviews.llvm.org/D25543 llvm-svn: 297223
* Implement FreeMachineFunction::getPassName().Yaron Keren2017-03-071-0/+4
| | | | llvm-svn: 297222
* [GlobalISel] Don't translate intrinsics with metadata parameters.Ahmed Bougacha2017-03-071-0/+3
| | | | | | | | | Some intrinsics take metadata parameters. These all need custom handling of some form, and cannot possibly be lowered generically to G_INTRINSIC calls with vreg operands. Reject them, instead of hitting an assert later in getOrCreateVReg. llvm-svn: 297209
* [GlobalISel] Avoid invalidating ValToVReg when translating no-op bitcast.Ahmed Bougacha2017-03-071-2/+7
| | | | | | | | | | | | | | | | | When we translate a no-op (same type) bitcast, we try to be clever and only emit a COPY if we already assigned a vreg to the defined value. However, when we didn't, we tried to assign to a reference into the ValToVReg DenseMap, even though the RHS of the assignment (getOrCreateVReg) could potentially grow that DenseMap, invalidating the reference. Avoid that by getting the source vreg first. I audited the rest of the translator; this is the only tricky case. The test is quite unwieldy, as the problem is caused by the DenseMap growing, which happens after the 47th mapped value. llvm-svn: 297208
* [GlobalISel] Relax vector G_SELECT assertion.Ahmed Bougacha2017-03-071-3/+4
| | | | | | | | | | | For vector operands, the `select` instruction supports both vector and non-vector conditions. The MIR builder had an overly restrictive assertion, that only accepted vector conditions for vector selects (in effect implementing ISD::VSELECT). Make it possible to express the full range of G_SELECTs. llvm-svn: 297207
* [GlobalISel] Slightly clean up DBG_VALUE FP build code.Ahmed Bougacha2017-03-071-2/+1
| | | | | | | I messed up my rebases leading to r297200, and ended up with stale (but working) code. Fix it. llvm-svn: 297205
* [fuzzer] Don't crash if LLVMFuzzerMutate was called by CustomCrossOverVitaly Buka2017-03-075-2/+40
| | | | | | | | | | Reviewers: kcc Subscribers: llvm-commits, mgorny Differential Revision: https://reviews.llvm.org/D30682 llvm-svn: 297202
* [GlobalISel] Ignore %noreg when applying default regbank mapping.Ahmed Bougacha2017-03-071-0/+7
| | | | | | | | | | | | | When computing the mapping for non-generic instructions, we skipped %noreg operands, because we can't always reason about their banks. Also skip them when applying the mapping. Otherwise, we could end up with mappings that we can't apply. While there, duplicate an assert to distinguish between the two error conditions. llvm-svn: 297201
* [GlobalISel] Emit DBG_VALUE %noreg for non-int/fp constant values.Ahmed Bougacha2017-03-071-1/+6
| | | | | | | | When a dbg_value has a constant operand that isn't representable in MI, there isn't much we can do. Use %noreg (0) for those situations. This matches the SelectionDAG behavior. llvm-svn: 297200
* [NVPTX] Fixed lowering of unaligned loads/stores of f16 scalars and vectors.Artem Belevich2017-03-071-11/+31
| | | | | | Differential Revision: https://reviews.llvm.org/D30672 llvm-svn: 297198
* SjLjEHPrepare: Fix the pass for swifterror argumentsArnold Schwaighofer2017-03-071-0/+22
| | | | | | | | | | | We cannot leave the identity copies 'select true, arg, undef' that this pass inserts for arguments to simplify handling of values on swifterror arguments. swifterror arguments have restrictions on their uses. rdar://30839288 llvm-svn: 297197
* Fix C2712 build error on WindowsKonstantin Zhuravlyov2017-03-071-6/+12
| | | | | | | | Move the __try/__except block outside of the set_thread_name function to avoid a conflict with object unwinding due to the use of the llvm::Storage. Differential Revision: https://reviews.llvm.org/D30707 llvm-svn: 297192
* [AArch64] Vulcan is now ThunderXT99Joel Jones2017-03-075-193/+203
| | | | | | | | | | | | | | | | | Broadcom Vulcan is now Cavium ThunderX2T99. LLVM Bugzilla: http://bugs.llvm.org/show_bug.cgi?id=32113 Minor fixes for the alignments of loops and functions for ThunderX T81/T83/T88 (better performance). Patch was tested with SpecCPU2006. Patch by Stefan Teleman Differential Revision: https://reviews.llvm.org/D30510 llvm-svn: 297190
* Revert r297177: Change LLT constructor string into an LLT-based object ...Daniel Sanders2017-03-077-77/+61
| | | | | | | | | | More module problems. This time it only showed up in the stage 2 compile of clang-x86_64-linux-selfhost-modules-2 but not the stage 1 compile. Somehow, this change causes the build to need Attributes.gen before it's been generated. llvm-svn: 297188
* [JumpThread] Simplify CmpInst-as-Condition branch-folding a bit.Xin Tong2017-03-071-4/+11
| | | | | | | | | | | | | | Summary: Simplify CmpInst-as-Condition branch-folding a bit. Reviewers: sanjoy, efriedma Reviewed By: efriedma Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D30429 llvm-svn: 297186
* [ObjectYAML] Add support for DWARF5 Unit headerChris Bieneman2017-03-072-2/+11
| | | | | | In DWARF5 the Unit header added a new field, UnitType, and swapped the order of the address size and abbreviation offset fields. llvm-svn: 297183
* [LV] Consider users that are memory accesses in uniforms expansion stepMatthew Simpson2017-03-071-1/+3
| | | | | | | | | | | When expanding the set of uniform instructions beyond the seed instructions (e.g., consecutive pointers), we mark a new instruction uniform if all its loop-varying users are uniform. We should also allow users that are consecutive or interleaved memory accesses. This fixes cases where we have an instruction that is used as the pointer operand of a consecutive access but also used by a non-memory instruction that later becomes uniform as part of the expansion. llvm-svn: 297179
* [X86] Add option to specify preferable loop alignmentSanjoy Das2017-03-071-1/+9
| | | | | | | | | | | | | | | | | | | | | Summary: Loop alignment can cause a significant change of the perfromance for short loops. To be able to evaluate the impact of loop alignment this change introduces the new option x86-experimental-pref-loop-alignment. The alignment will be 2^Value bytes, the default value is 4. Patch by Serguei Katkov! Reviewers: craig.topper Reviewed By: craig.topper Subscribers: sanjoy, llvm-commits Differential Revision: https://reviews.llvm.org/D30391 llvm-svn: 297178
* [globalisel] Change LLT constructor string into an LLT-based object that ↵Daniel Sanders2017-03-077-61/+77
| | | | | | | | | | | | | | | | | | knows how to generate it. Summary: This will allow future patches to inspect the details of the LLT. The implementation is now split between the Support and CodeGen libraries to allow TableGen to use this class without introducing layering concerns. Thanks to Ahmed Bougacha for finding a reasonable way to avoid the layering issue and providing the version of this patch without that problem. Reviewers: t.p.northover, qcolombet, rovka, aditya_nandakumar, ab, javed.absar Subscribers: arsenm, nhaehnle, mgorny, dberris, llvm-commits, kristof.beyls Differential Revision: https://reviews.llvm.org/D30046 llvm-svn: 297177
* [GlobalISel] Translate floating-point negationVolkan Keles2017-03-071-0/+12
| | | | | | | | | | | | Reviewers: qcolombet, javed.absar, aditya_nandakumar, dsanders, t.p.northover, ab Reviewed By: qcolombet Subscribers: dberris, rovka, llvm-commits, kristof.beyls Differential Revision: https://reviews.llvm.org/D30671 llvm-svn: 297171
* Rephrase condition for better readability. NFCAdrian Prantl2017-03-071-1/+1
| | | | llvm-svn: 297168
* [fs] Make sure to check S_ISLNK() in fillStatus.Zachary Turner2017-03-071-0/+2
| | | | llvm-svn: 297167
* revert r297155 because there's a clang test that depends on InstCombine:Sanjay Patel2017-03-071-20/+0
| | | | | | tools/clang/test/CodeGen/zvector.c llvm-svn: 297166
* Revert "Strip debug info when inlining into a nodebug function."Adrian Prantl2017-03-071-30/+12
| | | | | | | | | | This reverts commit r296488. As noted by David Blaikie on llvm-commits, I overlooked the case of a debug function being inlined into a nodebug function being inlined into a debug function. llvm-svn: 297163
* Relax the conflicting function arg verifier to allow for inlined debugAdrian Prantl2017-03-071-0/+10
| | | | | | info in nodebug functions. llvm-svn: 297161
* Verfier: Move the reset of DebugFnArgs closer to other similar operations.Adrian Prantl2017-03-071-2/+1
| | | | | | NFC llvm-svn: 297160
* Revert r297132, it caused PR32171Nico Weber2017-03-071-45/+3
| | | | llvm-svn: 297159
* [InstCombine] shrink truncated splat shuffleSanjay Patel2017-03-071-0/+20
| | | | | | | | | | | | | This is one part of solving a recent bug report: http://lists.llvm.org/pipermail/llvm-dev/2017-February/110293.html This keeps with our general approach: changing arbitrary shuffles is off-limts, but changing splat is ok. The transform is very similar to the existing shrinkBitwiseLogic() canonicalization. Differential Revision: https://reviews.llvm.org/D30123 llvm-svn: 297155
* [Support] Add the option to not follow symlinks on stat.Zachary Turner2017-03-073-21/+12
| | | | llvm-svn: 297154
* [ARM] Correct handling of LSL #0 in an IT blockJohn Brawn2017-03-071-1/+1
| | | | | | | | | | | The check for LSL #0 in an IT block was checking if operand 4 was zero, but operand 4 is the condition code operand so it was actually checking for LSLEQ. Fix this by checking operand 3, which really is the immediate operand, and add some tests. Differential Revision: https://reviews.llvm.org/D30692 llvm-svn: 297142
* [Hexagon] Do not insert instructions before PHI nodesKrzysztof Parzyszek2017-03-071-1/+3
| | | | llvm-svn: 297141
* [ARM] Reapply r296865 "[ARM] fpscr read/write intrinsics not aware of each ↵Ranjeet Singh2017-03-071-3/+4
| | | | | | | | | | | | | | | | | | | | other"" The original patch r296865 was reverted as it broke the chromium builds for Android https://bugs.llvm.org/show_bug.cgi?id=32134, this patch reapplies r296865 with a fix to make sure it doesn't cause the build regression. The problem was that intrinsic selection on int_arm_get_fpscr was failing in ISel this was because the code to manually select this intrinsic still thought it was the version with no side-effects (INTRINSIC_WO_CHAIN) which is wrong as it doesn't semantically match the definition in the tablegen code which says it does have side-effects, I've fixed this by updating the intrinsic type to INTRINSIC_W_CHAIN (has side-effects). I've also added a test for this based on Hans original reproducer. Differential Revision: https://reviews.llvm.org/D30645 llvm-svn: 297137
* [SystemZ] Add check VT.isSimple() in canTreateAsByteVector()Jonas Paulsson2017-03-071-1/+1
| | | | | | | | Since BB-vectorizer can produce vectors of for example 3 elements, this check is needed. Review: Ulrich Weigand llvm-svn: 297136
* In Thumb1, materialize a move between low registers as a `movs`, if CPSR ↵Artyom Skrobov2017-03-071-5/+11
| | | | | | | | | | | | | | | | isn't live. Summary: Previously, it had always been materialized as a push/pop sequence. Reviewers: labrinea, jroelofs Reviewed By: jroelofs Subscribers: llvm-commits, rengolin Differential Revision: https://reviews.llvm.org/D30648 llvm-svn: 297134
* [LoopRotate] Update dbg.value intrinsicsSam Parker2017-03-071-3/+45
| | | | | | | | Propagate debug info through the newly inserted PHI nodes. Differential Revision: https://reviews.llvm.org/D30190 llvm-svn: 297132
* [X86][AVX512] Adding new LLVM TableGen backend which generates the EVEX2VEX ↵Ayman Musa2017-03-073-1193/+8
| | | | | | | | | | | | compressing tables. X86EvexToVex machine instruction pass compresses EVEX encoded instructions by replacing them with their identical VEX encoded instructions when possible. It uses manually supported 2 large tables that map the EVEX instructions to their VEX ideticals. This TableGen backend replaces the tables by automatically generating them. Differential Revision: https://reviews.llvm.org/D30451 llvm-svn: 297127
* [X86][AVX512] Add missing entries to EVEX2VEX tablesAyman Musa2017-03-071-28/+61
| | | | | | | | evex2vex pass defines 2 tables which maps EVEX instructions to their VEX identical when possible. Adding all missing entries. Differential Revision: https://reviews.llvm.org/D30501 llvm-svn: 297126
* Revert "[PowerPC][ELFv2ABI] Allocate parameter area on-demand to reduce ↵Tim Shen2017-03-071-43/+5
| | | | | | | | | | | stack frame size" This reverts commit r296771. We found some wide spread test failures internally. I'm working on a testcase. Politely revert the patch in the mean time. :) llvm-svn: 297124
* [LoopUnrolling] Fix loop size check for peelingSanjoy Das2017-03-071-1/+3
| | | | | | | | | | | | | | | | | | Summary: We should check if loop size allows us to peel at least one iteration before we do so. Patch by Max Kazantsev! Reviewers: sanjoy, mkuper, efriedma Reviewed By: mkuper Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D30632 llvm-svn: 297122
* [APInt] Add rvalue reference support to and, or, xor operations to allow ↵Craig Topper2017-03-071-25/+0
| | | | | | | | | | | | | | | | their memory allocation to be reused when possible This extends an earlier change that did similar for add and sub operations. With this first patch we lose the fastpath for the single word case as operator&= and friends don't support it. This can be added there if we think that's important. I had to change some functions in the APInt class since the operator overloads were moved out of the class and can't be used inside the class now. The getBitsSet change collides with another outstanding patch to implement it with setBits. But I didn't want to make this patch dependent on that series. I've also removed the Or, And, Xor functions which were rarely or never used. I already commited two changes to remove the only uses of Or that existed. Differential Revision: https://reviews.llvm.org/D30612 llvm-svn: 297121
* Revert "AMDGPU: Set MCAsmInfo::PointerSize"Konstantin Zhuravlyov2017-03-071-1/+0
| | | | | | | | It breaks line tables because the patch is not complete, working on a complete one at the moment This reverts commit r294031. llvm-svn: 297118
* Use LLVM for all stat-related functionality.Zachary Turner2017-03-071-0/+7
| | | | | | | | | | This deletes LLDB's FileType enumeration and replaces all users, and all calls to functions that check whether a file exists etc with corresponding calls to LLVM. Differential Revision: https://reviews.llvm.org/D30624 llvm-svn: 297116
* [APInt] Add setLowBits/setHighBits methods to APInt.Craig Topper2017-03-071-29/+23
| | | | | | | | | | | | | | | | | | | | | Summary: There are quite a few places in the code base that do something like the following to set the high or low bits in an APInt. KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - 1); For BitWidths larger than 64 this creates a short lived APInt with malloced storage. I think it might even call malloc twice. Its better to just provide methods that can set the necessary bits without the temporary APInt. I'll update usages that benefit in a separate patch. Reviewers: majnemer, MatzeB, davide, RKSimon, hans Reviewed By: hans Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D30525 llvm-svn: 297111
* Un-XFAIL Fuzzer/test/dump_coverage.test. This now passes on Darwin (after ↵Kuba Mracek2017-03-071-2/+0
| | | | | | r297094). llvm-svn: 297110
* [SLP] Revert r296863 due to miscompiles.Michael Kuperstein2017-03-062-103/+80
| | | | | | Details and reproducer are on the email thread for r296863. llvm-svn: 297103
* GlobalISel: restrict G_EXTRACT instruction to just one operand.Tim Northover2017-03-0610-76/+73
| | | | | | | A bit more painful than G_INSERT because it was more widely used, but this should simplify the handling of extract operations in most locations. llvm-svn: 297100
* [libfuzzer] do not use xargs for shell expansionMike Aizatsky2017-03-061-1/+1
| | | | | | | | | Summary: After https://reviews.llvm.org/rL296904 xargs shouldn't be necesssary. Differential Revision: https://reviews.llvm.org/D30371 llvm-svn: 297094
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