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* LoopVectorizer: Pack MemAccessInfo pairs.Benjamin Kramer2013-06-291-25/+22
| | | | llvm-svn: 185263
* Move helper classes into anonymous namespaces.Benjamin Kramer2013-06-291-0/+6
| | | | llvm-svn: 185262
* InstCombine: FoldGEPICmp shouldn't change sign of base pointer comparisonDavid Majnemer2013-06-291-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | Changing the sign when comparing the base pointer would introduce all sorts of unexpected things like: %gep.i = getelementptr inbounds [1 x i8]* %a, i32 0, i32 0 %gep2.i = getelementptr inbounds [1 x i8]* %b, i32 0, i32 0 %cmp.i = icmp ult i8* %gep.i, %gep2.i %cmp.i1 = icmp ult [1 x i8]* %a, %b %cmp = icmp ne i1 %cmp.i, %cmp.i1 ret i1 %cmp into: %cmp.i = icmp slt [1 x i8]* %a, %b %cmp.i1 = icmp ult [1 x i8]* %a, %b %cmp = xor i1 %cmp.i, %cmp.i1 ret i1 %cmp By preserving the original sign, we now get: ret i1 false This fixes PR16483. llvm-svn: 185259
* InstCombine: Small whitespace cleanup in FoldGEPICmpDavid Majnemer2013-06-291-1/+1
| | | | llvm-svn: 185258
* InstCombine: Be more agressive optimizing 'udiv' instrs with 'select' denomsDavid Majnemer2013-06-291-44/+77
| | | | | | | | | | | | | | | | | Real world code sometimes has the denominator of a 'udiv' be a 'select'. LLVM can handle such cases but only when the 'select' operands are symmetric in structure (both select operands are a constant power of two or a left shift, etc.). This falls apart if we are dealt a 'udiv' where the code is not symetric or if the select operands lead us to more select instructions. Instead, we should treat the LHS and each select operand as a distinct divide operation and try to optimize them independently. If we can to simplify each operation, then we can replace the 'udiv' with, say, a 'lshr' that has a new select with a bunch of new operands for the select. llvm-svn: 185257
* We preserve the CFG and some of the analysis passes.Nadav Rotem2013-06-291-0/+3
| | | | llvm-svn: 185251
* Update docs.Nadav Rotem2013-06-291-3/+2
| | | | llvm-svn: 185250
* Debug Info: clean up usage of Verify.Manman Ren2013-06-292-5/+11
| | | | | | | | | No functionality change. It should suffice to check the type of a debug info metadata, instead of calling Verify. For cases where we know the type of a DI metadata, use assert. llvm-svn: 185249
* Change assert(0 && "text") to llvm_unreachable(0 && "text")Richard Trieu2013-06-281-2/+2
| | | | llvm-svn: 185243
* InstCombine: Optimize (1 << X) Pred CstP2 to X Pred Log2(CstP2)David Majnemer2013-06-281-2/+72
| | | | | | | | | | | | | | We may, after other optimizations, find ourselves with IR that looks like: %shl = shl i32 1, %y %cmp = icmp ult i32 %shl, 32 Instead, we should just compare the shift count: %cmp = icmp ult i32 %y, 5 llvm-svn: 185242
* Fix extra whitespace / formattingMatt Arsenault2013-06-281-3/+0
| | | | llvm-svn: 185238
* PPC: Ignore spill/restore requests for VRSAVE (except on Darwin)Hal Finkel2013-06-281-0/+12
| | | | | | | | | | | | This fixes PR16418, which reports that a function calling __builtin_unwind_init() asserts. The cause is that this generates a spill/restore for VRSAVE, and we support that only on Darwin (because VRSAVE is only really used on Darwin). The test case checks only that we don't crash. We can add correctness checks once someone verifies what behavior the function is supposed to have. llvm-svn: 185235
* SLP Vectorizer: Add support for trees with external users.Nadav Rotem2013-06-281-24/+142
| | | | | | | To support this we have to insert 'extractelement' instructions to pick the right lane. We had this functionality before but I removed it when we moved to the multi-block design because it was too complicated. llvm-svn: 185230
* Fix broken asserts that never fire.Richard Trieu2013-06-281-2/+2
| | | | | | | | Change assert("text") to assert(0 && "text"). The first case is a const char * to bool conversion, which always evaluates to true, never triggering the assert. The second case will always trigger the assert. llvm-svn: 185227
* Fix a bad overflow check pointed out by Ben.Jakob Stoklund Olesen2013-06-281-4/+2
| | | | llvm-svn: 185226
* Revising the MCJIT ObjectCache interface to allow subclasses to avoid ↵Andrew Kaylor2013-06-281-1/+1
| | | | | | retaining references to returned objects llvm-svn: 185221
* Remove unused memberDavid Blaikie2013-06-281-4/+0
| | | | llvm-svn: 185219
* Eliminate an assortment of undefined behavior.Jakob Stoklund Olesen2013-06-281-1/+5
| | | | | | Hopefully, this fixes the PPC64 buildbots. llvm-svn: 185218
* LoopVectorizer: Refactor the code that checks if it is safe to predicate ↵Nadav Rotem2013-06-281-87/+30
| | | | | | | | | blocks. In this code we keep track of pointers that we are allowed to read from, if they are accessed by non-predicated blocks. We use this list to allow vectorization of conditional loads in predicated blocks because we know that these addresses don't segfault. llvm-svn: 185214
* R600/SI: Add processor types for each CIK variantTom Stellard2013-06-281-0/+3
| | | | | | | | Patch By: Alex Deucher Reviewed-by: Tom Stellard <thomas.stellard@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> llvm-svn: 185209
* DebugInfo: PR14728: TLS supportDavid Blaikie2013-06-283-3/+28
| | | | | | | | | | | | | | Based on GCC's output for TLS variables (OP_constNu, x@dtpoff, OP_lo_user), this implements debug info support for TLS in ELF. Verified that this output is correct/sufficient on Linux (using gold - if you're using binutils-ld, you'll need something with the fix for http://sourceware.org/bugzilla/show_bug.cgi?id=15685 in it). Support on non-ELF is sort of "arbitrary" at the moment - if Apple folks want to discuss (or just go ahead & implement) how this should work in MachO, etc, I'm open. llvm-svn: 185203
* DebugInfo: Pass MCSymbolRefExprs for labels instead of MCSymbolsDavid Blaikie2013-06-285-13/+26
| | | | | | | This is a precursor to adding debug info support for TLS which requires non-default relocations applied to TLS symbols. llvm-svn: 185202
* Fix a PPC rlwimi instruction-selection bugHal Finkel2013-06-281-2/+2
| | | | | | | | | Under certain (evidently rare) circumstances, this code used to convert OR(a, AND(x, y)) into OR(a, x). This was incorrect. While there, I've added a comment to the code immediately above. llvm-svn: 185201
* Remove needless include (unistd.h) in DebugIR passDaniel Malea2013-06-281-2/+0
| | | | | | - should unbreak Windows builds llvm-svn: 185198
* Add missing header for DebugIRDaniel Malea2013-06-281-0/+99
| | | | | | - missed svn add... llvm-svn: 185194
* Remove limitation on DebugIR that made it require existing debug metadata.Daniel Malea2013-06-281-153/+463
| | | | | | | | - Build debug metadata for 'bare' Modules using DIBuilder - DebugIR can be constructed to generate an IR file (to be seen by a debugger) or not in cases where the user already has an IR file on disk. llvm-svn: 185193
* Fix an off-by-one error. Also make the code a little more explicit in what itChad Rosier2013-06-281-3/+4
| | | | | | is trying to do. llvm-svn: 185191
* DebugInfo: Revise r185189 to avoid subtle 'unsigned += bool'David Blaikie2013-06-281-1/+2
| | | | llvm-svn: 185190
* DebugInfo: Simplify the AddressPool representationDavid Blaikie2013-06-282-18/+12
| | | | llvm-svn: 185189
* DebugInfo: constify the AddressPool MCSymbol pointersDavid Blaikie2013-06-282-12/+13
| | | | llvm-svn: 185188
* (no commit message)Preston Briggs2013-06-281-0/+5
| | | | llvm-svn: 185187
* Add missing case to switch statement - DAGTypeLegalizer::ExpandIntegerResultLang Hames2013-06-281-1/+2
| | | | | | | | | | | | should expand ATOMIC_CMP_SWAP nodes the same way that it does for ATOMIC_SWAP. Since ATOMIC_LOADs on some targets (e.g. older ARM variants) get legalized to ATOMIC_CMP_SWAPs, the missing case had been causing i64 atomic loads to crash during isel. <rdar://problem/14074644> llvm-svn: 185186
* Stylistic cleanups, no functional change.Jakob Stoklund Olesen2013-06-281-10/+7
| | | | | | | | - Use static functions instead of anonymous namespace. - Appease the Doxygen lobby. - Use 0-based induction variable. llvm-svn: 185185
* Add a division operator to BlockFrequency.Jakob Stoklund Olesen2013-06-281-23/+35
| | | | | | | | | | | Allow a BlockFrequency to be divided by a non-zero BranchProbability with saturating arithmetic. This will be used to compute the frequency of a loop header given the probability of leaving the loop. Our long division algorithm already saturates on overflow, so that was a freebie. llvm-svn: 185184
* Remove unused variables.Eric Christopher2013-06-281-4/+0
| | | | llvm-svn: 185180
* [NVPTX] Select -1 instead of 1 when anyextend'ing i1 typesJustin Holewinski2013-06-281-3/+3
| | | | | | This makes it more consistent with the ZeroOrNegativeOneBooleanContent flag llvm-svn: 185179
* [NVPTX] Add (1.0 / sqrt(x)) => rsqrt(x) generation when allowable by FP flagsJustin Holewinski2013-06-281-1/+12
| | | | llvm-svn: 185178
* [NVPTX] Calling conventions fixJustin Holewinski2013-06-281-24/+40
| | | | | | | | Fix ABI handling for function returning bool -- use st.param.b32 to return the value and use ld.param.b32 in caller to load the return value. llvm-svn: 185177
* [NVPTX] Add support for cttz/ctlz/ctpopJustin Holewinski2013-06-282-0/+74
| | | | llvm-svn: 185176
* [NVPTX] Clean up comparison/select/convert patterns and factor out PTX ↵Justin Holewinski2013-06-288-949/+1129
| | | | | | | | instructions from their patterns Test case is no breakage llvm-svn: 185175
* [NVPTX] Remove i8 register class. PTX support for i8 (.b8, .u8, .s8) is ↵Justin Holewinski2013-06-2810-859/+1243
| | | | | | rather poor and we're better off just ignoring it and letting LLVM expand all i8 ops out to i16. llvm-svn: 185174
* [NVPTX] Add support for vectorized function return valuesJustin Holewinski2013-06-281-27/+137
| | | | llvm-svn: 185173
* [NVPTX] Clean up handling of formal arguments and enable generation of ↵Justin Holewinski2013-06-281-114/+202
| | | | | | vector parameter loads llvm-svn: 185172
* [NVPTX] Add infrastructure for vector loads/stores of parametersJustin Holewinski2013-06-283-0/+155
| | | | llvm-svn: 185171
* Bug 13662: Enable GPRPair for all i64 operands of inline asm on ARMWeiming Zhao2013-06-282-12/+45
| | | | | | | | This patch assigns paired GPRs for inline asm with 64-bit data on ARM. It's enabled for both ARM and Thumb to support modifiers like %H, %Q, %R. llvm-svn: 185169
* LoopVectorize: Pull dyn_cast into setDebugLocFromInstArnold Schwaighofer2013-06-281-6/+5
| | | | llvm-svn: 185168
* LoopVectorize: Use static function instead of DebugLocSetter classArnold Schwaighofer2013-06-281-52/+30
| | | | | | | | | I used the class to safely reset the state of the builder's debug location. I think I have caught all places where we need to set the debug location to a new one. Therefore, we can replace the class by a function that just sets the debug location. llvm-svn: 185165
* R600: Add local memory support via LDSTom Stellard2013-06-2817-24/+254
| | | | | Reviewed-by: Vincent Lejeune<vljn at ovi.com> llvm-svn: 185162
* R600: Add support for GROUP_BARRIER instructionTom Stellard2013-06-287-3/+64
| | | | | Reviewed-by: Vincent Lejeune<vljn at ovi.com> llvm-svn: 185161
* R600: Add ALUInst bit to tablegen definitions v2Tom Stellard2013-06-284-4/+8
| | | | | | | | v2: - Remove functions left over from a previous rebase. Reviewed-by: Vincent Lejeune<vljn at ovi.com> llvm-svn: 185160
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