summaryrefslogtreecommitdiffstats
path: root/llvm/lib
Commit message (Collapse)AuthorAgeFilesLines
* Don't call SDNode::isPredecessorOf when it isn't necessary. If the load'sDan Gohman2009-10-281-6/+10
| | | | | | chains have no users, they can't be predecessors of the condition. llvm-svn: 85394
* Simplify this code: if the unfolded load can't be hoisted, just deleteDan Gohman2009-10-281-16/+3
| | | | | | the new instructions and leave the old one in place. llvm-svn: 85393
* No newline at end of file.Edward O'Callaghan2009-10-281-1/+1
| | | | llvm-svn: 85390
* Update CMake file.Benjamin Kramer2009-10-281-0/+1
| | | | llvm-svn: 85389
* Treat lifetime begin/end markers as allocations/frees respectively for theOwen Anderson2009-10-283-3/+56
| | | | | | purposes for GVN/DSE. llvm-svn: 85383
* Add ABCD, a generalized implementation of the Elimination of Array BoundsNick Lewycky2009-10-281-0/+1108
| | | | | | | | Checks on Demand algorithm which looks at arbitrary branches instead of loop iterations. This is GSoC work by Andre Tavares with only editorial changes applied! llvm-svn: 85382
* Give ARMISD::EH_SJLJ_LONGJMP and EH_SJLJ_SETJMP names.Evan Cheng2009-10-281-0/+3
| | | | llvm-svn: 85381
* Be more careful about invariance reasoning on "store" queries. Stores still ↵Owen Anderson2009-10-281-6/+9
| | | | | | | | need to depend on Ref and ModRef calls within the invariant region. llvm-svn: 85380
* X86 palignr intrinsics immediate field is in bits. ISel must transform it ↵Evan Cheng2009-10-281-24/+29
| | | | | | into bytes. llvm-svn: 85379
* Add trivial support for the invariance intrinsics to memdep. This logic isOwen Anderson2009-10-281-1/+35
| | | | | | purely local for now. llvm-svn: 85378
* add bitcode reader support for blockaddress. We can now fullyChris Lattner2009-10-282-2/+45
| | | | | | | | | | round trip blockaddress through .ll and .bc files, so add a testcase. There are still a bunch of places in the optimizer and other places that need to be updated to work with these constructs, but at least the basics are in now. llvm-svn: 85377
* bitcode writer support for blockaddress.Chris Lattner2009-10-283-8/+52
| | | | llvm-svn: 85376
* Previously, all operands to Constant were themselves constant.Chris Lattner2009-10-285-28/+36
| | | | | | | | | In the new world order, BlockAddress can have a BasicBlock operand. This doesn't permute much, because if you have a ConstantExpr (or anything more specific than Constant) we still know the operand has to be a Constant. llvm-svn: 85375
* 'static const void *X = &&y' can only be put in the Chris Lattner2009-10-281-0/+3
| | | | | | | readonly section if a reference to the containing function is valid in the readonly section. llvm-svn: 85370
* Rewrite SelectionDAG::isPredecessorOf to be iterative instead ofDan Gohman2009-10-281-21/+16
| | | | | | | recursive to avoid consuming extraordinary amounts of stack space when processing tall graphs. llvm-svn: 85369
* full asmparser support for blockaddress. We can now do:Chris Lattner2009-10-284-40/+172
| | | | | | | | | $ llvm-as foo.ll -d -disable-output which reads and prints the .ll file. BC encoding is the next project. Testcase will go in once that works. llvm-svn: 85368
* asmprinter support for BlockAddress.Chris Lattner2009-10-281-0/+9
| | | | llvm-svn: 85367
* when we tear down a module, we need to be careful to Chris Lattner2009-10-281-1/+14
| | | | | | zap BlockAddress values. llvm-svn: 85366
* Teach MachineLICM to unfold loads from constant memory fromDan Gohman2009-10-281-17/+83
| | | | | | | otherwise unhoistable instructions in order to allow the loads to be hoisted. llvm-svn: 85364
* Use fconsts and fconstd to materialize small fp constants.Evan Cheng2009-10-285-6/+149
| | | | llvm-svn: 85362
* Add a second ValueType argument to isFPImmLegal.Evan Cheng2009-10-289-10/+14
| | | | llvm-svn: 85361
* Mark dead physregdefs dead immediately. This helps MachineSink andDan Gohman2009-10-281-0/+2
| | | | | | MachineLICM and other things which run before LiveVariables is run. llvm-svn: 85360
* Allow constants of different types to share constant pool entriesDan Gohman2009-10-281-3/+47
| | | | | | if they have compatible encodings. llvm-svn: 85359
* Remove getIEEEFloatParts and getIEEEDoubleParts. They are not needed.Evan Cheng2009-10-281-50/+0
| | | | llvm-svn: 85358
* Update SystemZ to use PSW following the way x86 uses EFLAGS. BesidesDan Gohman2009-10-283-30/+36
| | | | | | | | | | | eliminating a use of MVT::Flag, this is needed for an upcoming CodeGen change. This unfortunately requires SystemZ to switch to the list-burr scheduler, in order to handle the physreg defs properly, however that's what LLVM has available at this time. llvm-svn: 85357
* Add an indirect branch pattern for ARM. Testcase will be coming soon.Bob Wilson2009-10-281-0/+10
| | | | llvm-svn: 85355
* rename indbr -> indirectbr to appease the residents of #llvm.Chris Lattner2009-10-2815-49/+51
| | | | llvm-svn: 85351
* IR support for the new BlockAddress constant kind. This isChris Lattner2009-10-282-6/+74
| | | | | | | untested and there is no way to use it, next up: doing battle with asmparser. llvm-svn: 85349
* Record CodeGen optimization level in the BranchFolding pass so that we canBob Wilson2009-10-275-16/+25
| | | | | | | | | | | | | | | | use it to control tail merging when there is a tradeoff between performance and code size. When there is only 1 instruction in the common tail, we have been merging. That can be good for code size but is a definite loss for performance. Now we will avoid tail merging in that case when the optimization level is "Aggressive", i.e., "-O3". Radar 7338114. Since the IfConversion pass invokes BranchFolding, it too needs to know the optimization level. Note that I removed the RegisterPass instantiation for IfConversion because it required a default constructor. If someone wants to keep that for some reason, we can add a default constructor with a hard-wired optimization level. llvm-svn: 85346
* Rename lib/VMCore/ConstantsContext.h:ValueMap<> to ConstantUniqueMap<> to avoidJeffrey Yasskin2009-10-272-17/+17
| | | | | | colliding with llvm/ADT/ValueMap.h:ValueMap<>. llvm-svn: 85344
* Add new note.Bill Wendling2009-10-271-0/+35
| | | | llvm-svn: 85341
* Fixed a bug in the coalescer where intervals were occasionally merged ↵Lang Hames2009-10-272-2/+22
| | | | | | despite a real interference. This fixes rdar://problem/7157961. llvm-svn: 85338
* Enable virtual register based frame index scavenging by default for ARM & T2.Jim Grosbach2009-10-271-2/+2
| | | | llvm-svn: 85335
* Move and clarify note.Bill Wendling2009-10-272-31/+33
| | | | llvm-svn: 85334
* Infrastructure for dynamic stack realignment on ARM. For now, this is off byJim Grosbach2009-10-272-2/+76
| | | | | | | default behind a command line option. This will enable better performance for vectors on NEON enabled processors. llvm-svn: 85333
* Note corrected.Bill Wendling2009-10-271-3/+5
| | | | llvm-svn: 85332
* Modify note.Bill Wendling2009-10-271-0/+8
| | | | llvm-svn: 85331
* Add a note.Bill Wendling2009-10-271-0/+23
| | | | llvm-svn: 85329
* Factor out redundancy from clone() implementations.Devang Patel2009-10-274-291/+94
| | | | llvm-svn: 85327
* Update the MachineBasicBlock CFG for an indirect branch.Dan Gohman2009-10-271-0/+4
| | | | llvm-svn: 85325
* Add CodeGen support for indirect branches.Dan Gohman2009-10-271-2/+3
| | | | llvm-svn: 85323
* make the build build.Chris Lattner2009-10-271-1/+1
| | | | llvm-svn: 85319
* Add new APFloat methods that return sign, exp, and mantissa of ieee float ↵Evan Cheng2009-10-271-12/+62
| | | | | | and double values. llvm-svn: 85318
* Random updates to passes for indbr, I need blockaddress before I can do much ↵Chris Lattner2009-10-272-0/+8
| | | | | | more. llvm-svn: 85316
* cppbackend support for indbrChris Lattner2009-10-271-3/+14
| | | | llvm-svn: 85312
* CBE support for indbr.Chris Lattner2009-10-271-0/+7
| | | | llvm-svn: 85311
* Similar to r85280, do not clear the "S" bit for RSBri and RSBrs.Johnny Chen2009-10-271-2/+0
| | | | llvm-svn: 85299
* Do not held on to DenseMap slot accross map insertion. The insertion may ↵Devang Patel2009-10-272-22/+26
| | | | | | | | cause the map to grow rending the slot invalid. Use this opportunity to use ValueMap instead of DenseMap. llvm-svn: 85298
* Set condition code bits of BL and BLr9 to 0b1110 (ALways) to distinguish betweenJohnny Chen2009-10-271-2/+6
| | | | | | BL_pred and BLr9_pred. llvm-svn: 85297
* don't use stdioChris Lattner2009-10-271-1/+1
| | | | llvm-svn: 85296
OpenPOWER on IntegriCloud