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* Fix MSVC build for r357749Pavel Labath2019-04-051-5/+5
| | | | | | | | MSVC found the bare "make_unique" invocation ambiguous (between std:: and llvm:: versions). Explicitly qualifying the call with llvm:: should hopefully fix it. llvm-svn: 357750
* Minidump: Add support for reading/writing stringsPavel Labath2019-04-052-5/+69
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: Strings in minidump files are stored as a 32-bit length field, giving the length of the string in *bytes*, which is followed by the appropriate number of UTF16 code units. The string is also supposed to be null-terminated, and the null-terminator is not a part of the length field. This patch: - adds support for reading these strings out of the minidump file (this implementation does not depend on proper null-termination) - adds support for writing them to a minidump file - using the previous two pieces implements proper (de)serialization of the CSDVersion field of the SystemInfo stream. Previously, this was only read/written as hex, and no attempt was made to access the referenced string -- now this string is read and written correctly. The changes are tested via yaml2obj|obj2yaml round-trip as well as a unit test which checks the corner cases of the string deserialization logic. Reviewers: jhenderson, zturner, clayborg Subscribers: llvm-commits, aprantl, markmentovai, amccarth, lldb-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D59775 llvm-svn: 357749
* [SelectionDAG] Compute known bits of CopyFromRegPiotr Sobczak2019-04-052-3/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | Summary: Teach SelectionDAG how to compute known bits of ISD::CopyFromReg if the virtual reg used has one def only. This can be particularly useful when calling isBaseWithConstantOffset() with the ISD::CopyFromReg argument, as more optimizations may get enabled in the result. Also add a missing truncation on X86, found by testing of this patch. Change-Id: Id1c9fceec862d118c54a5b53adf72ada5d6daefa Reviewers: bogner, craig.topper, RKSimon Reviewed By: RKSimon Subscribers: lebedev.ri, nemanjai, jvesely, nhaehnle, javed.absar, jsji, jdoerfert, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D59535 llvm-svn: 357745
* [X86] Promote i16 SRA instructions to i32Craig Topper2019-04-051-0/+2
| | | | | | | | | | | | We already promote SRL and SHL to i32. This will introduce sign extends sometimes which might be harder to deal with than the zero we use for promoting SRL. I ran this through some of our internal benchmark lists and didn't see any major regressions. I think there might be some DAG combine improvement opportunities in the test changes here. Differential Revision: https://reviews.llvm.org/D60278 llvm-svn: 357743
* [FastISel] Fix crash for gc.relocate lowringSerguei Katkov2019-04-051-1/+6
| | | | | | | | | | | | | | Lowering safepoint checks that all gc.relocaes observed in safepoint must be lowered. However Fast-Isel is able to skip dead gc.relocate. To resolve this issue we just ignore dead gc.relocate in the check. Reviewers: reames Reviewed By: reames Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D60184 llvm-svn: 357742
* NFC: Move API uses of MD5::MD5Result to Optional rather than a pointer.Eric Christopher2019-04-048-30/+32
| | | | | | Differential Revision: https://reviews.llvm.org/D60290 llvm-svn: 357736
* An unreachable block may have a route to a reachable block, don't fast-path ↵Nick Lewycky2019-04-041-2/+2
| | | | | | | | | | return that it can't. A block reachable from the entry block can't have any route to a block that's not reachable from the entry block (if it did, that route would make it reachable from the entry block). That is the intended performance optimization for isPotentiallyReachable. For the case where we ask whether an unreachable from entry block has a route to a reachable from entry block, we can't conclude one way or the other. Fix a bug where we claimed there could be no such route. The fix in rL357425 ironically reintroduced the very bug it was fixing but only when a DominatorTree is provided. This fixes the remaining bug. llvm-svn: 357734
* [TextAPI] Prefix all architecture enums to fix the build on i386.Juergen Ributzka2019-04-043-11/+11
| | | | | | | | | | | | | | | | | Summary: This changes the Architecture enum to use a prefix (AK_) to prevent the preprocessor from replacing i386 with 1 when building llvm/clang for i386. Reviewers: steven_wu, lhames, mstorsjo Reviewed By: mstorsjo Subscribers: hiraditya, jkorous, dexonsmith, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D60241 llvm-svn: 357733
* [IR] Refactor attribute methods in Function class (NFC)Evandro Menezes2019-04-0467-123/+123
| | | | | | | | Rename the functions that query the optimization kind attributes. Differential revision: https://reviews.llvm.org/D60287 llvm-svn: 357731
* Revert [X86] When using Win64 ABI, exit with error if SSE is disabled for ↵James Y Knight2019-04-041-3/+0
| | | | | | | | | | | | | | | varargs It unnecessarily breaks previously-working code which used varargs, but didn't pass any float/double arguments (such as EDK2). Also revert the fixup on top of that: Revert [X86] Fix a test from r357317 This reverts r357317 (git commit d413f41de6baf500e5d20c638375447e18777db2) This reverts r357380 (git commit 7af32444b9b17719ebabb6bee6eb52465acc8507) llvm-svn: 357718
* Appease STLs where std::atomic<void*> lacks a constexpr default ctorReid Kleckner2019-04-041-4/+2
| | | | | | | | MSVC 2019 casts the pointer to a pointer-sized integer, which is a reinterpret_cast, which is invalid in a constexpr context, so I have to remove the LLVM_REQUIRES_CONSTANT_INITIALIZATION annotation for now. llvm-svn: 357716
* Ensure that ManagedStatic is constant initialized in MSVC 2017 & 2019Reid Kleckner2019-04-041-3/+8
| | | | | | | | | | | | | | | | | | | Fixes PR41367. This effectively relands r357655 with a workaround for MSVC 2017. I tried various approaches with unions, but I ended up going with this ifdef approach because it lets us write the proper C++11 code that we want to write, with a separate workaround that we can delete when we drop MSVC 2017 support. This also adds LLVM_REQUIRE_CONSTANT_INITIALIZATION, which wraps [[clang::require_constant_initialization]]. This actually detected a minor issue when using clang-cl where clang wasn't able to use the constexpr constructor in MSVC's STL, so I switched back to using the default ctor of std::atomic<void*>. llvm-svn: 357714
* [WebAssembly] Add new explicit relocation types for PIC relocationsSam Clegg2019-04-047-28/+76
| | | | | | | | See https://github.com/WebAssembly/tool-conventions/pull/106 Differential Revision: https://reviews.llvm.org/D59907 llvm-svn: 357710
* [x86] eliminate unnecessary broadcast of horizontal opSanjay Patel2019-04-041-4/+14
| | | | | | | This is another pattern that comes up if we more aggressively scalarize FP ops. llvm-svn: 357703
* [RISCV] Support assembling TLS add and associated modifiersLewis Revill2019-04-049-11/+202
| | | | | | | | | | This patch adds support in the MC layer for parsing and assembling the 4-operand add instruction needed for TLS addressing. This also involves parsing the %tprel_hi, %tprel_lo and %tprel_add operand modifiers. Differential Revision: https://reviews.llvm.org/D55341 llvm-svn: 357698
* [COFF] Fix delay import directory iteratorJoseph Tremoulet2019-04-041-1/+1
| | | | | | | | | | | | | | | | | | Summary: Take the Index into account in `getDelayImportTable`, otherwise we always return the entry for the first delay DLL reference. Reviewers: ruiu Reviewed By: ruiu Subscribers: hiraditya, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D60081 llvm-svn: 357697
* [SystemZ] Bugfix in isFusableLoadOpStorePattern()Jonas Paulsson2019-04-041-15/+16
| | | | | | | | | | | | | | | | | | | | | This function is responsible for checking the legality of fusing an instance of load -> op -> store into a single operation. In the SystemZ backend the check was incomplete and a test case emerged with a cycle in the instruction selection DAG as a result. Instead of using the NodeIds to determine node relationships, hasPredecessorHelper() now is used just like in the X86 backend. This handled the failing tests and as well gave a few additional transformations on benchmarks. The SystemZ isFusableLoadOpStorePattern() is now a very near copy of the X86 function, and it seems this could be made a utility function in common code instead. Review: Ulrich Weigand https://reviews.llvm.org/D60255 llvm-svn: 357688
* [Symbolize] Keep SymbolDescs with the same address and improve ↵Fangrui Song2019-04-042-3/+6
| | | | | | | | getNameFromSymbolTable heuristic I'll follow up with better heuristics or tests. llvm-svn: 357683
* [ARM GlobalISel] Support DBG_VALUEDiana Picus2019-04-041-0/+7
| | | | | | Make sure we can map and select DBG_VALUE. llvm-svn: 357681
* [AArch64][AsmParser] Fix .arch_extension directive parsingSander de Smalen2019-04-041-8/+2
| | | | | | | | | | | | | | | | | | This patch fixes .arch_extension directive parsing to handle a wider range of architecture extension options. The existing parser was parsing extensions as an identifier which breaks for extensions containing a "-", such as the "tlb-rmi" extension. The extension is now parsed as a string. This is consistent with the extension parsing in the .arch and .cpu directive parsing. Patch by Cullen Rhodes (c-rhodes) Reviewed By: SjoerdMeijer Differential Revision: https://reviews.llvm.org/D60118 llvm-svn: 357677
* [llvm-symbolizer] Add `--output-style` switch.Igor Kudrin2019-04-041-1/+4
| | | | | | | | | | | | | In general, llvm-symbolizer follows the output style of GNU's addr2line. However, there are still some differences; in particular, for a requested address, llvm-symbolizer prints line and column, while addr2line prints only the line number. This patch adds a new switch to select the preferred style. Differential Revision: https://reviews.llvm.org/D60190 llvm-svn: 357675
* [InstCombine] Combine no-wrap sub and icmp w/ constant.Luqman Aden2019-04-041-1/+10
| | | | | | | | | | | | | | | | Teach InstCombine the transformation `(icmp P (sub nuw|nsw C2, Y), C) -> (icmp swap(P) Y, C2-C)` Reviewers: majnemer, apilipenko, sanjoy, spatel, lebedev.ri Reviewed By: lebedev.ri Subscribers: dmgreen, lebedev.ri, nikic, hiraditya, JDevlieghere, jfb, jdoerfert, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D59916 llvm-svn: 357674
* [X86] Use INSERT_SUBREG rather than SUBREG_TO_REG when creating LEA64_32 ↵Craig Topper2019-04-041-13/+8
| | | | | | | | | during isel. SUBREG_TO_REG is supposed to be used to assert that we know the upper bits are zero. But that isn't the case here. We've done no analysis of the inputs. llvm-svn: 357673
* [FastISel] Fix the crash in gc.result loweringSerguei Katkov2019-04-041-1/+2
| | | | | | | | | | | | | | | | | | | | | | | The Fast ISel has a fallback to SelectionDAGISel in case it cannot handle the instruction. This works as follows: Using reverse order, try to select instruction using Fast ISel, if it cannot handle instruction it fallbacks to SelectionDAGISel for these instructions if it is a call and continue fast instruction selections. However if unhandled instruction is not a call or statepoint related instruction it fallbacks to SelectionDAGISel for all remaining instructions in basic block. However gc.result instruction is missed and as a result it is possible that gc.result is processed earlier than statepoint causing breakage invariant the gc.results should be handled after statepoint. Test is updated because in the current form fast-isel cannot handle ret instruction (due to i1 ret type without explicit ext) and as a result test does not check fast-isel at all. Reviewers: reames Reviewed By: reames Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D60182 llvm-svn: 357672
* Revert r357452 - 'SimplifyCFG SinkCommonCodeFromPredecessors: Also sink ↵David L. Jones2019-04-041-15/+14
| | | | | | | | | | function calls without used results (PR41259)' This revision causes tests to fail under ASAN. Since the cause of the failures is not clear (could be ASAN, could be a Clang bug, could be a bug in this revision), the safest course of action seems to be to revert while investigating. llvm-svn: 357667
* [WebAssembly] EmscriptenEHSjLj: Don't abort if __THREW__ is definedSam Clegg2019-04-041-4/+5
| | | | | | | | | | | | | | | | | This allows __THREW__ to be defined in the current module, although it is still required to be a GlobalVariable. In emscripten we want to be able to compile the source code that defines this symbols. Previously we were avoid this by not running this pass when building that compiler-rt library, but I have change out to build it using the normal compiler path: https://github.com/emscripten-core/emscripten/pull/8391 Differential Revision: https://reviews.llvm.org/D60232 llvm-svn: 357665
* [XCOFF] Add functionality for parsing AIX XCOFF object file headersHubert Tong2019-04-048-0/+325
| | | | | | | | | | | | | | | | | | | | | Summary: 1. Add functionality for parsing AIX XCOFF object files headers. 2. Only support 32-bit AIX XCOFF object files in this patch. 3. Print out the AIX XCOFF object file header in YAML format. Reviewers: sfertile, hubert.reinterpretcast, jasonliu, mstorsjo, zturner, rnk Reviewed By: sfertile, hubert.reinterpretcast Subscribers: jsji, mgorny, hiraditya, jdoerfert, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D59419 Patch by Digger Lin llvm-svn: 357663
* [Support] On AIX, Check ENOTSUP on posix_fallocate instead of EOPNOTSUPPHubert Tong2019-04-041-1/+6
| | | | | | | | | | | | | | | | | | | | Summary: `posix_fallocate` can fail if the underlying filesystem does not support it; and, on AIX, such a failure is reported by a return value of `ENOTSUP`. The existing code checks only for `EOPNOTSUPP`, which may share the same value as `ENOTSUP`, but is not required to. Reviewers: xingxue, sfertile, jasonliu Reviewed By: xingxue Subscribers: kristina, jsji, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D60175 llvm-svn: 357662
* [X86] Remove CustomInserters for RDPKRU/WRPKRU. Use some custom lowering and ↵Craig Topper2019-04-044-52/+37
| | | | | | | | | | | | | | new ISD opcodes instead. These inserters inserted some instructions to zero some registers and copied from virtual registers to physical registers. This change instead inserts the zeros directly into the DAG at lowering time using new ISD opcodes that take the extra zeroes as inputs. The zeros will then go through isel on their own to select the MOV32r0 pseudo. Then we just need to mention the physical registers directly in the isel patterns and the isel table and InstrEmitter will take care of inserting the necessary copies to/from physical registers. llvm-svn: 357659
* [codeview] Remove Type member from CVRecordReid Kleckner2019-04-0414-70/+36
| | | | | | | | | | | | | | | | | Summary: Now CVType and CVSymbol are effectively type-safe wrappers around ArrayRef<uint8_t>. Make the kind() accessor load it from the RecordPrefix, which is the same for types and symbols. Reviewers: zturner, aganea Subscribers: hiraditya, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D60018 llvm-svn: 357658
* llvm-undname: Name a pair. No behavior change.Nico Weber2019-04-031-3/+5
| | | | | | Differential Revision: https://reviews.llvm.org/D60210 llvm-svn: 357653
* [X86] Remove CustomInserter pseudos for MONITOR/MONITORX/CLZERO. Use custom ↵Craig Topper2019-04-035-84/+78
| | | | | | | | | | | | | | | | | | | | | | instruction selection instead. This custom inserter existed so we could do a weird thing where we pretended that the instructions support a full address mode instead of taking a pointer in EAX/RAX. I think was largely so we could be pointer size agnostic in the isel pattern. To make this work we would then put the address into an LEA into EAX/RAX in front of the instruction after isel. But the LEA is overkill when we just have a base pointer. So we end up using the LEA as a slower MOV instruction. With this change we now just do custom selection during isel instead and just assign the incoming address of the intrinsic into EAX/RAX based on its size. After the intrinsic is selected, we can let isel take care of selecting an LEA or other operation to do any address computation needed in this basic block. I've also split the instruction into a 32-bit mode version and a 64-bit mode version so the implicit use is properly sized based on the pointer. Without this we get comments in the assembly output about killing eax and defing rax or vice versa depending on whether we define the instruction to use EAX/RAX. llvm-svn: 357652
* llvm-undname: Fix a crash-on-invalidNico Weber2019-04-031-1/+1
| | | | | | | | Found by oss-fuzz, fixes issue 13260 on oss-fuzz. Differential Revision: https://reviews.llvm.org/D60207 llvm-svn: 357649
* llvm-undame: Fix an assert-on-invalidNico Weber2019-04-031-1/+4
| | | | | | | | Found by oss-fuzz, fixes issue 12432 on os-fuzz. Differential Revision: https://reviews.llvm.org/D60206 llvm-svn: 357648
* llvm-undname: Fix an assert-on-invalidNico Weber2019-04-031-0/+5
| | | | | | | | Found by oss-fuzz, fixes issues 12428 and 12429 on oss-fuzz. Differential Revision: https://reviews.llvm.org/D60204 llvm-svn: 357647
* llvm-undname: Fix a crash-on-invalidNico Weber2019-04-031-0/+4
| | | | | | | | Found by oss-fuzz, fixes issues 12435 and 12438 on oss-fuzz. Differential Revision: https://reviews.llvm.org/D60202 llvm-svn: 357646
* [x86] fold shuffles of h-ops that have an undef operandSanjay Patel2019-04-031-2/+2
| | | | | | | If an operand is undef, we can assume it's the same as the other operand. llvm-svn: 357644
* [x86] eliminate movddup of horizontal opSanjay Patel2019-04-031-2/+11
| | | | | | | | | | | | This pattern would show up as a regression if we more aggressively convert vector FP ops to scalar ops. There's still a missed optimization for the v4f64 legal case (AVX) because we create that h-op with an undef operand. We should probably just duplicate the operands for that pattern to avoid trouble. llvm-svn: 357642
* [IR] Create new method in `Function` class (NFC)Evandro Menezes2019-04-0316-25/+21
| | | | | | | | | Create method `optForNone()` testing for the function level equivalent of `-O0` and refactor appropriately. Differential revision: https://reviews.llvm.org/D59852 llvm-svn: 357638
* AMDGPU: Split block for si_end_cfMatt Arsenault2019-04-035-17/+128
| | | | | | | | | | | | | | | Relying on no spill or other code being inserted before this was precarious. It relied on code diligently checking isBasicBlockPrologue which is likely to be forgotten. Ideally this could be done earlier, but this doesn't work because of phis. Any other instruction can't be placed before them, so we have to accept the position being incorrect during SSA. This avoids regressions in the fast register allocator rewrite from inverting the direction. llvm-svn: 357634
* [dwarfdump] Remove bogus verifier errorJonas Devlieghere2019-04-031-11/+1
| | | | | | | | The standard doesn't require a DW_TAG_variable, DW_TAG_formal_parameter or DW_TAG_constant to A DW_AT_type attribute describing the type of the variable. It only specifies that it *can* have one. llvm-svn: 357628
* [ProfileSummary] Count callsite samples when computing total samples.Taewook Oh2019-04-031-4/+9
| | | | | | | | | | | | | | Summary: Currently ProfileSummaryBuilder doesn't count into callsite samples when computing total samples. Considering that ProfileSummaryInfo is used to checked the hotness of not only body samples but also callsite samples (from SampleProfileLoader), I think the callsite sample counts should be considered when computing total samples. Reviewers: eraman, danielcdh, wmi Subscribers: hiraditya, jdoerfert, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D59835 llvm-svn: 357627
* [X86] Extend boolean arguments to inline-asm according to getBooleanTypeKrzysztof Parzyszek2019-04-031-2/+7
| | | | | | Differential Revision: https://reviews.llvm.org/D60208 llvm-svn: 357615
* [X86][AVX] combineHorizontalPredicateResult - split any/allof v16i16/v32i8 ↵Simon Pilgrim2019-04-031-1/+8
| | | | | | | | reduction on AVX1 Perform the 2 x 128-bit lo/hi OR/AND on the vectors before calling PMOVMSKB on the 128-bit result. llvm-svn: 357611
* [X86][AVX] combineHorizontalPredicateResult - support v16i16/v32i8 reduction ↵Simon Pilgrim2019-04-031-6/+3
| | | | | | | | on AVX1 Use getPMOVMSKB helper which splits v32i8 MOVMSK calls on pre-AVX2 targets. llvm-svn: 357608
* [DWARF] check whether the DIE is valid before querying for informationPaul Semel2019-04-031-0/+3
| | | | | | Differential Revision: https://reviews.llvm.org/D60147 llvm-svn: 357607
* [AArch64][GlobalISel] Legalize G_FEXP2Jessica Paquette2019-04-032-2/+7
| | | | | | | | | Same as G_EXP. Add a test, and update legalizer-info-validation.mir and f16-instructions.ll. Differential Revision: https://reviews.llvm.org/D60165 llvm-svn: 357605
* [DAGCombiner] Rename variables Demanded -> DemandedBits/DemandedElts. NFCI.Simon Pilgrim2019-04-031-9/+10
| | | | | | Use consistent variable names down the SimplifyDemanded* call stack so debugging isn't such a annoyance. llvm-svn: 357602
* Test commit: Remove double variable assignmentLewis Revill2019-04-031-1/+1
| | | | llvm-svn: 357601
* [SystemZ] Improve codegen for certain SADDO-immediate casesUlrich Weigand2019-04-032-0/+28
| | | | | | | | | | | | When performing an add-with-overflow with an immediate in the range -2G ... -4G, code currently loads the immediate into a register, which generally takes two instructions. In this particular case, it is preferable to load the negated immediate into a register instead, which always only requires one instruction, and then perform a subtract. llvm-svn: 357597
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