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| author | Lewis Revill <lewis.revill@embecosm.com> | 2019-04-03 15:54:30 +0000 |
|---|---|---|
| committer | Lewis Revill <lewis.revill@embecosm.com> | 2019-04-03 15:54:30 +0000 |
| commit | 24a74096a4948bc0400a08d3c5c2ac1d614fdd82 (patch) | |
| tree | 9a1382631801f9559cfac3d44f948c1716ca7b79 /llvm/lib | |
| parent | ed3eaf477c756bb1540ea5bf5a8f06f8c27d591c (diff) | |
| download | bcm5719-llvm-24a74096a4948bc0400a08d3c5c2ac1d614fdd82.tar.gz bcm5719-llvm-24a74096a4948bc0400a08d3c5c2ac1d614fdd82.zip | |
Test commit: Remove double variable assignment
llvm-svn: 357601
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/RISCV/RISCVISelLowering.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp index 03baccfabec..cc04c36393b 100644 --- a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp +++ b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp @@ -1189,7 +1189,7 @@ static bool CC_RISCV(const DataLayout &DL, RISCVABI::ABI ABI, unsigned ValNo, else if (ValVT == MVT::f64 && !UseGPRForF64) Reg = State.AllocateReg(ArgFPR64s, ArgFPR32s); else - Reg = Reg = State.AllocateReg(ArgGPRs); + Reg = State.AllocateReg(ArgGPRs); unsigned StackOffset = Reg ? 0 : State.AllocateStack(XLen / 8, XLen / 8); // If we reach this point and PendingLocs is non-empty, we must be at the |
