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* [mips] Remove a redundant semicolon and add space before curly brackets. NFC.Toma Tabacu2015-01-161-2/+2
| | | | llvm-svn: 226269
* Revert r226242 - Revert Revert Don't create new comdats in CodeGenTimur Iskhodzhanov2015-01-164-52/+35
| | | | | | This breaks AddressSanitizer (ninja check-asan) on Windows llvm-svn: 226251
* [PowerPC] Adjust PatchPoints for ppc64leHal Finkel2015-01-161-1/+9
| | | | | | | | | | Bill Schmidt pointed out that some adjustments would be needed to properly support powerpc64le (using the ELF V2 ABI). For one thing, R11 is not available as a scratch register, so we need to use R12. R12 is also available under ELF V1, so to maintain consistency, I flipped the order to make R12 the first scratch register in the array under both ABIs. llvm-svn: 226247
* Fix Reassociate handling of constant in presence of undef floatMehdi Amini2015-01-161-3/+6
| | | | | | http://reviews.llvm.org/D6993 llvm-svn: 226245
* Revert "Revert Don't create new comdats in CodeGen"Rafael Espindola2015-01-164-35/+52
| | | | | | | | | | | | | | | | | | This reverts commit r226173, adding r226038 back. No change in this commit, but clang was changed to also produce trivial comdats for costructors, destructors and vtables when needed. Original message: Don't create new comdats in CodeGen. This patch stops the implicit creation of comdats during codegen. Clang now sets the comdat explicitly when it is required. With this patch clang and gcc now produce the same result in pr19848. llvm-svn: 226242
* Add a new pass "inductive range check elimination"Sanjoy Das2015-01-163-0/+1212
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | IRCE eliminates range checks of the form 0 <= A * I + B < Length by splitting a loop's iteration space into three segments in a way that the check is completely redundant in the middle segment. As an example, IRCE will convert len = < known positive > for (i = 0; i < n; i++) { if (0 <= i && i < len) { do_something(); } else { throw_out_of_bounds(); } } to len = < known positive > limit = smin(n, len) // no first segment for (i = 0; i < limit; i++) { if (0 <= i && i < len) { // this check is fully redundant do_something(); } else { throw_out_of_bounds(); } } for (i = limit; i < n; i++) { if (0 <= i && i < len) { do_something(); } else { throw_out_of_bounds(); } } IRCE can deal with multiple range checks in the same loop (it takes the intersection of the ranges that will make each of them redundant individually). Currently IRCE does not do any profitability analysis. That is a TODO. Please note that the status of this pass is *experimental*, and it is not part of any default pass pipeline. Having said that, I will love to get feedback and general input from people interested in trying this out. This pass was originally r226201. It was reverted because it used C++ features not supported by MSVC 2012. Differential Revision: http://reviews.llvm.org/D6693 llvm-svn: 226238
* This should fix the build bot clang-cmake-armv7-a15-full failing onKevin Enderby2015-01-161-2/+0
| | | | | | the macho-archive-headers.test added with r226228. llvm-svn: 226232
* R600/SI: Add patterns for v_cvt_{flr|rpi}_i32_f32Matt Arsenault2015-01-152-2/+21
| | | | llvm-svn: 226230
* Fix edge case when Start overflowed in 32 bit modeFilipe Cabecinhas2015-01-151-2/+3
| | | | llvm-svn: 226229
* Add the option, -archive-headers, used with -macho to print the Mach-O ↵Kevin Enderby2015-01-151-0/+13
| | | | | | archive headers to llvm-objdump. llvm-svn: 226228
* R600/SI: Fix trailing comma with modifiersMatt Arsenault2015-01-151-1/+1
| | | | | | | Instructions with 1 operand can still use source modifiers, so make sure we don't print an extra comma afterwards. llvm-svn: 226226
* [Hexagon] Adding new-value store and bit reverse instructions.Colin LeMahieu2015-01-151-0/+104
| | | | llvm-svn: 226224
* Report fatal errors instead of segfaulting/asserting on a few invalid ↵Filipe Cabecinhas2015-01-151-8/+46
| | | | | | | | | | | | | | | | | accesses while reading MachO files. Summary: Shift an older “invalid file” test to get a consistent naming for these tests. Bugs found by afl-fuzz Reviewers: rafael Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D6945 llvm-svn: 226219
* [Object] Add SF_Exported flag. This flag will be set on all symbols that wouldLang Hames2015-01-151-0/+3
| | | | | | | | | be exported from a dylib if their containing object file were linked into one. No test case: No command line tools query this flag, and there are no Object unit tests. llvm-svn: 226217
* Revert r226201 (Add a new pass "inductive range check elimination")Sanjoy Das2015-01-153-1191/+0
| | | | | | | The change used C++11 features not supported by MSVC 2012. I will fix the change to use things supported MSVC 2012 and recommit shortly. llvm-svn: 226216
* InductiveRangeCheckElimination: Remove extra ';'David Majnemer2015-01-151-3/+3
| | | | | | This silences a GCC warning. llvm-svn: 226215
* Fixing pedantic build warnings.Andrew Kaylor2015-01-151-2/+3
| | | | llvm-svn: 226214
* [Hexagon] Fix 226206 by uncommenting required pattern and changing patterns ↵Colin LeMahieu2015-01-152-62/+15
| | | | | | for simple load-extends. llvm-svn: 226210
* [PowerPC] Loosen ELFv1 PPC64 func descriptor loads for indirect callsHal Finkel2015-01-158-80/+83
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Function pointers under PPC64 ELFv1 (which is used on PPC64/Linux on the POWER7, A2 and earlier cores) are really pointers to a function descriptor, a structure with three pointers: the actual pointer to the code to which to jump, the pointer to the TOC needed by the callee, and an environment pointer. We used to chain these loads, and make them opaque to the rest of the optimizer, so that they'd always occur directly before the call. This is not necessary, and in fact, highly suboptimal on embedded cores. Once the function pointer is known, the loads can be performed ahead of time; in fact, they can be hoisted out of loops. Now these function descriptors are almost always generated by the linker, and thus the contents of the descriptors are invariant. As a result, by default, we'll mark the associated loads as invariant (allowing them to be hoisted out of loops). I've added a target feature to turn this off, however, just in case someone needs that option (constructing an on-stack descriptor, casting it to a function pointer, and then calling it cannot be well-defined C/C++ code, but I can imagine some JIT-compilation system doing so). Consider this simple test: $ cat call.c typedef void (*fp)(); void bar(fp x) { for (int i = 0; i < 1600000000; ++i) x(); } $ cat main.c typedef void (*fp)(); void bar(fp x); void foo() {} int main() { bar(foo); } On the PPC A2 (the BG/Q supercomputer), marking the function-descriptor loads as invariant brings the execution time down to ~8 seconds from ~32 seconds with the loads in the loop. The difference on the POWER7 is smaller. Compiling with: gcc -std=c99 -O3 -mcpu=native call.c main.c : ~6 seconds [this is 4.8.2] clang -O3 -mcpu=native call.c main.c : ~5.3 seconds clang -O3 -mcpu=native call.c main.c -mno-invariant-function-descriptors : ~4 seconds (looks like we'd benefit from additional loop unrolling here, as a first guess, because this is faster with the extra loads) The -mno-invariant-function-descriptors will be added to Clang shortly. llvm-svn: 226207
* [Hexagon] Updating indexed load-extend patterns and changing test to new ↵Colin LeMahieu2015-01-151-36/+24
| | | | | | expected output. llvm-svn: 226206
* Add a new pass "inductive range check elimination"Sanjoy Das2015-01-153-0/+1191
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | IRCE eliminates range checks of the form 0 <= A * I + B < Length by splitting a loop's iteration space into three segments in a way that the check is completely redundant in the middle segment. As an example, IRCE will convert len = < known positive > for (i = 0; i < n; i++) { if (0 <= i && i < len) { do_something(); } else { throw_out_of_bounds(); } } to len = < known positive > limit = smin(n, len) // no first segment for (i = 0; i < limit; i++) { if (0 <= i && i < len) { // this check is fully redundant do_something(); } else { throw_out_of_bounds(); } } for (i = limit; i < n; i++) { if (0 <= i && i < len) { do_something(); } else { throw_out_of_bounds(); } } IRCE can deal with multiple range checks in the same loop (it takes the intersection of the ranges that will make each of them redundant individually). Currently IRCE does not do any profitability analysis. That is a TODO. Please note that the status of this pass is *experimental*, and it is not part of any default pass pipeline. Having said that, I will love to get feedback and general input from people interested in trying this out. Differential Revision: http://reviews.llvm.org/D6693 llvm-svn: 226201
* Revert "r226086 - Revert "r226071 - [RegisterCoalescer] Remove copies to ↵Hal Finkel2015-01-151-5/+47
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | reserved registers"" Reapply r226071 with fixes. Two fixes: 1. We need to manually remove the old and create the new 'deaf defs' associated with physical register definitions when we move the definition of the physical register from the copy point to the point of the original vreg def. This problem was picked up by the machinstr verifier, and could trigger a verification failure on test/CodeGen/X86/2009-02-12-DebugInfoVLA.ll, so I've turned on the verifier in the tests. 2. When moving the def point of the phys reg up, we need to make sure that it is neither defined nor read in between the two instructions. We don't, however, extend the live ranges of phys reg defs to cover uses, so just checking for live-range overlap between the pair interval and the phys reg aliases won't pick up reads. As a result, we manually iterate over the range and check for reads. A test soon to be committed to the PowerPC backend will test this change. Original commit message: [RegisterCoalescer] Remove copies to reserved registers This allows the RegisterCoalescer to join "non-flipped" range pairs with a physical destination register -- which allows the RegisterCoalescer to remove copies like this: <vreg> = something (maybe a load, for example) ... (things that don't use PHYSREG) PHYSREG = COPY <vreg> (with all of the restrictions normally applied by the RegisterCoalescer: having compatible register classes, etc. ) Previously, the RegisterCoalescer handled only the opposite case (copying *from* a physical register). I don't handle the problem fully here, but try to get the common case where there is only one use of <vreg> (the COPY). An upcoming commit to the PowerPC backend will make this pattern much more common on PPC64/ELF systems. llvm-svn: 226200
* Style cleanup of old gc.root lowering codePhilip Reames2015-01-151-46/+45
| | | | | | Use static functions for helpers rather than static member functions. a) this changes the linking (minor at best), and b) this makes it obvious no object state is involved. llvm-svn: 226198
* clang-format GCStrategy.cpp & GCRootLowering.cpp (NFC)Philip Reames2015-01-152-98/+84
| | | | llvm-svn: 226196
* Split GCStrategy.cpp into two files (NFC)Philip Reames2015-01-153-380/+392
| | | | | | This preparation for an update to http://reviews.llvm.org/D6811. GCStrategy.cpp will hopefully be moving into IR/, where as the lowering logic needs to stay in CodeGen/ llvm-svn: 226195
* [Hexagon] Removing old versions of vsplice, valign, cl0, ct0 and updating ↵Colin LeMahieu2015-01-153-47/+45
| | | | | | references to new versions. llvm-svn: 226194
* R600/SI: Unify VOP2 instructions which are VOP3-only on VIMarek Olsak2015-01-153-77/+56
| | | | | | | | | | | | | This removes some duplicated classes and definitions. These instructions are defined: _e32 // pseudo _e32_si _e64 // pseudo _e64_si _e64_vi llvm-svn: 226191
* R600/SI: Use 64-bit encoding by default for opcodes that are VOP3-only on VIMarek Olsak2015-01-152-4/+4
| | | | llvm-svn: 226190
* R600/SI: Add V_READLANE_B32 and V_WRITELANE_B32 for VIMarek Olsak2015-01-152-11/+28
| | | | | | | | These are VOP3-only on VI. The new multiclass doesn't define VOP3 versions of VOP2 instructions. llvm-svn: 226189
* R600/SI: Don't shrink instructions whose e32 encoding doesn't existMarek Olsak2015-01-158-42/+57
| | | | | | | | v2: modify hasVALU32BitEncoding instead v3: - add pseudoToMCOpcode helper to AMDGPUInstInfo, which is used by both hasVALU32BitEncoding and AMDGPUMCInstLower::lower - report an error if a pseudo can't be lowered llvm-svn: 226188
* R600/SI: Add common class VOPAnyCommonMarek Olsak2015-01-151-23/+13
| | | | llvm-svn: 226187
* R600/SI: Don't select SI-only VOP3 opcodes on VIMarek Olsak2015-01-151-17/+20
| | | | llvm-svn: 226186
* [Hexagon] Adding vmux instruction. Removing old transfer instructions and ↵Colin LeMahieu2015-01-153-302/+59
| | | | | | updating references. llvm-svn: 226184
* Support @PLT loads on 32bit x86.Joerg Sonnenberger2015-01-151-0/+3
| | | | llvm-svn: 226182
* [Hexagon] Deleting old float comparison instruction and updating references ↵Colin LeMahieu2015-01-152-77/+33
| | | | | | to new ones. llvm-svn: 226179
* [Hexagon] Replacing old fadd/fsub instructions and updating references.Colin LeMahieu2015-01-152-32/+17
| | | | llvm-svn: 226176
* Revert Don't create new comdats in CodeGenTimur Iskhodzhanov2015-01-154-52/+35
| | | | | | It breaks AddressSanitizer on Windows. llvm-svn: 226173
* [mips] Fix a typo in the compare patterns for MIPS32r6/MIPS64r6.Daniel Sanders2015-01-151-2/+2
| | | | | | | | | | | | | | Summary: The patterns intended for the SETLE node were actually matching the SETLT node. Reviewers: atanasyan, sstankovic, vmedic Reviewed By: vmedic Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D6997 llvm-svn: 226171
* Fix SelectionDAG -view-*-dags filteringMehdi Amini2015-01-151-1/+1
| | | | llvm-svn: 226163
* Replace size method call of containers to empty method where appropriateAlexander Kornienko2015-01-1510-12/+12
| | | | | | | | | | | | | | | | This patch was generated by a clang tidy checker that is being open sourced. The documentation of that checker is the following: /// The emptiness of a container should be checked using the empty method /// instead of the size method. It is not guaranteed that size is a /// constant-time function, and it is generally more efficient and also shows /// clearer intent to use empty. Furthermore some containers may implement the /// empty method but not implement the size method. Using empty whenever /// possible makes it easier to switch to another container in the future. Patch by Gábor Horváth! llvm-svn: 226161
* [PM] Port TargetLibraryInfo to the new pass manager, provided by theChandler Carruth2015-01-151-1/+22
| | | | | | | | | | | | | | | | | | | | TargetLibraryAnalysis pass. There are actually no direct tests of this already in the tree. I've added the most basic test that the pass manager bits themselves work, and the TLI object produced will be tested by an upcoming patches as they port passes which rely on TLI. This is starting to point out the awkwardness of the invalidate API -- it seems poorly fitting on the *result* object. I suspect I will change it to live on the analysis instead, but that's not for this change, and I'd rather have a few more passes ported in order to have more experience with how this plays out. I believe there is only one more analysis required in order to start porting instcombine. =] llvm-svn: 226160
* [PM] Separate the TargetLibraryInfo object from the immutable pass.Chandler Carruth2015-01-1533-99/+131
| | | | | | | | | | | | | | The pass is really just a means of accessing a cached instance of the TargetLibraryInfo object, and this way we can re-use that object for the new pass manager as its result. Lots of delta, but nothing interesting happening here. This is the common pattern that is developing to allow analyses to live in both the old and new pass manager -- a wrapper pass in the old pass manager emulates the separation intrinsic to the new pass manager between the result and pass for analyses. llvm-svn: 226157
* Hide some redundant AVX512 instructions from the asm parser, but force them ↵Craig Topper2015-01-151-1/+1
| | | | | | to show up in the disassembler. llvm-svn: 226155
* SimplifyIndVar: Remove unused variableDavid Majnemer2015-01-151-3/+0
| | | | | | OtherOperandIdx is not used anymore, remove it to silence warnings. llvm-svn: 226138
* Update libdeps since TLI was moved from Target to Analysis in r226078.NAKAMURA Takumi2015-01-159-9/+9
| | | | llvm-svn: 226126
* Reorder.NAKAMURA Takumi2015-01-151-1/+1
| | | | llvm-svn: 226125
* Revert "r226071 - [RegisterCoalescer] Remove copies to reserved registers"Hal Finkel2015-01-151-15/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Reverting this while I investigate some bad behavior this is causing. As a possibly-related issue, adding -verify-machineinstrs to one of the test cases now fails because of this change: llc test/CodeGen/X86/2009-02-12-DebugInfoVLA.ll -march=x86-64 -o - -verify-machineinstrs *** Bad machine code: No instruction at def index *** - function: foo - basic block: BB#0 return (0x10007e21f10) [0B;736B) - liverange: [128r,128d:9)[160r,160d:8)[176r,176d:7)[336r,336d:6)[464r,464d:5)[480r,480d:4)[624r,624d:3)[752r,752d:2)[768r,768d:1)[78 4r,784d:0) 0@784r 1@768r 2@752r 3@624r 4@480r 5@464r 6@336r 7@176r 8@160r 9@128r - register: %DS Valno #3 is defined at 624r *** Bad machine code: Live segment doesn't end at a valid instruction *** - function: foo - basic block: BB#0 return (0x10007e21f10) [0B;736B) - liverange: [128r,128d:9)[160r,160d:8)[176r,176d:7)[336r,336d:6)[464r,464d:5)[480r,480d:4)[624r,624d:3)[752r,752d:2)[768r,768d:1)[78 4r,784d:0) 0@784r 1@768r 2@752r 3@624r 4@480r 5@464r 6@336r 7@176r 8@160r 9@128r - register: %DS [624r,624d:3) LLVM ERROR: Found 2 machine code errors. where 624r corresponds exactly to the interval combining change: 624B %RSP<def> = COPY %vreg16; GR64:%vreg16 Considering merging %vreg16 with %RSP RHS = %vreg16 [608r,624r:0) 0@608r updated: 608B %RSP<def> = MOV64rm <fi#3>, 1, %noreg, 0, %noreg; mem:LD8[%saved_stack.1] Success: %vreg16 -> %RSP Result = %RSP llvm-svn: 226086
* Switch this header file to not hard-code Windows line endings.Chandler Carruth2015-01-151-68/+68
| | | | llvm-svn: 226081
* [PM] Move TargetLibraryInfo into the Analysis library.Chandler Carruth2015-01-1544-43/+43
| | | | | | | | | | | | | | | | While the term "Target" is in the name, it doesn't really have to do with the LLVM Target library -- this isn't an abstraction which LLVM targets generally need to implement or extend. It has much more to do with modeling the various runtime libraries on different OSes and with different runtime environments. The "target" in this sense is the more general sense of a target of cross compilation. This is in preparation for porting this analysis to the new pass manager. No functionality changed, and updates inbound for Clang and Polly. llvm-svn: 226078
* Win64Exception.cpp: Try to fix crash for x64 EH. "Per" might be null there.NAKAMURA Takumi2015-01-151-1/+1
| | | | llvm-svn: 226077
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