diff options
author | Hal Finkel <hfinkel@anl.gov> | 2015-01-16 04:40:58 +0000 |
---|---|---|
committer | Hal Finkel <hfinkel@anl.gov> | 2015-01-16 04:40:58 +0000 |
commit | 52f7c018d3435287d558e77de5859679aa3eb764 (patch) | |
tree | 311aa61ac11f8cd203287c42b31c03843d85f2f1 /llvm/lib | |
parent | 6fffd487ee91243cc9f50e1e6dcb024d0dad6ea2 (diff) | |
download | bcm5719-llvm-52f7c018d3435287d558e77de5859679aa3eb764.tar.gz bcm5719-llvm-52f7c018d3435287d558e77de5859679aa3eb764.zip |
[PowerPC] Adjust PatchPoints for ppc64le
Bill Schmidt pointed out that some adjustments would be needed to properly
support powerpc64le (using the ELF V2 ABI). For one thing, R11 is not available
as a scratch register, so we need to use R12. R12 is also available under ELF
V1, so to maintain consistency, I flipped the order to make R12 the first
scratch register in the array under both ABIs.
llvm-svn: 226247
Diffstat (limited to 'llvm/lib')
-rw-r--r-- | llvm/lib/Target/PowerPC/PPCISelLowering.cpp | 10 |
1 files changed, 9 insertions, 1 deletions
diff --git a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp index 1f525fe7f8b..e17c4e675c6 100644 --- a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp +++ b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp @@ -9910,8 +9910,16 @@ PPCTargetLowering::getScratchRegisters(CallingConv::ID) const { // site. Hence we include LR in the scratch registers, which are in turn added // as implicit-defs for stackmaps and patchpoints. The same reasoning applies // to CTR, which is used by any indirect call. + if (Subtarget.isELFv2ABI()) { + static const MCPhysReg ScratchRegs[] = { + PPC::X12, PPC::LR8, PPC::CTR8, 0 + }; + + return ScratchRegs; + } + static const MCPhysReg ScratchRegs[] = { - PPC::X11, PPC::X12, PPC::LR8, PPC::CTR8, 0 + PPC::X12, PPC::X11, PPC::LR8, PPC::CTR8, 0 }; return ScratchRegs; |