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relies on DBG_LABEL. Unfortunately this intefers with the quality of optimized code.
This patch updates dwarf writer to encode scoping information in DWARF only in FastISel mode.
llvm-svn: 68973
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Now debug_inlined section is covered by TAI->doesDwarfUsesInlineInfoSection(), which is false by default.
llvm-svn: 68964
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- Add patterns for h-register extract, which avoids a shift and mask,
and in some cases a temporary register.
- Add address-mode matching for turning (X>>(8-n))&(255<<n), where
n is a valid address-mode scale value, into an h-register extract
and a scaled-offset address.
- Replace X86's MOV32to32_ and related instructions with the new
target-independent COPY_TO_SUBREG instruction.
On x86-64 there are complicated constraints on h registers, and
CodeGen doesn't currently provide a high-level way to express all of them,
so they are handled with a bunch of special code. This code currently only
supports extracts where the result is used by a zero-extend or a store,
though these are fairly common.
These transformations are not always beneficial; since there are only
4 h registers, they sometimes require extra move instructions, and
this sometimes increases register pressure because it can force out
values that would otherwise be in one of those registers. However,
this appears to be relatively uncommon.
llvm-svn: 68962
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This will be used to replace things like X86's MOV32to32_.
Enhance ScheduleDAGSDNodesEmit to be more flexible and robust
in the presense of subregister superclasses and subclasses. It
can now cope with the definition of a virtual register being in
a subclass of a use.
Re-introduce the code for recording register superreg classes and
subreg classes. This is needed because when subreg extracts and
inserts get coalesced away, the virtual registers are left in
the correct subclass.
llvm-svn: 68961
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ISD::SIGN_EXTEND_INREG. Tablegen-generated code can handle
these cases, and the scheduling issues observed earlier
appear to be resolved now.
llvm-svn: 68959
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llvm-svn: 68958
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a live interval. This is needed for some upcoming subreg changes.
llvm-svn: 68956
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the subreg field to 0, since the subreg field is only used
for virtual register subregs. This doesn't change
current functionality; it just eliminates bogus noise from
debug output.
llvm-svn: 68955
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llvm-svn: 68954
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llvm-svn: 68953
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llvm-svn: 68951
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llvm-svn: 68950
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This unbreaks the JIT on x86-64.
llvm-svn: 68948
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llvm-svn: 68947
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getting passed. We couldn't catch this as we did not have tests that were passing an int value larger than 256.
llvm-svn: 68946
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declarations.
llvm-svn: 68944
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to support C99 inline, GNU extern inline, etc. Related bugzilla's
include PR3517, PR3100, & PR2933. Nothing uses this yet, but it
appears to work.
llvm-svn: 68940
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llvm-svn: 68939
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interpreter mode" when it's not.
llvm-svn: 68937
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patch by Alexei Svitkine!
llvm-svn: 68929
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only if symbolic addresses are RIP relatives.
llvm-svn: 68924
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llvm-svn: 68915
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strncat :(
strncat(foo, "bar", 99)
would be optimized to
memcpy(foo+strlen(foo), "bar", 100, 1)
instead of
memcpy(foo+strlen(foo), "bar", 4, 1)"
Patch by Benjamin Kramer!
llvm-svn: 68905
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See comment for details. This fixes rdar://6772169
llvm-svn: 68890
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copying into the right register, avoiding a copy.
llvm-svn: 68889
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and make it return the assigned register.
llvm-svn: 68888
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llvm-svn: 68887
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hasImplicitDefOfPhysReg methods. Use them to remove a
look in X86 fast isel.
llvm-svn: 68886
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code. Patch by Benjamin Kramer!
llvm-svn: 68885
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from the assembler:
Error: unknown pseudo-op: `.debug_inlined'
llvm-svn: 68863
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collected when nested llvm.dbg.func.start intrinsics are seen. (Right now, inliner removes nested llvm.dbg.func.start intrinisics during inlining.)
Create debug_inlined dwarf section using these information. This info is used by gdb, at least on Darwin, to enable better experience debugging inlined functions. See DwarfWriter.cpp for more information on structure of debug_inlined section.
llvm-svn: 68847
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redundant labels is referenced by debug info somewhere else. This patch provies a way so that dwarf writer can mark labels as used.
llvm-svn: 68813
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No functional changes.
llvm-svn: 68808
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1. Sinking would crash when the first instruction of a block was
sunk due to iterator problems.
2. Instructions could be sunk to their current block, causing an
infinite loop.
This fixes PR3968
llvm-svn: 68787
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llvm-svn: 68786
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llvm-svn: 68783
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With this we generate
movl %gs:0, %eax
leal i@NTPOFF(%eax), %eax
instead of
movl $i@NTPOFF, %eax
addl %gs:0, %eax
llvm-svn: 68778
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llvm::PointerType::get(). Patch by Anders Johnsen!
llvm-svn: 68772
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It turns out that there are still several problems with this, will file a bugzilla.
llvm-svn: 68749
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llvm-svn: 68747
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llvm-svn: 68745
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code that uses it by using SelectionDAG::getVTList instead.
llvm-svn: 68744
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the key. This will cause it to create a new std::string, which isn't
wanted. Instead, pass back the "const char*". Modify the EmitString() method to
take a "const char*".
llvm-svn: 68741
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llvm-svn: 68735
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isRegTiedToDefOperand. Thanks to Bob for pointing this out!
llvm-svn: 68734
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llvm-svn: 68730
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gives a micro speedup in the Dwarf writer.
llvm-svn: 68728
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llvm-svn: 68727
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register destinations that are tied to source operands. The
TargetInstrDescr::findTiedToSrcOperand method silently fails for inline
assembly. The existing MachineInstr::isRegReDefinedByTwoAddr was very
close to doing what is needed, so this revision makes a few changes to
that method and also renames it to isRegTiedToUseOperand (for consistency
with the very similar isRegTiedToDefOperand and because it handles both
two-address instructions and inline assembly with tied registers).
llvm-svn: 68714
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different results for different type of insns. This will eventually need to be changed but currently let us prevent the crash in cases of incorrect detection of banksel operand.
llvm-svn: 68713
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