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* Right now, Debugging information to encode scopes (DW_TAG_lexical_block) ↵Devang Patel2009-04-133-21/+24
| | | | | | | | relies on DBG_LABEL. Unfortunately this intefers with the quality of optimized code. This patch updates dwarf writer to encode scoping information in DWARF only in FastISel mode. llvm-svn: 68973
* Reapply 68847.Devang Patel2009-04-135-6/+168
| | | | | | Now debug_inlined section is covered by TAI->doesDwarfUsesInlineInfoSection(), which is false by default. llvm-svn: 68964
* Implement x86 h-register extract support.Dan Gohman2009-04-137-98/+359
| | | | | | | | | | | | | | | | | | | | | | | | - Add patterns for h-register extract, which avoids a shift and mask, and in some cases a temporary register. - Add address-mode matching for turning (X>>(8-n))&(255<<n), where n is a valid address-mode scale value, into an h-register extract and a scaled-offset address. - Replace X86's MOV32to32_ and related instructions with the new target-independent COPY_TO_SUBREG instruction. On x86-64 there are complicated constraints on h registers, and CodeGen doesn't currently provide a high-level way to express all of them, so they are handled with a bunch of special code. This code currently only supports extracts where the result is used by a zero-extend or a store, though these are fairly common. These transformations are not always beneficial; since there are only 4 h registers, they sometimes require extra move instructions, and this sometimes increases register pressure because it can force out values that would otherwise be in one of those registers. However, this appears to be relatively uncommon. llvm-svn: 68962
* Add a new TargetInstrInfo MachineInstr opcode, COPY_TO_SUBCLASS.Dan Gohman2009-04-132-75/+170
| | | | | | | | | | | | | | | | This will be used to replace things like X86's MOV32to32_. Enhance ScheduleDAGSDNodesEmit to be more flexible and robust in the presense of subregister superclasses and subclasses. It can now cope with the definition of a virtual register being in a subclass of a use. Re-introduce the code for recording register superreg classes and subreg classes. This is needed because when subreg extracts and inserts get coalesced away, the virtual registers are left in the correct subclass. llvm-svn: 68961
* Remove x86's special-case handling for ISD::TRUNCATE andDan Gohman2009-04-131-85/+0
| | | | | | | | ISD::SIGN_EXTEND_INREG. Tablegen-generated code can handle these cases, and the scheduling issues observed earlier appear to be resolved now. llvm-svn: 68959
* Fix copy+pastos in comments.Dan Gohman2009-04-131-2/+2
| | | | llvm-svn: 68958
* Don't abort on an aliasing physical register that does not haveDan Gohman2009-04-131-1/+1
| | | | | | a live interval. This is needed for some upcoming subreg changes. llvm-svn: 68956
* When assigning a physical register to a MachineOperand, setDan Gohman2009-04-131-1/+10
| | | | | | | | | the subreg field to 0, since the subreg field is only used for virtual register subregs. This doesn't change current functionality; it just eliminates bogus noise from debug output. llvm-svn: 68955
* List the l registers before h registers, for consistency.Dan Gohman2009-04-131-4/+4
| | | | llvm-svn: 68954
* Add an assertion to verify that a copy was actually emitted.Dan Gohman2009-04-131-1/+2
| | | | llvm-svn: 68953
* Use X86::SUBREG_8BIT instead of hard-coding the equivalent constant.Dan Gohman2009-04-131-3/+3
| | | | llvm-svn: 68951
* Add a comment about MOVSX64rr8.Dan Gohman2009-04-131-0/+4
| | | | llvm-svn: 68950
* Fix another hard-coded constant to use X86AddrNumOperands.Dan Gohman2009-04-131-1/+1
| | | | | | This unbreaks the JIT on x86-64. llvm-svn: 68948
* X86-64 TLS support for local exec and initial exec.Rafael Espindola2009-04-133-10/+23
| | | | llvm-svn: 68947
* While passing arg of types larger than char only one byte at lower end was ↵Sanjiv Gupta2009-04-131-1/+1
| | | | | | getting passed. We couldn't catch this as we did not have tests that were passing an int value larger than 256. llvm-svn: 68946
* Fix warning in .ll parser, detect and reject available_externally on functionNick Lewycky2009-04-131-0/+1
| | | | | | declarations. llvm-svn: 68944
* Add a new "available_externally" linkage type. This is intendedChris Lattner2009-04-1311-7/+30
| | | | | | | | to support C99 inline, GNU extern inline, etc. Related bugzilla's include PR3517, PR3100, & PR2933. Nothing uses this yet, but it appears to work. llvm-svn: 68940
* eliminate unneeded parens.Chris Lattner2009-04-131-2/+2
| | | | llvm-svn: 68939
* Link against libffi if available, fall back to "no external calls fromNick Lewycky2009-04-131-8/+8
| | | | | | interpreter mode" when it's not. llvm-svn: 68937
* fix PR3965:SIGINT handler not restored after calling ParseAST(),Chris Lattner2009-04-121-1/+2
| | | | | | patch by Alexei Svitkine! llvm-svn: 68929
* In X86DAGToDAGISel::MatchWrapper, if base or index are set, avoid matchingRafael Espindola2009-04-121-3/+8
| | | | | | only if symbolic addresses are RIP relatives. llvm-svn: 68924
* refactor some code into X86DAGToDAGISel::MatchWrapperRafael Espindola2009-04-121-44/+51
| | | | llvm-svn: 68915
* "There was a typo in my previous patch which leads to miscompilation ofChris Lattner2009-04-121-1/+1
| | | | | | | | | | | | | | strncat :( strncat(foo, "bar", 99) would be optimized to memcpy(foo+strlen(foo), "bar", 100, 1) instead of memcpy(foo+strlen(foo), "bar", 4, 1)" Patch by Benjamin Kramer! llvm-svn: 68905
* fix a cross-block fastisel crash handling overflow intrinsics.Chris Lattner2009-04-121-5/+16
| | | | | | See comment for details. This fixes rdar://6772169 llvm-svn: 68890
* make UpdateValueMap handle the possiblity that we could beChris Lattner2009-04-121-1/+1
| | | | | | copying into the right register, avoiding a copy. llvm-svn: 68889
* optimize FastISel::UpdateValueMap to avoid duplicate map lookups,Chris Lattner2009-04-121-7/+12
| | | | | | and make it return the assigned register. llvm-svn: 68888
* simplify code by using IntrinsicInst.Chris Lattner2009-04-121-69/+54
| | | | llvm-svn: 68887
* Add new TargetInstrDesc::hasImplicitUseOfPhysReg andChris Lattner2009-04-121-15/+3
| | | | | | | hasImplicitDefOfPhysReg methods. Use them to remove a look in X86 fast isel. llvm-svn: 68886
* add some optimizations for strncpy/strncat and factor someChris Lattner2009-04-121-22/+114
| | | | | | code. Patch by Benjamin Kramer! llvm-svn: 68885
* Revert r68847. It breaks the build on non-Darwin targets, with this messageDan Gohman2009-04-115-163/+6
| | | | | | | from the assembler: Error: unknown pseudo-op: `.debug_inlined' llvm-svn: 68863
* Keep track of inlined functions and their locations. This information is ↵Devang Patel2009-04-115-6/+163
| | | | | | | | collected when nested llvm.dbg.func.start intrinsics are seen. (Right now, inliner removes nested llvm.dbg.func.start intrinisics during inlining.) Create debug_inlined dwarf section using these information. This info is used by gdb, at least on Darwin, to enable better experience debugging inlined functions. See DwarfWriter.cpp for more information on structure of debug_inlined section. llvm-svn: 68847
* DebugLabelFolder ruthlessly deletes redundant labels. However, sometimes the ↵Devang Patel2009-04-101-1/+1
| | | | | | redundant labels is referenced by debug info somewhere else. This patch provies a way so that dwarf writer can mark labels as used. llvm-svn: 68813
* Clean up a bunch of whitespace issues and fix a comment typo.Bob Wilson2009-04-101-72/+74
| | | | | | No functional changes. llvm-svn: 68808
* fix two problems with machine sinking:Chris Lattner2009-04-101-12/+26
| | | | | | | | | | | 1. Sinking would crash when the first instruction of a block was sunk due to iterator problems. 2. Instructions could be sunk to their current block, causing an infinite loop. This fixes PR3968 llvm-svn: 68787
* Now that register classes have names, include the name in debug output.Dan Gohman2009-04-101-2/+4
| | | | llvm-svn: 68786
* Added code to handle spilling and reloading of FSRs.Sanjiv Gupta2009-04-104-14/+61
| | | | llvm-svn: 68783
* Don't fold a load if the other operand is a TLS address.Rafael Espindola2009-04-101-6/+27
| | | | | | | | | | | | | | With this we generate movl %gs:0, %eax leal i@NTPOFF(%eax), %eax instead of movl $i@NTPOFF, %eax addl %gs:0, %eax llvm-svn: 68778
* Add a new Type::getPointerTo method, which is shorthand forChris Lattner2009-04-101-0/+4
| | | | | | llvm::PointerType::get(). Patch by Anders Johnsen! llvm-svn: 68772
* a few fixes to "addrspace(256) is reference offset of GS segment register".Chris Lattner2009-04-101-17/+60
| | | | | | It turns out that there are still several problems with this, will file a bugzilla. llvm-svn: 68749
* Pass in the std::string parameter instead of returning it by value.Bill Wendling2009-04-103-26/+30
| | | | llvm-svn: 68747
* Constify getter methods.Bill Wendling2009-04-102-2/+3
| | | | llvm-svn: 68745
* Remove the obsolete SelectionDAG::getNodeValueTypes and simplifyDan Gohman2009-04-096-67/+50
| | | | | | code that uses it by using SelectionDAG::getVTList instead. llvm-svn: 68744
* StringMap<DIE*>::iterator::first() returns a pointer to the first character ofBill Wendling2009-04-092-4/+8
| | | | | | | | the key. This will cause it to create a new std::string, which isn't wanted. Instead, pass back the "const char*". Modify the EmitString() method to take a "const char*". llvm-svn: 68741
* Silence unused variable warning.Devang Patel2009-04-091-1/+1
| | | | llvm-svn: 68735
* ignore register zero in isRegTiedToUseOperand, following the example ofChris Lattner2009-04-091-1/+1
| | | | | | isRegTiedToDefOperand. Thanks to Bob for pointing this out! llvm-svn: 68734
* Give register alias checking the hash table treatment too.Owen Anderson2009-04-091-1/+3
| | | | llvm-svn: 68730
* Use a StringMap instead of std::map for storing std::string->DIE* maps. ThisBill Wendling2009-04-091-10/+10
| | | | | | gives a micro speedup in the Dwarf writer. llvm-svn: 68728
* llvm.dbg.func_start also defines beginning of function scope.Devang Patel2009-04-091-7/+3
| | | | llvm-svn: 68727
* Fix pr3954. The register scavenger asserts for inline assembly withBob Wilson2009-04-099-35/+28
| | | | | | | | | | | | register destinations that are tied to source operands. The TargetInstrDescr::findTiedToSrcOperand method silently fails for inline assembly. The existing MachineInstr::isRegReDefinedByTwoAddr was very close to doing what is needed, so this revision makes a few changes to that method and also renames it to isRegTiedToUseOperand (for consistency with the very similar isRegTiedToDefOperand and because it handles both two-address instructions and inline assembly with tied registers). llvm-svn: 68714
* The way we are trying to figure out banksel immediate operand may yield ↵Sanjiv Gupta2009-04-091-2/+3
| | | | | | different results for different type of insns. This will eventually need to be changed but currently let us prevent the crash in cases of incorrect detection of banksel operand. llvm-svn: 68713
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