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path: root/llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
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* [InstCombine] Canonicalize select immediatesDavid Green2019-12-191-2/+30
* Revert "[InstCombine][AMDGPU] Trim more components of *buffer_load"Piotr Sobczak2019-12-181-60/+17
* [InstCombine][AMDGPU] Trim more components of *buffer_loadPiotr Sobczak2019-12-171-17/+60
* [IR] Split out target specific intrinsic enums into separate headersReid Kleckner2019-12-111-0/+2
* [InstCombine] remove identity shuffle simplification for mask with undefsSanjay Patel2019-11-241-0/+24
* [InstCombine] add assert in SimplifyDemandedVectorElts and improve readabilit...Sanjay Patel2019-11-211-19/+22
* [InstCombine] Allow values with multiple users in SimplifyDemandedVectorEltsPiotr Sobczak2019-10-211-15/+23
* [InstCombine][AMDGPU] Fix crash with v3i16/v3f16 buffer intrinsicsPiotr Sobczak2019-10-161-0/+7
* [InstCombine][AMDGPU] Simplify tbuffer loadsPiotr Sobczak2019-08-301-0/+3
* [IntrinsicEmitter] Extend argument overloading with forward references.Sander de Smalen2019-06-131-4/+3
* [InstCombine] Limit a vector demanded elts rule which was producing invalid IR.Philip Reames2019-04-301-0/+12
* [InstCombine] Fix a nasty miscompile introduced w/masked.gather demanded eltsPhilip Reames2019-04-121-1/+5
* InstCombineSimplifyDemanded: Allow v3 results for AMDGCN buffer and image int...Tim Renouf2019-03-221-2/+1
* Demanded elements support for masked.load and masked.gatherPhilip Reames2019-03-191-0/+20
* [SimplifyDemandedVec] Strengthen handling all undef lanes (particularly GEPs)Philip Reames2019-03-151-3/+17
* AMDGPU: Remove intrinsic operand assertMatt Arsenault2019-03-141-5/+1
* IR: Add immarg attributeMatt Arsenault2019-03-121-10/+4
* Add support for computing "zext of value" in KnownBits. NFCIBjorn Pettersson2019-02-281-4/+3
* [InstCombine] Cleanup the TFE/LWE check in AMDGPU SimplifyDemandedNicolai Haehnle2019-02-041-16/+13
* [InstCombine] Extra null-checking on TFE/LWE supportMichael Liao2019-02-011-4/+3
* Demanded elements support for vector GEPsPhilip Reames2019-01-281-0/+12
* Update the file headers across all of the LLVM projects in the monorepoChandler Carruth2019-01-191-4/+3
* [AMDGPU] Add support for TFE/LWE in image intrinsics. 2nd tryDavid Stuttard2019-01-141-2/+16
* [InstCombine][AMDGPU] Handle more buffer intrinsicsPiotr Sobczak2018-12-201-0/+4
* Revert r347871 "Fix: Add support for TFE/LWE in image intrinsic"David Stuttard2018-11-291-16/+2
* Add support for TFE/LWE in image intrinsicsDavid Stuttard2018-11-291-2/+16
* [InstCombine] Determine demanded and known bits for funnel shiftsNikita Popov2018-11-241-0/+24
* [InstCombine] Demand bits of UMinDavid Green2018-10-111-0/+10
* [InstCombine] Demand bits of UMaxDavid Green2018-10-111-4/+16
* [InstCombine] drop poison flags in SimplifyVectorDemandedEltsSanjay Patel2018-10-041-2/+5
* [InstCombine] reduce code duplication in SimplifyDemandedVectorElts; NFCISanjay Patel2018-10-041-91/+42
* [InstCombine] allow SimplifyDemandedVectorElts to work with FP binopsSanjay Patel2018-10-031-18/+20
* [InstCombine] enhance vector demanded elements to look at a vector select con...Sanjay Patel2018-09-111-2/+21
* [InstCombine] use SelectInst operand names to make code clearer; NFCSanjay Patel2018-09-101-8/+10
* [InstCombine] fix formatting in SimplifyDemandedVectorElts->Select; NFCISanjay Patel2018-09-061-12/+16
* [X86] Remove and autoupgrade the scalar fma intrinsics with masking.Craig Topper2018-07-121-37/+0
* [X86] Remove X86 specific scalar FMA intrinsics and upgrade to tart independe...Craig Topper2018-07-051-2/+0
* Use APInt[] bit access to avoid "32-bit shift implicitly converted to 64 bits...Simon Pilgrim2018-06-251-1/+1
* Use APInt[] bit access to avoid "32-bit shift implicitly converted to 64 bits...Simon Pilgrim2018-06-251-1/+1
* AMDGPU: Remove old-style image intrinsicsNicolai Haehnle2018-06-211-51/+1
* InstCombine/AMDGPU: Add dimension-aware image intrinsics to SimplifyDemandedNicolai Haehnle2018-06-211-71/+122
* [X86] Lowering sqrt intrinsics to native IRTomasz Krupa2018-06-151-2/+0
* [X86] Remove and autoupgrade a bunch of FMA instrinsics that are no longer us...Craig Topper2018-05-111-6/+0
* [InstCombine] Only propagate known leading zeros from udiv input to output.Benjamin Kramer2018-05-101-2/+7
* [InstCombine] Teach SimplifyDemandedBits that udiv doesn't demand low dividen...Benjamin Kramer2018-05-091-0/+16
* [X86] Remove the pmuldq/pmuldq intrinsics and replace with native IR.Craig Topper2018-04-131-29/+0
* Remove useless comment - seems to be a copy+paste typo. NFCISimon Pilgrim2018-02-161-1/+0
* [InstCombine] fix demanded-bits propagation for zext/truncSanjay Patel2018-01-171-1/+1
* [InstCombine] Fix SimplifyDemandedUseBits SHL handling (PR35515)Simon Pilgrim2017-12-091-6/+5
* [InstCombine] improve demanded vector elements analysis of insertelementSanjay Patel2017-08-311-9/+10
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