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* Simplify custom emitter code for pcmp(e/i)str(i/m) and make the helper ↵Craig Topper2012-11-102-96/+42
| | | | | | functions static. llvm-svn: 167669
* Add more functions to the target library information.Meador Inge2012-11-101-0/+18
| | | | | | | | | | | In the process of migrating optimizations from the simplify-libcalls pass to the instcombine pass I noticed that a few functions are missing from the target library information. These functions need to be available for querying in the instcombine library call simplifiers. More functions will probably be added in the future as more simplifiers are migrated to instcombine. llvm-svn: 167659
* Disable the Thumb no-return call optimization:Evan Cheng2012-11-103-47/+2
| | | | | | | | | | | | mov lr, pc b.w _foo The "mov" instruction doesn't set bit zero to one, it's putting incorrect value in lr. It messes up backtraces. rdar://12663632 llvm-svn: 167657
* Cleanup pcmp(e/i)str(m/i) instruction definitions and load folding support.Craig Topper2012-11-104-161/+192
| | | | llvm-svn: 167652
* [NVPTX] Use ABI alignment for parameters when alignment is not specified.Justin Holewinski2012-11-091-0/+3
| | | | | | Affects SM 2.0+. Fixes bug 13324. llvm-svn: 167646
* Add ARM TARGET2 relocation. The testcase will follow with actualy use-case.Anton Korobeynikov2012-11-091-0/+3
| | | | | | Based on the patch by Logan Chien! llvm-svn: 167633
* Switch FreeBSD/i386 back to 4byte stack alignment. This partiallyRoman Divacky2012-11-091-3/+3
| | | | | | reverts r126226. llvm-svn: 167632
* Revert r167620; this can be implemented using an existing CL option.Chad Rosier2012-11-092-10/+5
| | | | llvm-svn: 167622
* Add support for -mstrict-align compiler option for ARM targets.Chad Rosier2012-11-092-5/+10
| | | | | | rdar://12340498 llvm-svn: 167620
* indentNadav Rotem2012-11-091-2/+2
| | | | llvm-svn: 167607
* Recommit modified r167540.Amara Emerson2012-11-081-4/+19
| | | | | | | Improve ARM build attribute emission for architectures types. This also changes the default architecture emitted for a generic CPU to "v7". llvm-svn: 167574
* Add support of RTM from TSX extensionMichael Liao2012-11-0811-46/+159
| | | | | | | | - Add RTM code generation support throught 3 X86 intrinsics: xbegin()/xend() to start/end a transaction region, and xabort() to abort a tranaction region llvm-svn: 167573
* [mips] Custom-lower ISD::FRAME_TO_ARGS_OFFSET node.Akira Hatanaka2012-11-072-0/+27
| | | | | | Patch by Sasa Stankovic. llvm-svn: 167548
* Delete MipsFunctionInfo::NextStackOffset. No functionality change intended. Akira Hatanaka2012-11-072-10/+6
| | | | llvm-svn: 167546
* Revert r167540 until regression tests are updated.Amara Emerson2012-11-071-21/+4
| | | | llvm-svn: 167545
* Improve ARM build attribute emission for architectures types.Amara Emerson2012-11-071-4/+21
| | | | | | This also changes the default architecture emitted for a generic CPU to "v7". llvm-svn: 167540
* [arm fast-isel] Appease the machine verifier by using the proper registerChad Rosier2012-11-071-1/+4
| | | | | | | classes. For my test case the number of errors drop from 356 to 21. Part of rdar://12594152 llvm-svn: 167508
* Simplify code. No functionality change.Jakub Staszak2012-11-061-1/+1
| | | | llvm-svn: 167505
* Make the helper functions static. No functional change.Nadav Rotem2012-11-061-3/+5
| | | | llvm-svn: 167501
* Mark the Int_eh_sjlj_dispatchsetup pseudo instruction as clobbering allChad Rosier2012-11-067-28/+23
| | | | | | | | | | | | registers. Previously, the register we being marked as implicitly defined, but not killed. In some cases this would cause the register scavenger to spill a dead register. Also, use an empty register mask to simplify the logic and to reduce the memory footprint. rdar://12592448 llvm-svn: 167499
* CostModel: add another known vector trunc optimization.Nadav Rotem2012-11-061-0/+1
| | | | llvm-svn: 167488
* Cost Model: add tables for some avx type-conversion hacks.Nadav Rotem2012-11-062-2/+61
| | | | llvm-svn: 167480
* Remove tailing whitespacesMichael Liao2012-11-061-4/+4
| | | | llvm-svn: 167445
* ScheduleDAG interface. Added OrderKind to distinguish nonregister dependencies.Andrew Trick2012-11-061-2/+1
| | | | | | | This is in preparation for adding "weak" DAG edges, but generally simplifies the design. llvm-svn: 167435
* Refactor the getTypeLegalizationCost interface. No functionality change.Nadav Rotem2012-11-052-24/+17
| | | | llvm-svn: 167422
* CostModel: Add tables for the common x86 compares.Nadav Rotem2012-11-052-8/+83
| | | | llvm-svn: 167421
* Code Model: Improve the accuracy of the zext/sext/trunc vector cost estimation.Nadav Rotem2012-11-051-3/+10
| | | | llvm-svn: 167412
* Suppress signed/unsigned comparison warning.Richard Smith2012-11-051-2/+2
| | | | llvm-svn: 167410
* Cost Model: Normalize the insert/extract index when splitting typesNadav Rotem2012-11-051-3/+20
| | | | llvm-svn: 167402
* Cost Model: teach the cost model about expanding integers.Nadav Rotem2012-11-051-2/+3
| | | | llvm-svn: 167401
* On PowerPC64, integer return values (as well as arguments) are supposedUlrich Weigand2012-11-052-7/+50
| | | | | | | | | | | | | | | | | | | | | | | | | to be extended to a full register. This is modeled in the IR by marking the return value (or argument) with a signext or zeroext attribute. However, while these attributes are respected for function arguments, they are currently ignored for function return values by the PowerPC back-end. This patch updates PPCCallingConv.td to ask for the promotion to i64, and fixes LowerReturn and LowerCallResult to implement it. The new test case verifies that both arguments and return values are properly extended when passing them; and also that the optimizers understand incoming argument and return values are in fact guaranteed by the ABI to be extended. The patch caused a spurious breakage in CodeGen/PowerPC/coalesce-ext.ll, since the test case used a "ret" instruction to create a use of an i32 value at the end of the function (to set up data flow as required for what the test is intended to test). Since there's now an implicit promotion to i64, that data flow no longer works as expected. To fix this, this patch now adds an extra "add" to ensure we have an appropriate use of the i32 value. llvm-svn: 167396
* Implement the cost of abnormal x86 instruction lowering as a table.Nadav Rotem2012-11-052-58/+46
| | | | llvm-svn: 167395
* Add support for the PowerPC-specific inline asm Z constraint and y modifier.Hal Finkel2012-11-052-2/+27
| | | | | | | | | | The Z constraint specifies an r+r memory address, and the y modifier expands to the "r, r" in the asm string. For this initial implementation, the base register is forced to r0 (which has the special meaning of 0 for r+r addressing on PowerPC) and the full address is taken in the second register. In the future, this should be improved. llvm-svn: 167388
* [PATCH] PowerPC: Expand load extend vector operationsAdhemerval Zanella2012-11-051-0/+10
| | | | | | | This patch expands the SEXTLOAD, ZEXTLOAD, and EXTLOAD operations for vector types when altivec is enabled. llvm-svn: 167386
* Remove alignments from folding tables for scalar FMA4 instructions.Craig Topper2012-11-041-16/+16
| | | | llvm-svn: 167366
* [mips] Set flag neverHasSideEffects flag on floating point conversionAkira Hatanaka2012-11-032-6/+11
| | | | | | instructions. llvm-svn: 167348
* X86 CostModel: Add support for a some of the common arithmetic instructions ↵Nadav Rotem2012-11-032-6/+73
| | | | | | for SSE4, AVX and AVX2. llvm-svn: 167347
* [mips] Set flag isAsCheapAsAMove flag on instruction LUi.Akira Hatanaka2012-11-031-1/+1
| | | | llvm-svn: 167345
* [mips] Stop reserving register AT and use register scavenger when a scratchAkira Hatanaka2012-11-035-13/+47
| | | | | | register is needed. llvm-svn: 167341
* [mips] Do not reserve all 64-bit registers, but only the ones which need to beAkira Hatanaka2012-11-021-8/+4
| | | | | | | reserved. Without this fix, RegScavenger::getRegsAvailable incorrectly returns an empty set of integer registers. llvm-svn: 167335
* Add a stub for the x86 cost model impl. Implement a basic cost rule for ↵Nadav Rotem2012-11-022-2/+18
| | | | | | inserting/extracting from XMM registers. llvm-svn: 167333
* Scalar Bitcasts and Truncs are usually freeNadav Rotem2012-11-021-0/+5
| | | | llvm-svn: 167323
* Vext Lowering was missing opportunitiesQuentin Colombet2012-11-021-4/+40
| | | | llvm-svn: 167318
* [mips] Use register number instead of name to print register $AT.Akira Hatanaka2012-11-021-2/+2
| | | | llvm-svn: 167315
* [mips] Add function MipsFrameLowering::estimateStackSize.Akira Hatanaka2012-11-022-0/+37
| | | | | | | This function estimates stack size and will be called before PrologEpilogInserter scans the callee-saved registers. llvm-svn: 167313
* [mips] Add member field MipsFunctionInfo::IncomingArgSize which holds the sizeAkira Hatanaka2012-11-022-0/+7
| | | | | | of the incoming argument area. llvm-svn: 167312
* [mips] Delete MipsFunctionInfo::EmitNOAT. Unconditionally print directiveAkira Hatanaka2012-11-025-16/+3
| | | | | | | "set .noat" so that the assembler doesn't issue warnings when register $AT is used. llvm-svn: 167310
* Use the relationship models infrastructure to add two relations - getPredOpcodePranav Bhandarkar2012-11-013-211/+139
| | | | | | | | | | and getPredNewOpcode. The first relates non predicated instructions with their predicated forms and the second relates predicated instructions with their predicate-new forms. Patch by Jyotsna Verma! llvm-svn: 167243
* Revert the majority of the next patch in the address space series:Chandler Carruth2012-11-016-13/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | r165941: Resubmit the changes to llvm core to update the functions to support different pointer sizes on a per address space basis. Despite this commit log, this change primarily changed stuff outside of VMCore, and those changes do not carry any tests for correctness (or even plausibility), and we have consistently found questionable or flat out incorrect cases in these changes. Most of them are probably correct, but we need to devise a system that makes it more clear when we have handled the address space concerns correctly, and ideally each pass that gets updated would receive an accompanying test case that exercises that pass specificaly w.r.t. alternate address spaces. However, from this commit, I have retained the new C API entry points. Those were an orthogonal change that probably should have been split apart, but they seem entirely good. In several places the changes were very obvious cleanups with no actual multiple address space code added; these I have not reverted when I spotted them. In a few other places there were merge conflicts due to a cleaner solution being implemented later, often not using address spaces at all. In those cases, I've preserved the new code which isn't address space dependent. This is part of my ongoing effort to clean out the partial address space code which carries high risk and low test coverage, and not likely to be finished before the 3.2 release looms closer. Duncan and I would both like to see the above issues addressed before we return to these changes. llvm-svn: 167222
* Revert the series of commits starting with r166578 which introduced theChandler Carruth2012-11-017-21/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | getIntPtrType support for multiple address spaces via a pointer type, and also introduced a crasher bug in the constant folder reported in PR14233. These commits also contained several problems that should really be addressed before they are re-committed. I have avoided reverting various cleanups to the DataLayout APIs that are reasonable to have moving forward in order to reduce the amount of churn, and minimize the number of commits that were reverted. I've also manually updated merge conflicts and manually arranged for the getIntPtrType function to stay in DataLayout and to be defined in a plausible way after this revert. Thanks to Duncan for working through this exact strategy with me, and Nick Lewycky for tracking down the really annoying crasher this triggered. (Test case to follow in its own commit.) After discussing with Duncan extensively, and based on a note from Micah, I'm going to continue to back out some more of the more problematic patches in this series in order to ensure we go into the LLVM 3.2 branch with a reasonable story here. I'll send a note to llvmdev explaining what's going on and why. Summary of reverted revisions: r166634: Fix a compiler warning with an unused variable. r166607: Add some cleanup to the DataLayout changes requested by Chandler. r166596: Revert "Back out r166591, not sure why this made it through since I cancelled the command. Bleh, sorry about this! r166591: Delete a directory that wasn't supposed to be checked in yet. r166578: Add in support for getIntPtrType to get the pointer type based on the address space. llvm-svn: 167221
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