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* [ARM] Replace ARMISD::RBIT with ISD::BITREVERSEJames Molloy2015-11-134-10/+7
| | | | | | ISD::BITREVERSE matches "rbit" completely, so remove ARMISD::RBIT and mark ISD::BITREVERSE as legal, adding a test for lowering. llvm-svn: 253047
* [mips][microMIPS] Implement SHRA[_R].PH, SHRAV[_R].PH, SHRAV[_R].QB, ↵Zlatko Buljan2015-11-133-25/+105
| | | | | | | | SHRAV_R.W, SHRA_R.W, SHRL.PH, SHRL.QB, SHRLV.PH and SHRLV.QB instructions Differential Revision: http://reviews.llvm.org/D14010 llvm-svn: 253041
* [SystemZ] Simplify boolean conditional return statementsUlrich Weigand2015-11-132-12/+4
| | | | | | | | | Use clang-tidy to simplify conditonal return statements. Author: LegalizeAdulthood Differential Revision: http://reviews.llvm.org/D9986 llvm-svn: 253038
* [Hexagon] Fixing leak in padEndloop by allocating in MCContext.Colin LeMahieu2015-11-134-6/+6
| | | | llvm-svn: 253019
* [WebAssembly] Inline asm support.Dan Gohman2015-11-134-0/+80
| | | | llvm-svn: 252997
* [Hexagon] Adding relaxation functionality to backend and test.Colin LeMahieu2015-11-131-3/+31
| | | | llvm-svn: 252989
* [WebAssembly] Un-mangle the conversion instruction names.Dan Gohman2015-11-131-75/+75
| | | | | | | | This arranges the types in the LLVM instruction names in the same order that they appear in the WebAssembly opcode names, and eliminates double-underscores. llvm-svn: 252988
* [WebAssembly] Rename BR_IF_ to BR_IFDan Gohman2015-11-133-6/+6
| | | | | | | With MC-based instruction printing, we no longer need instruction names to mangle in hints about how they should be printed. llvm-svn: 252987
* [WebAssembly] Remove unneeded TODO items. NFC.Dan Gohman2015-11-132-19/+0
| | | | llvm-svn: 252985
* [WebAssembly] Tidy up and update a TODO item. NFC.Dan Gohman2015-11-131-14/+9
| | | | llvm-svn: 252984
* [WinEH] Find root frame correctly in CLR funcletsJoseph Tremoulet2015-11-133-18/+118
| | | | | | | | | | | | | | | | | | | | | | | | | | Summary: The value that the CoreCLR personality passes to a funclet for the establisher frame may be the root function's frame or may be the parent funclet's (mostly empty) frame in the case of nested funclets. Each funclet stores a pointer to the root frame in its own (mostly empty) frame, as does the root function itself. All frames allocate this slot at the same offset, measured from the post-prolog stack pointer, so that the same sequence can accept any ancestor as an establisher frame parameter value, and so that a single offset can be reported to the GC, which also looks at this slot. This change allocate the slot when processing function entry, and records its frame index on the WinEHFuncInfo object, then inserts the code to set/copy it during prolog emission. Reviewers: majnemer, AndyAyers, pgavlin, rnk Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D14614 llvm-svn: 252983
* [WebAssembly] Introduce a new pseudo-operand for unused expression results.Dan Gohman2015-11-135-12/+31
| | | | llvm-svn: 252975
* X86-FMA3: Implemented commute transformations FMA*_Int instructions.Vyacheslav Klochkov2015-11-132-124/+212
| | | | | | | | | | It made it possible to apply the memory folding optimization for the 2nd operand of FMA*_Int instructions. Reviewer: Quentin Colombet Differential Revision: http://reviews.llvm.org/D14550 llvm-svn: 252973
* Revert "Remove unnecessary call to getAllocatableRegClass"Tom Stellard2015-11-123-6/+16
| | | | | | | | | | | | | This reverts commit r252565. This also includes the revert of the commit mentioned below in order to avoid breaking tests in AMDGPU: Revert "AMDGPU: Set isAllocatable = 0 on VS_32/VS_64" This reverts commit r252674. llvm-svn: 252956
* My first/test commit. Removed a trailing whitespace.Vyacheslav Klochkov2015-11-121-1/+1
| | | | llvm-svn: 252940
* [Hexagon] Allocate MCInst in the MCContext to avoid leaking it.Benjamin Kramer2015-11-123-8/+11
| | | | | | Found by leaksanitizer. llvm-svn: 252931
* Roll an expression into an assert to fix -Wunused-variable in a -Asserts buildDavid Blaikie2015-11-121-2/+1
| | | | llvm-svn: 252925
* [WebAssembly] Reapply r252858, with svn add for the new file.Dan Gohman2015-11-1210-173/+219
| | | | | | | | | | | | | | | | | | | | | | Switch to MC for instruction printing. This encompasses several changes which are all interconnected: - Use the MC framework for printing almost all instructions. - AsmStrings are now live. - This introduces an indirection between LLVM vregs and WebAssembly registers, and a new pass, WebAssemblyRegNumbering, for computing a basic the mapping. This addresses some basic issues with argument registers and unused registers. - The way ARGUMENT instructions are handled no longer generates redundant get_local+set_local for every argument. This also changes the assembly syntax somewhat; most notably, MC's printing does not use sigils on label names, so those are no longer present, and push/pop now have a sigil to keep them unambiguous. The usage of set_local/get_local/$push/$pop will continue to evolve significantly. This patch is just one step of a larger change. llvm-svn: 252910
* [x86] translating "fp" (floating point) instructions from ↵Michael Zuckerman2015-11-122-0/+16
| | | | | | | | | | | {fadd,fdiv,fmul,fsub,fsubr,fdivr} to {faddp,fdivp,fmulp,fsubp,fsubrp,fdivrp} LLVM Missing the following instructions: fadd\fdiv\fmul\fsub\fsubr\fdivr. GAS and MS supporting this instruction and lowering them in to a faddp\fdivp\fmulp\fsubp\fsubrp\fdivrp instructions. Differential Revision: http://reviews.llvm.org/D14217 llvm-svn: 252908
* Cull non-standard variants of ARM architectures (NFC)Artyom Skrobov2015-11-122-14/+5
| | | | | | | | | | | | | | | Summary: This patch changes ARMV5, ARMV5E, ARMV6SM, ARMV6HL, ARMV7, ARMV7L, ARMV7HL, ARMV7EM to be treated as aliases for the corresponding standard architectures, instead of as actual architectures. Reviewers: rengolin Subscribers: aemerson, llvm-commits, rengolin Differential Revision: http://reviews.llvm.org/D14577 llvm-svn: 252903
* Revert r252858: "[WebAssembly] Switch to MC for instruction printing."Hans Wennborg2015-11-129-121/+173
| | | | | | | | It broke the CMake build: "Cannot find source file: WebAssemblyRegNumbering.cpp" llvm-svn: 252897
* Re-apply "[mips] Use correct frame register for DWARF info when dynamically ↵Vasileios Kalintiris2015-11-122-0/+18
| | | | | | | | | realigning the stack."" r252219 reversed the direction of subprogram -> function edge. Fixed the IR to account for this. llvm-svn: 252895
* [ARM] CMOV->BFI combining: handle both senses of CMPZJames Molloy2015-11-121-0/+10
| | | | | | | | I completely misunderstood what ARMISD::CMPZ means. It's not "compare equal to zero", it's "compare, only setting the zero/Z flag". It can either be equal-to-zero or not-equal-to-zero, and we weren't checking what sense it was. If it's equal-to-zero, we can swap the operands around and pretend like it is not-equal-to-zero, which is both a bug fix and lets us handle more cases. llvm-svn: 252891
* Revert "[ARM] Enable shrink-wrapping by default."Renato Golin2015-11-121-5/+0
| | | | | | This reverts commit r252825, as it broke ASAN on ARM. Investigating... llvm-svn: 252889
* Implement .reloc (constant offset only) with support for R_MIPS_NONE and ↵Daniel Sanders2015-11-124-1/+21
| | | | | | | | | | | | | | | | R_MIPS_32. Summary: Support for R_MIPS_NONE allows us to parse MIPS16's usage of .reloc. R_MIPS_32 was included to be able to better test the directive. Targets can add their relocations by overriding MCAsmBackend::getFixupKind(). Subscribers: grosbach, rafael, majnemer, dsanders, llvm-commits Differential Revision: http://reviews.llvm.org/D13659 llvm-svn: 252888
* [mips][microMIPS] Implement LWM16, SB16, SH16, SW16, SWSP and SWM16 instructionsZlatko Buljan2015-11-128-17/+154
| | | | | | Differential Revision: http://reviews.llvm.org/D11406 llvm-svn: 252885
* Revert "[mips] Use correct frame register for DWARF info when dynamically ↵Vasileios Kalintiris2015-11-122-18/+0
| | | | | | | | | realigning the stack." This reverts commit r252882. LLParser complains for invalid field 'function' in DISubprogram. llvm-svn: 252884
* [mips] Use correct frame register for DWARF info when dynamically realigning ↵Vasileios Kalintiris2015-11-122-0/+18
| | | | | | | | | | | | | | | | | | | the stack. Summary: This patch overrides TargetFrameLowering::getFrameIndexReference() in order to specify the correct register when the function needs dynamic stack realignment. The values returned from this function are used in order to create DW_AT_locations for DWARF info. These locations would use the wrong registers as it's been reported in PR25028. Reviewers: dsanders Subscribers: dean, llvm-commits Differential Revision: http://reviews.llvm.org/D13511 llvm-svn: 252882
* Add AVR backend skeletonDylan McKay2015-11-129-0/+138
| | | | | | | | | | | | | This adds part of the target info code, and adds modifications to the build scripts so that AVR is recognized a supported, experimental backend. It does not include any AVR-specific code, just the bare sources required for a backend to exist. From D14039. llvm-svn: 252865
* [WebAssembly] Switch to MC for instruction printing.Dan Gohman2015-11-129-173/+121
| | | | | | | | | | | | | | | | | | | | This encompasses several changes which are all interconnected: - Use the MC framework for printing almost all instructions. - AsmStrings are now live. - This introduces an indirection between LLVM vregs and WebAssembly registers, and a new pass, WebAssemblyRegNumbering, for computing a basic the mapping. This addresses some basic issues with argument registers and unused registers. - The way ARGUMENT instructions are handled no longer generates redundant get_local+set_local for every argument. This also changes the assembly syntax somewhat; most notably, MC's printing use sigils on label names, so those are no longer present, and push/pop now have a sigil to keep them unambiguous. The usage of set_local/get_local/$push/$pop will continue to evolve significantly. This patch is just one step of a larger change. llvm-svn: 252858
* [TLS on Darwin] use a different mask for tls calls on x86-64.Manman Ren2015-11-124-0/+16
| | | | | | | | | Calls involved in thread-local variable lookup save more registers than normal calls. rdar://problem/23073171 llvm-svn: 252837
* [ARM] Enable shrink-wrapping by default.Quentin Colombet2015-11-111-0/+5
| | | | | | | | Differential Revision: http://reviews.llvm.org/D14357 rdar://problem/21942589 llvm-svn: 252825
* [WinEH] Only generate UnwindHelp slot for MSVCXXJoseph Tremoulet2015-11-111-12/+12
| | | | | | | | | | | | Summary: Other personalities don't use this special frame slot. Reviewers: majnemer, andrew.w.kaylor, rnk Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D14580 llvm-svn: 252778
* [MIPS] add overrides for isCheapToSpeculateCttz() and isCheapToSpeculateCtlz()Sanjay Patel2015-11-112-0/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | MIPS32 has instructions for efficient count-leading/trailing-zeros, so this should be considered a cheap operation (and therefore fair game for speculation) for any MIPS32 implementation. The net result of allowing this speculation for the regression tests in this patch is that we get this code: ctlz: jr $ra clz $2, $4 cttz: addiu $1, $4, -1 not $2, $4 and $1, $2, $1 clz $1, $1 addiu $2, $zero, 32 jr $ra subu $2, $2, $1 Instead of: ctlz: beqz $4, $BB0_2 addiu $2, $zero, 32 clz $2, $4 $BB0_2: jr $ra nop cttz: beqz $4, $BB1_2 addiu $2, $zero, 32 addiu $1, $4, -1 not $2, $4 and $1, $2, $1 clz $1, $1 addiu $2, $zero, 32 subu $2, $2, $1 $BB1_2: jr $ra nop See D14469 for the larger motivation. Differential Revision: http://reviews.llvm.org/D14500 llvm-svn: 252755
* Properly fix unused variable in disable-assert builds.Diego Novillo2015-11-111-1/+3
| | | | | | | | I missed the side-effects of ParseBFI in my previous attempt (r252748). Thanks dblaikie for the suggestion of adding a void use of the unused variable instead. llvm-svn: 252751
* Remove unused variable in disable-assert builds. NFC.Diego Novillo2015-11-111-2/+1
| | | | llvm-svn: 252748
* Visibly fail if attempting to encode register AH,BH,CH,DH in a REX-prefixed ↵Douglas Katzman2015-11-111-0/+7
| | | | | | | | | instruction. Differential Revision: http://reviews.llvm.org/D13316 Fixes PR25003 llvm-svn: 252743
* [ARM] Combine BFIs togetherJames Molloy2015-11-111-2/+109
| | | | | | If we have a chain of BFIs, we may be able to combine several together into one merged BFI. We can do this if the "from" bits from one BFI OR'd with the "from" bits from the other BFI form a contiguous range, and the same with the "to" bits. llvm-svn: 252740
* Silencing nine warnings for "enumeral and non-enumeral type in conditional ↵Aaron Ballman2015-11-111-10/+18
| | | | | | expression"; NFC. llvm-svn: 252728
* [X86] Replace LEAs with INC/DEC when profitableMichael Kuperstein2015-11-111-8/+79
| | | | | | | | | If possible and profitable, replace lea %reg, 1(%reg) and lea %reg, -1(%reg) with inc %reg and dec %reg respectively. Patch by: anton.nadolsky@intel.com Differential Revision: http://reviews.llvm.org/D14059 llvm-svn: 252722
* [X86] Fix feature flags on some MMX register instructions that really were ↵Craig Topper2015-11-111-2/+13
| | | | | | introduced with SSE or SSE2. llvm-svn: 252709
* [X86] Remove redundant MMX isel patterns.Craig Topper2015-11-111-4/+0
| | | | llvm-svn: 252708
* [WebAssembly] Support non-legal argument and return types.Dan Gohman2015-11-113-79/+127
| | | | llvm-svn: 252687
* [MC] Use LShr for constant evaluation of ">>" on non-arm64 darwin.Ahmed Bougacha2015-11-111-4/+0
| | | | | | | Follow-up to r235963: this matches other assemblers and is less unexpected (e.g. PR23227). llvm-svn: 252681
* AMDGPU: Print more fields in commentsMatt Arsenault2015-11-111-3/+14
| | | | llvm-svn: 252677
* AMDGPU: Remove dead codeMatt Arsenault2015-11-111-33/+2
| | | | llvm-svn: 252675
* AMDGPU: Set isAllocatable = 0 on VS_32/VS_64Matt Arsenault2015-11-113-16/+6
| | | | llvm-svn: 252674
* [WinEH] Insert the MBB for EH_RESTORE after the catchretReid Kleckner2015-11-101-1/+1
| | | | | | | Inserting it before the target block could be bad, we might already have a fallthrough edge to it. llvm-svn: 252670
* [WebAssembly] Remove special cases for things that are no longer special. NFC.Dan Gohman2015-11-101-16/+0
| | | | llvm-svn: 252656
* Add PPCMIPeephole.cpp to CMakeLists.txtBill Schmidt2015-11-101-0/+1
| | | | llvm-svn: 252654
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