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* beautify outputGabor Greif2010-07-021-0/+1
| | | | llvm-svn: 107500
* use ArgOperand APIGabor Greif2010-07-021-2/+2
| | | | llvm-svn: 107498
* Fix incorrect asm-printing of some NEON immediates. Fix weak testcase soBob Wilson2010-07-022-4/+4
| | | | | | | that it checks the immediate values, not just the instructions opcodes. Radar 8110263. llvm-svn: 107487
* use ArgOperand API (found by my previous commit)Gabor Greif2010-07-021-6/+6
| | | | llvm-svn: 107482
* Shrink down SSE3 code by more multiclass refactoringBruno Cardoso Lopes2010-07-011-149/+99
| | | | llvm-svn: 107448
* Shrink down SSE3 code by some multiclass refactoring - 1st partBruno Cardoso Lopes2010-07-011-74/+17
| | | | llvm-svn: 107438
* ARM function alignments were off by a power of two. svn 83242 changedBob Wilson2010-07-011-1/+1
| | | | | | | | | getFunctionAlignment and the corresponding use of that value in the ARM asm printer, but now we're using the standard asm printer. The result of this was that function alignments were dropped completely for Thumb functions. Radar 8143571. llvm-svn: 107435
* Implement the "linker_private_weak" linkage type. This will be used forBill Wendling2010-07-013-2/+3
| | | | | | | | | | | | | | | | | | | | | | | Objective-C metadata types which should be marked as "weak", but which the linker will remove upon final linkage. However, this linkage isn't specific to Objective-C. For example, the "objc_msgSend_fixup_alloc" symbol is defined like this: .globl l_objc_msgSend_fixup_alloc .weak_definition l_objc_msgSend_fixup_alloc .section __DATA, __objc_msgrefs, coalesced .align 3 l_objc_msgSend_fixup_alloc: .quad _objc_msgSend_fixup .quad L_OBJC_METH_VAR_NAME_1 This is different from the "linker_private" linkage type, because it can't have the metadata defined with ".weak_definition". Currently only supported on Darwin platforms. llvm-svn: 107433
* Move SSE3 Move patterns to a more appropriate sectionBruno Cardoso Lopes2010-07-011-30/+55
| | | | | | Add AVX SSE3 packed horizontal and & sub instructions llvm-svn: 107405
* Add AVX SSE3 packed addsub instructionsBruno Cardoso Lopes2010-07-011-23/+34
| | | | llvm-svn: 107404
* Enable on-demand fast-isel.Dan Gohman2010-07-011-1/+1
| | | | llvm-svn: 107377
* Fix X86FastISel's add folding to actually work, and not fall backDan Gohman2010-07-011-4/+8
| | | | | | to SelectionDAG. llvm-svn: 107376
* Add AVX SSE3 replicate and convert instructionsBruno Cardoso Lopes2010-07-011-22/+45
| | | | llvm-svn: 107375
* Teach X86FastISel to fold constant offsets and scaled indices inDan Gohman2010-07-011-14/+23
| | | | | | the same address. llvm-svn: 107373
* - Add AVX SSE2 Move doubleword and quadword instructions.Bruno Cardoso Lopes2010-07-014-17/+139
| | | | | | | | - Add encode bits for VEX_W - All 128-bit SSE 1 & SSE2 instructions that are described in the .td file now have a AVX encoded form already working. llvm-svn: 107365
* Move MOVD/MODQ code around, creating sections for each of themBruno Cardoso Lopes2010-06-301-52/+62
| | | | llvm-svn: 107308
* Add AVX SSE2 mask creation and conditional store instructionsBruno Cardoso Lopes2010-06-301-10/+36
| | | | llvm-svn: 107306
* Fix a bug introduced in r107211 where instructions with memory operands are ↵Bruno Cardoso Lopes2010-06-301-91/+78
| | | | | | declared as commutable llvm-svn: 107300
* Add AVX SSE2 packed integer extract/insert instructionsBruno Cardoso Lopes2010-06-301-17/+42
| | | | llvm-svn: 107293
* use ArgOperand APIGabor Greif2010-06-301-1/+1
| | | | llvm-svn: 107280
* Add AVX SSE2 integer unpack instructionsBruno Cardoso Lopes2010-06-301-10/+57
| | | | llvm-svn: 107246
* Add AVX SSE2 packed integer shuffle instructionsBruno Cardoso Lopes2010-06-301-0/+14
| | | | llvm-svn: 107245
* Small refactoring of SSE2 packed integer shuffle instructionsBruno Cardoso Lopes2010-06-301-45/+26
| | | | llvm-svn: 107243
* Add AVX SSE2 pack with saturation integer instructionsBruno Cardoso Lopes2010-06-301-0/+9
| | | | llvm-svn: 107241
* Add AVX SSE2 integer packed compare instructionsBruno Cardoso Lopes2010-06-301-0/+17
| | | | llvm-svn: 107240
* - Add AVX form of all SSE2 logical instructionsBruno Cardoso Lopes2010-06-302-22/+99
| | | | | | - Add VEX encoding bits to x86 MRM0r-MRM7r llvm-svn: 107238
* Add *several* AVX integer packed binop instructionsBruno Cardoso Lopes2010-06-291-35/+109
| | | | llvm-svn: 107225
* Revert r107205 and r107207.Bill Wendling2010-06-293-8/+0
| | | | llvm-svn: 107215
* Add another bswap idiom that isn't matched.Eric Christopher2010-06-291-0/+8
| | | | llvm-svn: 107213
* Move SSE2 Packed Integer instructions around, and create specific sections ↵Bruno Cardoso Lopes2010-06-291-83/+113
| | | | | | for each of them llvm-svn: 107211
* Add AVX Move Aligned/Unaligned packed integersBruno Cardoso Lopes2010-06-291-12/+53
| | | | llvm-svn: 107206
* Introducing the "linker_weak" linkage type. This will be used for Objective-CBill Wendling2010-06-293-0/+8
| | | | | | | | | | | | | | | | | | | metadata types which should be marked as "weak", but which the linker will remove upon final linkage. For example, the "objc_msgSend_fixup_alloc" symbol is defined like this: .globl l_objc_msgSend_fixup_alloc .weak_definition l_objc_msgSend_fixup_alloc .section __DATA, __objc_msgrefs, coalesced .align 3 l_objc_msgSend_fixup_alloc: .quad _objc_msgSend_fixup .quad L_OBJC_METH_VAR_NAME_1 This is different from the "linker_private" linkage type, because it can't have the metadata defined with ".weak_definition". llvm-svn: 107205
* Add AVX ld/st XCSR register.Bruno Cardoso Lopes2010-06-292-15/+26
| | | | | | Add VEX encoding bits for MRMXm x86 form llvm-svn: 107204
* Add support for encoding VDUP (ARM core register) instructions.Bob Wilson2010-06-291-0/+17
| | | | llvm-svn: 107201
* Add AVX non-temporal storesBruno Cardoso Lopes2010-06-291-10/+52
| | | | llvm-svn: 107178
* Move non-temporal movs to their own sectionBruno Cardoso Lopes2010-06-291-34/+38
| | | | llvm-svn: 107168
* Add support for encoding NEON VMOV (from core register to scalar) instructions.Bob Wilson2010-06-291-6/+19
| | | | | | | The encoding is the same as VMOV (from scalar to core register) except that the operands are in different places. llvm-svn: 107167
* Add sqrt, rsqrt and rcp AVX instructionsBruno Cardoso Lopes2010-06-291-1/+67
| | | | llvm-svn: 107166
* skip dbg_value instructionsJim Grosbach2010-06-291-0/+2
| | | | llvm-svn: 107154
* The t2MOVi16 and t2MOVTi16 instructions do not set CPSR. Trying to addBob Wilson2010-06-291-2/+2
| | | | | | | a CPSR operand to them causes an assertion failure, so apparently these instructions haven't been getting a lot of use. llvm-svn: 107147
* Add a VT argument to getMinimalPhysRegClass and replace the copy related usesRafael Espindola2010-06-292-2/+8
| | | | | | | | | of getPhysicalRegisterRegClass with it. If we want to make a copy (or estimate its cost), it is better to use the smallest class as more efficient operations might be possible. llvm-svn: 107140
* Remove pointless variable LastDef.Duncan Sands2010-06-291-2/+0
| | | | llvm-svn: 107135
* Remove unused variable Loc and pointless variables unified_syntaxDuncan Sands2010-06-291-15/+4
| | | | | | and thumb_mode. llvm-svn: 107133
* Remove an unused and a pointless variable.Duncan Sands2010-06-291-3/+0
| | | | llvm-svn: 107131
* Remove pointless and unused variables.Duncan Sands2010-06-291-9/+0
| | | | llvm-svn: 107130
* Remove initialized but otherwise unused variables.Duncan Sands2010-06-295-6/+0
| | | | llvm-svn: 107127
* PR7503: uxtb16 is not available for ARMv7-M. Patch by Brian G. Lucas.Evan Cheng2010-06-291-2/+2
| | | | llvm-svn: 107122
* Change if-cvt options to something that actually as useable.Evan Cheng2010-06-291-4/+6
| | | | llvm-svn: 107121
* Refactoring of arithmetic instruction classes with unary operatorBruno Cardoso Lopes2010-06-291-118/+60
| | | | llvm-svn: 107116
* When no memoperands are present, assume unaligned, volatile.Jakob Stoklund Olesen2010-06-291-10/+13
| | | | llvm-svn: 107114
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