| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | Print a grouping around inline asm blocks so that we can tell when we are | Chris Lattner | 2006-05-05 | 1 | -1/+2 |
| | | | | | | | using them. llvm-svn: 28134 | ||||
| * | Print *some* grouping around inline asm blocks so we know where they are. | Chris Lattner | 2006-05-05 | 1 | -1/+2 |
| | | | | | llvm-svn: 28133 | ||||
| * | Teach the code generator to use cvtss2sd as extload f32 -> f64 | Chris Lattner | 2006-05-05 | 2 | -5/+1 |
| | | | | | llvm-svn: 28131 | ||||
| * | Need extload patterns after Chris' DAG combiner changes | Evan Cheng | 2006-05-05 | 1 | -1/+11 |
| | | | | | llvm-svn: 28127 | ||||
| * | Better implementation of truncate. ISel matches it to a pseudo instruction | Evan Cheng | 2006-05-05 | 6 | -240/+162 |
| | | | | | | | | | that gets emitted as movl (for r32 to i16, i8) or a movw (for r16 to i8). And if the destination gets allocated a subregister of the source operand, then the instruction will not be emitted at all. llvm-svn: 28119 | ||||
| * | New note, Nate, please check to see if I'm full of it :) | Chris Lattner | 2006-05-05 | 1 | -0/+33 |
| | | | | | llvm-svn: 28118 | ||||
| * | Remove and simplify some more machineinstr/machineoperand stuff. | Chris Lattner | 2006-05-04 | 2 | -15/+15 |
| | | | | | llvm-svn: 28105 | ||||
| * | Rename MO_VirtualRegister -> MO_Register. Clean up immediate handling. | Chris Lattner | 2006-05-04 | 7 | -13/+13 |
| | | | | | llvm-svn: 28104 | ||||
| * | Move some methods out of MachineInstr into MachineOperand | Chris Lattner | 2006-05-04 | 8 | -25/+23 |
| | | | | | llvm-svn: 28102 | ||||
| * | There shalt be only one "immediate" operand type! | Chris Lattner | 2006-05-04 | 15 | -53/+45 |
| | | | | | llvm-svn: 28099 | ||||
| * | Revert Nate's CR patch from last night, which caused many regressions (e.g. ↵ | Chris Lattner | 2006-05-04 | 2 | -26/+9 |
| | | | | | | | | | | fhourstones). Loading and storing off R0 isn't what we wanted. Also, taking some CR's out of CRRC seems to cause failures as well. Further investigation is required. llvm-svn: 28097 | ||||
| * | Make external globals public; other minor cleanup. | Jeff Cohen | 2006-05-04 | 1 | -15/+17 |
| | | | | | llvm-svn: 28096 | ||||
| * | Make Intel syntax the default when LLVM is built with VC++. | Jeff Cohen | 2006-05-04 | 1 | -1/+6 |
| | | | | | llvm-svn: 28095 | ||||
| * | Remove a bunch more dead V9 specific stuff | Chris Lattner | 2006-05-04 | 1 | -6/+1 |
| | | | | | llvm-svn: 28094 | ||||
| * | Remove a bunch more SparcV9 specific stuff | Chris Lattner | 2006-05-04 | 10 | -42/+10 |
| | | | | | llvm-svn: 28093 | ||||
| * | Remove some more V9-specific stuff. | Chris Lattner | 2006-05-04 | 2 | -7/+1 |
| | | | | | llvm-svn: 28092 | ||||
| * | Remove some more unused stuff from MachineInstr that was leftover from V9. | Chris Lattner | 2006-05-04 | 6 | -31/+0 |
| | | | | | llvm-svn: 28091 | ||||
| * | Simplify handling of relocations | Chris Lattner | 2006-05-04 | 1 | -24/+38 |
| | | | | | llvm-svn: 28090 | ||||
| * | Use movsd to shuffle in the lowest two elements of a v4f32 / v4i32 vector when | Evan Cheng | 2006-05-03 | 1 | -0/+8 |
| | | | | | | | movlps cannot be used (e.g. when load from m64 has multiple uses). llvm-svn: 28089 | ||||
| * | Change from using MachineRelocation ctors to using static methods | Chris Lattner | 2006-05-03 | 3 | -8/+8 |
| | | | | | | | in MachineRelocation to create Relocations. llvm-svn: 28088 | ||||
| * | inline a simple method | Chris Lattner | 2006-05-03 | 1 | -10/+7 |
| | | | | | llvm-svn: 28083 | ||||
| * | Suck block address tracking out of targets into the JIT Emitter. This | Chris Lattner | 2006-05-03 | 3 | -47/+19 |
| | | | | | | | | simplifies the MachineCodeEmitter interface just a little bit and makes BasicBlocks work like constant pools and jump tables. llvm-svn: 28082 | ||||
| * | Fix a bug in Owen's checkin that broke the CBE on all non sparc v9 platforms. | Chris Lattner | 2006-05-03 | 1 | -1/+1 |
| | | | | | llvm-svn: 28081 | ||||
| * | Teach the x86 jit how to handle jump tables not directly used by a jump | Nate Begeman | 2006-05-03 | 1 | -0/+3 |
| | | | | | | | instruction. llvm-svn: 28080 | ||||
| * | Refactor TargetMachine, pushing handling of TargetData into the ↵ | Owen Anderson | 2006-05-03 | 19 | -49/+53 |
| | | | | | | | | | target-specific subclasses. This has one caller-visible change: getTargetData() now returns a pointer instead of a reference. This fixes PR 759. llvm-svn: 28074 | ||||
| * | Change the BasicBlockAddrs map to be a vector, indexed by MBB number. | Chris Lattner | 2006-05-03 | 2 | -14/+17 |
| | | | | | llvm-svn: 28069 | ||||
| * | Keep the alpha JIT similar to the PPC/X86 jits | Chris Lattner | 2006-05-03 | 1 | -4/+6 |
| | | | | | llvm-svn: 28068 | ||||
| * | Several related changes: | Chris Lattner | 2006-05-02 | 3 | -5/+0 |
| | | | | | | | | | | | | | | 1. Change several methods in the MachineCodeEmitter class to be pure virtual. 2. Suck emitConstantPool/initJumpTableInfo into startFunction, removing them from the MachineCodeEmitter interface, and reducing the amount of target- specific code. 3. Change the JITEmitter so that it allocates constantpools and jump tables *right* next to the functions that they belong to, instead of in a separate pool of memory. This makes all memory for a function be contiguous, and means the JITEmitter only tracks one block of memory now. llvm-svn: 28065 | ||||
| * | Remove some stuff from the README | Nate Begeman | 2006-05-02 | 1 | -21/+0 |
| | | | | | llvm-svn: 28063 | ||||
| * | Fix a purely hypothetical problem (for now): emitWord emits in the host | Chris Lattner | 2006-05-02 | 6 | -29/+21 |
| | | | | | | | | | byte format. This doesn't work when using the code emitter in a cross target environment. Since the code emitter is only really used by the JIT, this isn't a current problem, but if we ever start emitting .o files, it would be. llvm-svn: 28060 | ||||
| * | Refactor the machine code emitter interface to pull the pointers for the current | Chris Lattner | 2006-05-02 | 3 | -19/+31 |
| | | | | | | | | | | | code emission location into the base class, instead of being in the derived classes. This change means that low-level methods like emitByte/emitWord now are no longer virtual (yaay for speed), and we now have a framework to support growable code segments. This implements feature request #1 of PR469. llvm-svn: 28059 | ||||
| * | Since we don't handle callee-save CRs right yet, don't allocate them. Also | Nate Begeman | 2006-05-02 | 2 | -9/+26 |
| | | | | | | | don't step on R11 in the middle of a function when saving and restoring CRs llvm-svn: 28058 | ||||
| * | Hooray, everyone now uses the same printBasicBlockLabel implementation | Nate Begeman | 2006-05-02 | 3 | -36/+3 |
| | | | | | llvm-svn: 28056 | ||||
| * | There is no reason to use a virtual method to store this word. | Chris Lattner | 2006-05-02 | 1 | -2/+2 |
| | | | | | llvm-svn: 28053 | ||||
| * | Extend printBasicBlockLabel a bit so that it can be used to print all | Nate Begeman | 2006-05-02 | 8 | -34/+43 |
| | | | | | | | | basic block labels, consolidating the code to do so in one place for each target. llvm-svn: 28050 | ||||
| * | Update the PPC compilation callback code to not need weird abi-violating | Nate Begeman | 2006-05-02 | 1 | -49/+46 |
| | | | | | | | | prologs and epilogs, keep all the asm in one place, and remove use of compiler builtin functions. llvm-svn: 28049 | ||||
| * | De-virtualize SwitchSection. | Jeff Cohen | 2006-05-02 | 2 | -27/+2 |
| | | | | | llvm-svn: 28047 | ||||
| * | De-virtualize EmitZeroes. | Jeff Cohen | 2006-05-02 | 2 | -8/+2 |
| | | | | | llvm-svn: 28046 | ||||
| * | Finish support for Microsoft ML/MASM. May still be a few rough edges. | Jeff Cohen | 2006-05-02 | 2 | -3/+50 |
| | | | | | llvm-svn: 28045 | ||||
| * | Make Intel syntax mode friendlier to Microsoft ML assembler (still needs ↵ | Jeff Cohen | 2006-05-02 | 2 | -17/+97 |
| | | | | | | | more work). llvm-svn: 28044 | ||||
| * | Put PHI/INLINEASM into the correct namespace. | Chris Lattner | 2006-05-01 | 1 | -0/+2 |
| | | | | | llvm-svn: 28037 | ||||
| * | Remove %'s from register names when in intel mode. | Chris Lattner | 2006-05-01 | 2 | -6/+4 |
| | | | | | llvm-svn: 28027 | ||||
| * | Mingw32 patches supplied by Anton Korobeynikov. | Jeff Cohen | 2006-04-29 | 1 | -2/+2 |
| | | | | | llvm-svn: 28023 | ||||
| * | I can't spell: Register, not Regsiter. | Evan Cheng | 2006-04-28 | 4 | -6/+6 |
| | | | | | llvm-svn: 28021 | ||||
| * | Implemented x86 inline asm b, h, w, k modifiers. | Evan Cheng | 2006-04-28 | 4 | -1/+249 |
| | | | | | llvm-svn: 28020 | ||||
| * | Fix CodeGen/Generic/2006-04-28-Sign-extend-bool.ll | Chris Lattner | 2006-04-28 | 1 | -0/+4 |
| | | | | | llvm-svn: 28017 | ||||
| * | Initial caller side support (for CCC only, not FastCC) of 128-bit vector | Evan Cheng | 2006-04-28 | 1 | -7/+73 |
| | | | | | | | passing by value. llvm-svn: 28015 | ||||
| * | Bare-bone X86 inline asm printer support. | Evan Cheng | 2006-04-28 | 4 | -2/+66 |
| | | | | | llvm-svn: 28014 | ||||
| * | Implement four-wide shuffle with 2 shufps if no more than two elements come | Evan Cheng | 2006-04-28 | 1 | -2/+47 |
| | | | | | | | | | | | | from each vector. e.g. shuffle(G1, G2, 7, 1, 5, 2) ==> movaps _G2, %xmm0 shufps $151, _G1, %xmm0 shufps $216, %xmm0, %xmm0 llvm-svn: 28011 | ||||
| * | TargetLowering::LowerArguments should return a VBIT_CONVERT of | Evan Cheng | 2006-04-28 | 1 | -1/+1 |
| | | | | | | | FORMAL_ARGUMENTS SDOperand in the return result vector. llvm-svn: 28009 | ||||

