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* [WinEH] Make sure LSDA tables are 4 byte alignedReid Kleckner2015-07-101-2/+4
| | | | | | | | | | Apparently this is important, otherwise _except_handler3 assumes that the registration node is corrupted and ignores it. Also fix a bug in WinEHPrepare where we would insert code after a terminator instruction. llvm-svn: 241877
* Replace index-loops by range-based loopsEli Bendersky2015-07-091-6/+3
| | | | | | NFC llvm-svn: 241875
* [x86] enable machine combiner reassociations for scalar double-precision ↵Sanjay Patel2015-07-091-1/+3
| | | | | | multiplies llvm-svn: 241873
* [x86] enable machine combiner reassociations for scalar double-precision addsSanjay Patel2015-07-091-0/+2
| | | | llvm-svn: 241871
* [WinEH] Give up on using CSRs across 32-bit invokes for nowReid Kleckner2015-07-091-2/+17
| | | | | | | | | | | The runtime does not restore CSRs when transferring control back to the function handling the exception. According to the experts on IRC, LLVM's register allocator has no way to model register clobbers that only happen on one edge of the CFG. For now, don't worry about trying to use the meager three CSRs available on 32-bit X86 and just say that such invokes preserve nothing. llvm-svn: 241865
* AMDGPU: Add helper function for implicit parameter offsets.Tom Stellard2015-07-094-4/+28
| | | | | | Patch by: Zoltan Gilian llvm-svn: 241861
* Unbreak WebAssembly buildJF Bastien2015-07-094-26/+6
| | | | | | | | | | | | Summary: D11021 and D11045 didn't update the WebAssembly target's code. It's still experimental so all tests passed. Reviewers: sunfish, joker.eph, echristo Subscribers: llvm-commits, jfb Differential Revision: http://reviews.llvm.org/D11084 llvm-svn: 241859
* AMDGPU/R600: Return correct chain when lowering loadsMatt Arsenault2015-07-091-8/+2
| | | | | | The other LowerLOAD should be returning the correct chain. llvm-svn: 241839
* Allow {e,r}bp as the target of {read,write}_register.Pat Gavlin2015-07-0910-15/+42
| | | | | | | | | | This patch allows the read_register and write_register intrinsics to read/write the RBP/EBP registers on X86 iff the targeted register is the frame pointer for the containing function. Differential Revision: http://reviews.llvm.org/D10977 llvm-svn: 241827
* AMDGPU/SI: The SIShrinkInstructions pass should only fold immediates with ↵Tom Stellard2015-07-091-1/+1
| | | | | | | | | one use This is convered by existing testcases and will be exposed by a future commit. llvm-svn: 241817
* AMDGPU/SI: Fix crash on physical registers in SIInstrInfo::isOperandLegal()Tom Stellard2015-07-091-1/+4
| | | | | | | No test case for this. I ran into it while working on some improvements to SIShrinkInstructions.cpp. llvm-svn: 241816
* [Hexagon] Add missing preamble to a source fileKrzysztof Parzyszek2015-07-091-0/+9
| | | | llvm-svn: 241813
* Re-instate the EVT parameter to getScalarShiftAmountTy() for OOT userMehdi Amini2015-07-0914-15/+17
| | | | | | | A documentation for this function would be nice by the way. From: Mehdi Amini <mehdi.amini@apple.com> llvm-svn: 241807
* Reapply fixed r241790: Fix shift legalization and lowering for big constants.Pawel Bylica2015-07-091-1/+1
| | | | | | | | | | | | Summary: If shift amount is a constant value > 64 bit it is handled incorrectly during type legalization and X86 lowering. This patch the type of shift amount argument in function DAGTypeLegalizer::ExpandShiftByConstant from unsigned to APInt. Reviewers: nadav, majnemer, sanjoy, RKSimon Subscribers: RKSimon, llvm-commits Differential Revision: http://reviews.llvm.org/D10767 llvm-svn: 241806
* [Hexagon] Add support for atomic RMW operationsKrzysztof Parzyszek2015-07-093-1/+59
| | | | llvm-svn: 241804
* [AArch64] Select SBFIZ or UBFIZ instead of left + right shiftsArnaud A. de Grandmaison2015-07-091-20/+16
| | | | | | And rename LSB to Immr / MSB to Imms to match the ARM ARM terminology. llvm-svn: 241803
* [ARM] Thumb1 3 to 2 operand convertion for commutative operationsScott Douglass2015-07-091-3/+21
| | | | | | Differential Revision: http://reviews.llvm.org/D11057 llvm-svn: 241802
* [ARM] Don't be overzealous converting Thumb1 3 to 2 operandsScott Douglass2015-07-091-0/+5
| | | | | | Differential Revision: http://reviews.llvm.org/D11056 llvm-svn: 241801
* [ARM] Add Thumb2 ADD with PC narrowing from 3 operand to 2Scott Douglass2015-07-091-2/+12
| | | | | | Differential Revision: http://reviews.llvm.org/D11055 llvm-svn: 241800
* [ARM] Refactor converting Thumb1 from 3 to 2 operand (nfc)Scott Douglass2015-07-091-42/+45
| | | | | | | | Also adds some test cases. Differential Revision: http://reviews.llvm.org/D11054 llvm-svn: 241799
* Add support for nest attribute to AArch64 backendRenato Golin2015-07-091-0/+5
| | | | | | | | | | | | | | | The nest attribute is currently supported on the x86 (32-bit) and x86-64 backends, but not on ARM (32-bit) or AArch64. This patch adds support for nest to the AArch64 backend. Register x18 is used by GCC for this purpose and hence is used here. As discussed on the GCC mailing list the register choice is an ABI issue and so choosing the same register as GCC means __builtin_call_with_static_chain is compatible. Patch by Stephen Cross. llvm-svn: 241794
* Revert r241790: Fix shift legalization and lowering for big constants.Pawel Bylica2015-07-091-1/+1
| | | | llvm-svn: 241792
* Fix shift legalization and lowering for big constants.Pawel Bylica2015-07-091-1/+1
| | | | | | | | | | | | Summary: If shift amount is a constant value > 64 bit it is handled incorrectly during type legalization and X86 lowering. This patch the type of shift amount argument in function DAGTypeLegalizer::ExpandShiftByConstant from unsigned to APInt. Reviewers: nadav, majnemer, sanjoy, RKSimon Subscribers: RKSimon, llvm-commits Differential Revision: http://reviews.llvm.org/D10767 llvm-svn: 241790
* Remove getDataLayout() from TargetSelectionDAGInfo (had no users)Mehdi Amini2015-07-0940-294/+27
| | | | | | | | | | | | | | | | | | Summary: Remove empty subclass in the process. This change is part of a series of commits dedicated to have a single DataLayout during compilation by using always the one owned by the module. Reviewers: echristo Subscribers: jholewinski, llvm-commits, rafael, yaron.keren, ted Differential Revision: http://reviews.llvm.org/D11045 From: Mehdi Amini <mehdi.amini@apple.com> llvm-svn: 241780
* Remove getDataLayout() from TargetLoweringMehdi Amini2015-07-0914-111/+119
| | | | | | | | | | | | | | | | Summary: This change is part of a series of commits dedicated to have a single DataLayout during compilation by using always the one owned by the module. Reviewers: echristo Subscribers: yaron.keren, rafael, llvm-commits, jholewinski Differential Revision: http://reviews.llvm.org/D11042 From: Mehdi Amini <mehdi.amini@apple.com> llvm-svn: 241779
* Make isLegalAddressingMode() taking DataLayout as an argumentMehdi Amini2015-07-0920-51/+50
| | | | | | | | | | | | | | | | Summary: This change is part of a series of commits dedicated to have a single DataLayout during compilation by using always the one owned by the module. Reviewers: echristo Subscribers: jholewinski, llvm-commits, rafael, yaron.keren Differential Revision: http://reviews.llvm.org/D11040 From: Mehdi Amini <mehdi.amini@apple.com> llvm-svn: 241778
* Make getByValTypeAlignment() taking DataLayout as an argumentMehdi Amini2015-07-094-5/+9
| | | | | | | | | | | | | | | | Summary: This change is part of a series of commits dedicated to have a single DataLayout during compilation by using always the one owned by the module. Reviewers: echristo Subscribers: yaron.keren, rafael, llvm-commits, jholewinski Differential Revision: http://reviews.llvm.org/D11038 From: Mehdi Amini <mehdi.amini@apple.com> llvm-svn: 241777
* Make TargetLowering::getShiftAmountTy() taking DataLayout as an argumentMehdi Amini2015-07-0915-24/+38
| | | | | | | | | | | | | | | | Summary: This change is part of a series of commits dedicated to have a single DataLayout during compilation by using always the one owned by the module. Reviewers: echristo Subscribers: jholewinski, llvm-commits, rafael, yaron.keren Differential Revision: http://reviews.llvm.org/D11037 From: Mehdi Amini <mehdi.amini@apple.com> llvm-svn: 241776
* Make TargetLowering::getPointerTy() taking DataLayout as an argumentMehdi Amini2015-07-0954-815/+928
| | | | | | | | | | | | | | | | Summary: This change is part of a series of commits dedicated to have a single DataLayout during compilation by using always the one owned by the module. Reviewers: echristo Subscribers: jholewinski, ted, yaron.keren, rafael, llvm-commits Differential Revision: http://reviews.llvm.org/D11028 From: Mehdi Amini <mehdi.amini@apple.com> llvm-svn: 241775
* Make TargetTransformInfo keeping a reference to the Module DataLayoutMehdi Amini2015-07-0914-125/+37
| | | | | | | | | | | | | | | | | | | | DataLayout is no longer optional. It was initialized with or without a DataLayout, and the DataLayout when supplied could have been the one from the TargetMachine. Summary: This change is part of a series of commits dedicated to have a single DataLayout during compilation by using always the one owned by the module. Reviewers: echristo Subscribers: jholewinski, llvm-commits, rafael, yaron.keren Differential Revision: http://reviews.llvm.org/D11021 From: Mehdi Amini <mehdi.amini@apple.com> llvm-svn: 241774
* Redirect DataLayout from TargetMachine to Module in ComputeValueVTs()Mehdi Amini2015-07-097-48/+50
| | | | | | | | | | | | | | | | | | | | Summary: Avoid using the TargetMachine owned DataLayout and use the Module owned one instead. This requires passing the DataLayout up the stack to ComputeValueVTs(). This change is part of a series of commits dedicated to have a single DataLayout during compilation by using always the one owned by the module. Reviewers: echristo Subscribers: jholewinski, yaron.keren, rafael, llvm-commits Differential Revision: http://reviews.llvm.org/D11019 From: Mehdi Amini <mehdi.amini@apple.com> llvm-svn: 241773
* [x86] enable machine combiner reassociations for scalar single-precision ↵Sanjay Patel2015-07-081-2/+4
| | | | | | multiplies llvm-svn: 241752
* Add missing dependency to Hexagon target.Diego Novillo2015-07-081-0/+1
| | | | | | | A recent patch added calls to isInstructionTriviallyDead without the corresponding dependency on TransformUtils. llvm-svn: 241731
* [Win64] Only treat some functions as having the Win64 conventionReid Kleckner2015-07-081-2/+20
| | | | | | | | | | | | | | | | All the usual X86 target-specific conventions are collapsed to the normal Win64 convention, but the custom conventions like GHC and webkit should not be. Previously we would assume that the caller allocated 32 bytes of shadow space for us, which is not how webkit_jscc or other custom conventions are supposed to work. Based on a patch by peavo@outlook.com. Fixes PR24051. llvm-svn: 241725
* [Hexagon] Implement commoning of GetElementPtr instructionsKrzysztof Parzyszek2015-07-083-0/+1340
| | | | llvm-svn: 241714
* [SEH] Ensure that empty __except blocks have their own BBReid Kleckner2015-07-081-0/+5
| | | | | | | | | The 32-bit lowering assumed that WinEHPrepare had this invariant. WinEHPrepare did it for C++, but not SEH. The result was that we would insert calls to llvm.x86.seh.restoreframe in normal basic blocks, which corrupted the frame pointer. llvm-svn: 241699
* MC: Constify MCSubtargetInfo in getDeprecationInfo(), NFCDuncan P. N. Exon Smith2015-07-081-4/+4
| | | | | | | There's no reason to be able to mutate `MCSubtargetInfo` in `getDeprecationInfo()`. Constify the reference. llvm-svn: 241693
* Cosmetic cleanups - NFCEli Bendersky2015-07-082-6/+3
| | | | | | Remove commented lines, trailing whitespace, etc. llvm-svn: 241687
* [SPARC] Cleanup handling of the Y/ASR registers.James Y Knight2015-07-084-13/+22
| | | | | | | | | | | | | | | | | | - Implement copying ASR to/from GPR regs. - Mark ASRs as non-allocatable, so it won't try to arbitrarily use them inappropriately. - Instead of inserting explicit WRASR/RDASR nodes in the MUL/DIV routines, just do normal register copies. - Also...mark div as using Y, not just writing it. Added a test case with some code which previously died with an assertion failure (with -O0), or produced wrong code (otherwise). (Third time's the charm?) Differential Revision: http://reviews.llvm.org/D10401 llvm-svn: 241686
* [Hexagon] Generate "insert" instructions more aggressivelyKrzysztof Parzyszek2015-07-083-1/+1604
| | | | llvm-svn: 241683
* Revert 241681: causes Windows builds to failKrzysztof Parzyszek2015-07-083-1604/+1
| | | | llvm-svn: 241682
* [Hexagon] Generate "insert" instructions more aggressivelyKrzysztof Parzyszek2015-07-083-1/+1604
| | | | llvm-svn: 241681
* [X86][SSE] Added (V)ROUNDSD + (V)ROUNDSS stack folding supportSimon Pilgrim2015-07-081-4/+8
| | | | llvm-svn: 241671
* Remove IsLittleEndian from TargetLowering and redirect to DataLayoutMehdi Amini2015-07-082-10/+12
| | | | | | | | | | | | | | | | Summary: This change is part of a series of commits dedicated to have a single DataLayout during compilation by using always the one owned by the module. Reviewers: echristo Subscribers: llvm-commits, rafael, yaron.keren Differential Revision: http://reviews.llvm.org/D11017 From: Mehdi Amini <mehdi.amini@apple.com> llvm-svn: 241655
* [WinEH] Make llvm.x86.seh.restoreframe work for stack realignment prologuesReid Kleckner2015-07-075-32/+93
| | | | | | | | | | The incoming EBP value points to the end of a local stack allocation, so we can use that to restore ESI, the base pointer. Once we do that, we can use local stack allocations. If we know we need stack realignment, spill the original frame pointer in the prologue and reload it after restoring ESI. llvm-svn: 241648
* [WinEH] Add localaddress intrinsic instead of using frameaddressReid Kleckner2015-07-071-0/+13
| | | | | | | Clang uses this for SEH finally. The new intrinsic will produce the right value when stack realignment is required. llvm-svn: 241643
* Add more nvcastsArnold Schwaighofer2015-07-071-0/+8
| | | | | | | | | Tim Northover has told me that they can occur when the compiler cleverly constructs constants - as demonstrated in the test case. rdar://21703486 llvm-svn: 241641
* [WebAssembly] Set the scheduling preference.Dan Gohman2015-07-071-0/+2
| | | | llvm-svn: 241637
* Rename llvm.frameescape and llvm.framerecover to localescape and localrecoverReid Kleckner2015-07-075-11/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | Summary: Initially, these intrinsics seemed like part of a family of "frame" related intrinsics, but now I think that's more confusing than helpful. Initially, the LangRef specified that this would create a new kind of allocation that would be allocated at a fixed offset from the frame pointer (EBP/RBP). We ended up dropping that design, and leaving the stack frame layout alone. These intrinsics are really about sharing local stack allocations, not frame pointers. I intend to go further and add an `llvm.localaddress()` intrinsic that returns whatever register (EBP, ESI, ESP, RBX) is being used to address locals, which should not be confused with the frame pointer. Naming suggestions at this point are welcome, I'm happy to re-run sed. Reviewers: majnemer, nicholas Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D11011 llvm-svn: 241633
* fix typo; NFCSanjay Patel2015-07-071-1/+1
| | | | llvm-svn: 241629
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