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* Note that ADDC and company don't actually expand yet (missing in legalizeAndrew Lenharth2008-10-072-2/+45
| | | | llvm-svn: 57226
* Fix PR2850 and PR2863. Only generate movddup for 128-bit SSE vector shuffles.Evan Cheng2008-10-061-0/+1
| | | | llvm-svn: 57210
* It is possible that all functions in one module are not being Devang Patel2008-10-061-5/+2
| | | | | | optimized for size. Set OptForSize for each function separately. llvm-svn: 57182
* Remove unncessary isDeclaration() checks.Devang Patel2008-10-062-2/+2
| | | | llvm-svn: 57179
* Emit type-correct constant null. Also fix a typo.Anton Korobeynikov2008-10-051-7/+3
| | | | | | Patch by Robert G. Jakabosky! llvm-svn: 57110
* Fix weird think-o and unbreak build on all gcc-3.4.x-based platforms (e.g. ↵Anton Korobeynikov2008-10-053-98/+91
| | | | | | mingw) llvm-svn: 57106
* this case is matched now.Chris Lattner2008-10-051-9/+1
| | | | llvm-svn: 57096
* Revert r56675 - it breaks unwinding runtime everywhere.Anton Korobeynikov2008-10-041-18/+8
| | | | llvm-svn: 57048
* Make atomic Swap work, 64-bit on x86-32.Dale Johannesen2008-10-034-11/+33
| | | | | | Make it all work in non-pic mode. llvm-svn: 57034
* Pass MemOperand through for 64-bit atomics on 32-bit,Dale Johannesen2008-10-033-4/+9
| | | | | | | incidentally making the case where the memop is a pointer deref work. Fix cmp-and-swap regression. llvm-svn: 57027
* Avoid creating two TargetLowering objects for each target.Dan Gohman2008-10-0311-33/+22
| | | | | | | | | | | | Instead, just create one, and make sure everything that needs it can access it. Previously most of the SelectionDAGISel subclasses all had their own TargetLowering object, which was redundant with the TargetLowering object in the TargetMachine subclasses, except on Sparc, where SparcTargetMachine didn't have a TargetLowering object. Change Sparc to work more like the other targets here. llvm-svn: 57016
* Remove an unused field.Dan Gohman2008-10-031-6/+1
| | | | llvm-svn: 57014
* Indexing off by one resulted in errant encoding of source register forJim Grosbach2008-10-031-1/+1
| | | | | | reg->reg moves. llvm-svn: 57011
* NeedStub/DoesntNeedStub logic was reversed, leading to not using a stubJim Grosbach2008-10-031-4/+4
| | | | | | for global relocations that do need them (libc calls, for example). llvm-svn: 57010
* Switch the MachineOperand accessors back to the short names likeDan Gohman2008-10-0342-351/+349
| | | | | | isReg, etc., from isRegister, etc. llvm-svn: 57006
* Fix X86FastISel to handle dynamic allocas that have avoidedDan Gohman2008-10-031-0/+10
| | | | | | | getting inserted into the ValueMap. This avoids infinite recursion in some rare cases. llvm-svn: 56989
* Optimize conditional branches in X86FastISel. This replacesDan Gohman2008-10-021-16/+142
| | | | | | | | | | | sequences like this: sete %al testb %al, %al jne LBB11_1 with this: je LBB11_1 llvm-svn: 56969
* Handle some 64-bit atomics on x86-32, some of the time.Dale Johannesen2008-10-024-8/+329
| | | | llvm-svn: 56963
* Work around an interaction between fast-isel and regalloc=local. TheDan Gohman2008-10-021-1/+5
| | | | | | | | | | | | | | | | | local register allocator's physreg liveness doesn't recognize subregs, so it doesn't know that defs of %ecx that are immediately followed by uses of %cl aren't dead. This comes up due to the way fast-isel emits shift instructions. This is a temporary workaround. Arguably, local regalloc should handle subreg references correctly. On the other hand, perhaps fast-isel should use INSERT_SUBREG instead of just assigning to the most convenient super-register of %cl when lowering shifts. This fixes MultiSource/Benchmarks/MallocBench/espresso, MultiSource/Applications/hexxagon, and others, under -fast. llvm-svn: 56947
* "The original bug was a complaint that _mm_srli_si128 mis-compiled when passedBill Wendling2008-10-021-0/+4
| | | | | | | | | | a constant vector ("{0x123, 0x456}" syntax). The fix is to simplify the _mm_srli_si128 macro, and move the "* 8" from the macro into the compiler back-end. I can't change the existing __builtins because so many people are using them :-(." Patch by Stuart Hastings! llvm-svn: 56944
* Remove OptimizeForSize global. Use function attribute optsize.Devang Patel2008-10-015-10/+4
| | | | llvm-svn: 56937
* Split x86's ADJCALLSTACK instructions into 32-bit and 64-bit forms.Dan Gohman2008-10-014-14/+45
| | | | | | | | | | | This allows the 64-bit forms to use+def RSP instead of ESP. This doesn't fix any real bugs today, but it is more precise and it makes the debug dumps on x86-64 look more consistent. Also, add some comments describing the CALL instructions' physreg operand uses and defs. llvm-svn: 56925
* Fix typo s/ther/there/Jim Grosbach2008-10-011-1/+1
| | | | llvm-svn: 56924
* Mark CALL instructions as having a Use of ESP/RSP.Dan Gohman2008-10-012-3/+5
| | | | llvm-svn: 56911
* Implement the -fno-builtin option in the front-end, not in the back-end.Bill Wendling2008-10-012-22/+18
| | | | llvm-svn: 56900
* Just don't transform this memset into "bzero" if no-builtin is specified.Bill Wendling2008-09-303-19/+21
| | | | llvm-svn: 56888
* Add the new `-no-builtin' flag. This flag is meant to mimic the GCCBill Wendling2008-09-304-28/+30
| | | | | | | | | `-fno-builtin' flag. Currently, it's used to replace "memset" with "_bzero" instead of "__bzero" on Darwin10+. This arguably violates the meaning of this flag, but is currently sufficient. The meaning of this flag should become more specific over time. llvm-svn: 56885
* Optimize SelectionDAG's AssignTopologicalOrder even further.Dan Gohman2008-09-301-1/+1
| | | | | | | | | | | | | | | | | | | Completely eliminate the TopOrder std::vector. Instead, sort the AllNodes list in place. This also eliminates the need to call AllNodes.size(), a linear-time operation, before performing the sort. Also, eliminate the Sources temporary std::vector, since it essentially duplicates the sorted result as it is being built. This also changes the direction of the topological sort from bottom-up to top-down. The AllNodes list starts out in roughly top-down order, so this reduces the amount of reordering needed. Top-down is also more convenient for Legalize, and ISel needed only minor adjustments. llvm-svn: 56867
* Fix X86FastISel's output for x86-32 PIC constant pool addresses.Dan Gohman2008-09-302-6/+17
| | | | llvm-svn: 56829
* Move the GlobalBaseReg field out of X86ISelDAGToDAG.cppDan Gohman2008-09-305-43/+36
| | | | | | | | and X86FastISel.cpp into X86MachineFunction.h, so that it can be shared, instead of having each selector keep track of its own. llvm-svn: 56825
* Disable all x87 usage, including f32 and f64 when the subtargetDan Gohman2008-09-301-6/+17
| | | | | | doesn't have SSE(2), with X86FastISel. llvm-svn: 56823
* Remove misuse of ReplaceNodeResults for atomics withDale Johannesen2008-09-292-20/+24
| | | | | | valid types. No functional change. llvm-svn: 56808
* Fix an over-pessimization about GlobalVariable addresses in X86FastISel.Dan Gohman2008-09-291-1/+1
| | | | llvm-svn: 56802
* Fix PR2835. Do not change the width of a volatile load.Evan Cheng2008-09-291-2/+18
| | | | llvm-svn: 56792
* Rename isWeakForLinker to mayBeOverridden. Use itDuncan Sands2008-09-2910-13/+13
| | | | | | | instead of hasWeakLinkage in a bunch of optimization passes. llvm-svn: 56782
* Re-apply 56683 with fixes.Evan Cheng2008-09-275-10/+16
| | | | llvm-svn: 56748
* Unbreak build. Daniel Dunbar2008-09-271-1/+2
| | | | llvm-svn: 56727
* Implement function notes as function attributes. Devang Patel2008-09-262-2/+2
| | | | llvm-svn: 56716
* Implement "punpckldq %xmm0, $xmm0" as "pshufd $0x50, %xmm0, %xmm" unless ↵Evan Cheng2008-09-263-5/+37
| | | | | | optimizing for code size. llvm-svn: 56711
* Temporarily reverting r56683. This is causing a failure during the build of ↵Bill Wendling2008-09-268-21/+12
| | | | | | | | | | | | | | | | | llvm-gcc: /Volumes/Gir/devel/llvm/clean/llvm-gcc.obj/./gcc/xgcc -B/Volumes/Gir/devel/llvm/clean/llvm-gcc.obj/./gcc/ -B/Volumes/Gir/devel/llvm/clean/llvm-gcc.install/i386-apple-darwin9.5.0/bin/ -B/Volumes/Gir/devel/llvm/clean/llvm-gcc.install/i386-apple-darwin9.5.0/lib/ -isystem /Volumes/Gir/devel/llvm/clean/llvm-gcc.install/i386-apple-darwin9.5.0/include -isystem /Volumes/Gir/devel/llvm/clean/llvm-gcc.install/i386-apple-darwin9.5.0/sys-include -mmacosx-version-min=10.4 -O2 -O2 -g -O2 -DIN_GCC -W -Wall -Wwrite-strings -Wstrict-prototypes -Wmissing-prototypes -Wold-style-definition -isystem ./include -fPIC -pipe -g -DHAVE_GTHR_DEFAULT -DIN_LIBGCC2 -D__GCC_FLOAT_NOT_NEEDED -I. -I. -I../../llvm-gcc.src/gcc -I../../llvm-gcc.src/gcc/. -I../../llvm-gcc.src/gcc/../include -I./../intl -I../../llvm-gcc.src/gcc/../libcpp/include -I../../llvm-gcc.src/gcc/../libdecnumber -I../libdecnumber -I/Volumes/Gir/devel/llvm/clean/llvm.obj/include -I/Volumes/Gir/devel/llvm/clean/llvm.src/include -fexceptions -fvisibility=hidden -DHIDE_EXPORTS -c ../../llvm-gcc.src/gcc/unwind-dw2-fde-darwin.c -o libgcc/./unwind-dw2-fde-darwin.o Assertion failed: (TargetRegisterInfo::isVirtualRegister(regA) && TargetRegisterInfo::isVirtualRegister(regB) && "cannot update physical register live information"), function runOnMachineFunction, file /Volumes/Gir/devel/llvm/clean/llvm.src/lib/CodeGen/TwoAddressInstructionPass.cpp, line 311. ../../llvm-gcc.src/gcc/unwind-dw2.c:1527: internal compiler error: Abort trap Please submit a full bug report, with preprocessed source if appropriate. See <URL:http://developer.apple.com/bugreporter> for instructions. {standard input}:3521:non-relocatable subtraction expression, "_dwarf_reg_size_table" minus "L20$pb" {standard input}:3521:symbol: "_dwarf_reg_size_table" can't be undefined in a subtraction expression {standard input}:3520:non-relocatable subtraction expression, "_dwarf_reg_size_table" minus "L20$pb" ... llvm-svn: 56703
* Rename ConstantSDNode's getSignExtended to getSExtValue, forDan Gohman2008-09-266-17/+17
| | | | | | | consistancy with ConstantInt, and re-implement it in terms of ConstantInt's getSExtValue. llvm-svn: 56700
* Mark lea fi# as being really rematerializable.Dan Gohman2008-09-261-2/+3
| | | | llvm-svn: 56698
* unpckhps requires sse1, punpckhdq requires sse2.Evan Cheng2008-09-261-4/+4
| | | | llvm-svn: 56697
* Fix X86FastISel's address folding to check displacementDan Gohman2008-09-261-5/+12
| | | | | | values for overflow. llvm-svn: 56686
* Fix @llvm.frameaddress codegen. FP elimination optimization should be ↵Evan Cheng2008-09-268-12/+21
| | | | | | disabled when frame address is desired. Also add support for depth > 0. llvm-svn: 56683
* CMake: Builds all examples. Corrected name of CBackend target.Oscar Fuentes2008-09-261-1/+1
| | | | llvm-svn: 56682
* Add "inreg" field to CallSDNode (doesn't increaseDale Johannesen2008-09-268-24/+13
| | | | | | | | | its size). Adjust various lowering functions to pass this info through from CallInst. Use it to implement sseregparm returns on X86. Remove X86_ssecall calling convention. llvm-svn: 56677
* Factor out the code for determining when symblic addressesDan Gohman2008-09-264-17/+50
| | | | | | | | | require RIP-relative addressing and use it to fix a bug in X86FastISel in x86-64 PIC mode, where it was trying to use base/index registers with RIP-relative addresses. This fixes a bunch of x86-64 testsuite failures. llvm-svn: 56676
* Avoid spilling EBP / RBP twice in the prologue.Evan Cheng2008-09-261-8/+18
| | | | llvm-svn: 56675
* X86 address displacement field must be interpreted as a 32-bit value.Evan Cheng2008-09-261-3/+4
| | | | llvm-svn: 56665
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