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* - Switch X86-64 JIT to large code size model.Evan Cheng2006-12-051-0/+3
| | | | | | | - Re-enable some codegen niceties for X86-64 static relocation model codegen. - Clean ups, etc. llvm-svn: 32238
* Non-darwin gcc should default to static relocation to match gcc.Evan Cheng2006-12-041-1/+1
| | | | llvm-svn: 32184
* Removed even more std::cerr and #include <iostream> things.Bill Wendling2006-11-171-1/+0
| | | | llvm-svn: 31813
* Committing X86-64 support.Evan Cheng2006-09-081-7/+53
| | | | llvm-svn: 30177
* 1. Remove condition on delete.Jim Laskey2006-09-071-0/+5
| | | | | | | | 2. Protect and outline createTargetAsmInfo. 3. Misc. kruft. llvm-svn: 30169
* Fix some X86 JIT failures. This should really come from TargetJITInfo.Chris Lattner2006-09-041-0/+3
| | | | llvm-svn: 30102
* Completely rearchitect the interface between targets and the pass manager.Chris Lattner2006-09-041-110/+22
| | | | | | | | | | | | | | | | | | | | | | | | This pass: 1. Splits TargetMachine into TargetMachine (generic targets, can be implemented any way, like the CBE) and LLVMTargetMachine (subclass of TM that is used by things using libcodegen and other support). 2. Instead of having each target fully populate the passmgr for file or JIT output, move all this to common code, and give targets hooks they can implement. 3. Commonalize the target population stuff between file emission and JIT emission. 4. All (native code) codegen stuff now happens in a FunctionPassManager, which paves the way for "fast -O0" stuff in the CFE later, and now LLC could lazily stream .bc files from disk to use less memory. 5. There are now many fewer #includes and the targets don't depend on the scalar xforms or libanalysis anymore (but codegen does). 6. Changing common code generator pass ordering stuff no longer requires touching all targets. 7. The JIT now has the option of "-fast" codegen or normal optimized codegen, which is now orthogonal to the fact that JIT'ing is being done. llvm-svn: 30081
* Simplify target construction.Chris Lattner2006-09-031-3/+1
| | | | llvm-svn: 30070
* - Enable x86 isel preprocessing by default unless -fast is specified.Evan Cheng2006-08-291-2/+2
| | | | | | - Also disable isel load folding if -fast. llvm-svn: 29956
* Initial checkin of the Mach-O emitter. There's plenty of fixmes, but itNate Begeman2006-08-231-1/+1
| | | | | | does emit linkable .o files in very simple cases. llvm-svn: 29850
* Disable LSR at -fastNate Begeman2006-08-021-1/+1
| | | | llvm-svn: 29467
* Rename RelocModel::PIC to PIC_, to avoid conflicts with -DPIC.Chris Lattner2006-07-261-1/+1
| | | | llvm-svn: 29307
* - Refactor the code that resolve basic block references to a TargetJITInfoEvan Cheng2006-07-251-1/+1
| | | | | | | | | | method. - Added synchronizeICache() to TargetJITInfo. It is called after each block of code is emitted to flush the icache. This ensures correct execution on targets that have separate dcache and icache. - Added PPC / Mac OS X specific code to do icache flushing. llvm-svn: 29276
* Don't pass target name into TargetData anymore, it is never used or needed.Chris Lattner2006-06-161-1/+1
| | | | | | | Remove explicit casts to std::string now that there is no overload resolution issues in the TargetData ctors. llvm-svn: 28830
* Fix a build breaker.Evan Cheng2006-05-301-2/+2
| | | | llvm-svn: 28574
* Make TargetData strings less redundant.Owen Anderson2006-05-201-1/+1
| | | | llvm-svn: 28423
* Make all of the TargetMachine subclasses use the new string TargetData methods.Owen Anderson2006-05-201-1/+1
| | | | | | This is part of the on-going work on PR 761. llvm-svn: 28414
* Refactor TargetMachine, pushing handling of TargetData into the ↵Owen Anderson2006-05-031-1/+2
| | | | | | | | target-specific subclasses. This has one caller-visible change: getTargetData() now returns a pointer instead of a reference. This fixes PR 759. llvm-svn: 28074
* Disable switch lowering for targets based on the selection dag isel,Nate Begeman2006-04-081-10/+0
| | | | | | letting the code generator handle them directly. llvm-svn: 27539
* SelectionDAGISel can now natively handle Switch instructions, in the sameNate Begeman2006-03-271-4/+7
| | | | | | | | | | | | | | manner that the LowerSwitch LLVM to LLVM pass does: emitting a binary search tree of basic blocks. The new approach has several advantages: it is faster, it generates significantly smaller code in many cases, and it paves the way for implementing dense switch tables as a jump table by handling switches directly in the instruction selector. This functionality is currently only enabled on x86, but should be safe for every target. In anticipation of making it the default, the cfg is now properly updated in the x86, ppc, and sparc select lowering code. llvm-svn: 27156
* Eliminate IntrinsicLowering from TargetMachine.Chris Lattner2006-03-231-5/+2
| | | | | | Make the CBE and V9 backends create their own, since they're the only ones that use it. llvm-svn: 26974
* Turning on LSR by defaultEvan Cheng2006-03-191-6/+2
| | | | llvm-svn: 26861
* Added a way for TargetLowering to specify what values can be used as theEvan Cheng2006-03-161-2/+2
| | | | | | scale component of the target addressing mode. llvm-svn: 26802
* Added getTargetLowering() to TargetMachine. Refactored targets to support this.Evan Cheng2006-03-131-2/+6
| | | | llvm-svn: 26742
* Add option -enable-x86-lsr to enable x86 loop strength reduction pass.Evan Cheng2006-03-091-0/+7
| | | | llvm-svn: 26665
* - Added option -relocation-model to set relocation model. Valid values ↵Evan Cheng2006-02-221-2/+7
| | | | | | | | | | include static, pic, dynamic-no-pic, and default. PPC and x86 default is dynamic-no-pic for Darwin, pic for others. - Removed options -enable-pic and -ppc-static. llvm-svn: 26315
* Disable PIC for JIT.Evan Cheng2006-02-181-0/+3
| | | | llvm-svn: 26281
* Kill the x86 pattern isel. boom.Nate Begeman2006-02-171-15/+2
| | | | llvm-svn: 26246
* remove an old commentChris Lattner2006-02-031-3/+2
| | | | llvm-svn: 25940
* Remove the X86PeepholeOptimizerPass, a truly horrible old hack that is nowChris Lattner2006-02-031-4/+0
| | | | | | obsolete. yaay :) llvm-svn: 25939
* Bye bye Pattern ISel, hello DAG ISel.Evan Cheng2006-01-271-10/+10
| | | | llvm-svn: 25700
* x86 CPU detection and proper subtarget supportEvan Cheng2006-01-271-36/+1
| | | | llvm-svn: 25679
* Added preliminary x86 subtarget support.Evan Cheng2006-01-261-2/+12
| | | | llvm-svn: 25645
* Add explicit #includes of <iostream>Chris Lattner2006-01-221-0/+1
| | | | llvm-svn: 25515
* Stop doing that accidental commit.Evan Cheng2006-01-201-1/+1
| | | | llvm-svn: 25474
* A few more SH{L|R}D peepholes.Evan Cheng2006-01-201-1/+1
| | | | llvm-svn: 25473
* Didn't mean to commit the last one.Evan Cheng2006-01-191-1/+1
| | | | llvm-svn: 25469
* Added i16 SH{L|R}D patterns.Evan Cheng2006-01-191-1/+1
| | | | llvm-svn: 25468
* SSE2 floating point load / store patterns. SSE2 fp to int conversion patterns.Evan Cheng2005-12-201-0/+3
| | | | llvm-svn: 24886
* Only lower SELECT when using DAG based isel.Evan Cheng2005-12-171-4/+7
| | | | llvm-svn: 24755
* remove some never-completed and now-obsolete code.Chris Lattner2005-12-121-11/+0
| | | | llvm-svn: 24671
* initial step at adding a dag-to-dag isel for X86 backend. Patch contributedChris Lattner2005-11-161-2/+11
| | | | | | by Evan Cheng! llvm-svn: 24371
* Separate X86ISelLowering stuff out from the X86ISelPattern.cpp file. PatchChris Lattner2005-11-151-2/+2
| | | | | | contributed by Evan Cheng. llvm-svn: 24358
* Add a new option to indicate we want the code generator to emit code ↵Chris Lattner2005-11-081-1/+2
| | | | | | quickly,not spending tons of time microoptimizing it. This is useful for an -O0style of build. llvm-svn: 24233
* 1. Use SubtargetFeatures in llc/lli.Jim Laskey2005-09-011-2/+4
| | | | | | | | 2. Propagate feature "string" to all targets. 3. Implement use of SubtargetFeatures in PowerPCTargetSubtarget. llvm-svn: 23192
* Remove the X86 and PowerPC Simple instruction selectors; their time hasNate Begeman2005-08-181-10/+4
| | | | | | passed. llvm-svn: 22886
* Eliminate all remaining tabs and trailing spaces.Jeff Cohen2005-07-271-1/+1
| | | | llvm-svn: 22523
* Implement Subtarget supportNate Begeman2005-07-121-1/+3
| | | | | | | | | | | | | | | | Implement the X86 Subtarget. This consolidates the checks for target triple, and setting options based on target triple into one place. This allows us to convert the asm printer and isel over from being littered with "forDarwin", "forCygwin", etc. into just having the appropriate flags for each subtarget feature controlling the code for that feature. This patch also implements indirect external and weak references in the X86 pattern isel, for darwin. Next up is to convert over the asm printers to use this new interface. llvm-svn: 22389
* Refactor things a bit to allow the ELF code emitter to run the X86 machine ↵Chris Lattner2005-07-111-1/+8
| | | | | | | | code emitter after itself. llvm-svn: 22376
* First round of support for doing scalar FP using the SSE2 ISA extension andNate Begeman2005-07-061-2/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | XMM registers. There are many known deficiencies and fixmes, which will be addressed ASAP. The major benefit of this work is that it will allow the LLVM register allocator to allocate FP registers across basic blocks. The x86 backend will still default to x87 style FP. To enable this work, you must pass -enable-sse-scalar-fp and either -sse2 or -sse3 to llc. An example before and after would be for: double foo(double *P) { double Sum = 0; int i; for (i = 0; i < 1000; ++i) Sum += P[i]; return Sum; } The inner loop looks like the following: x87: .LBB_foo_1: # no_exit fldl (%esp) faddl (%eax,%ecx,8) fstpl (%esp) incl %ecx cmpl $1000, %ecx #FP_REG_KILL jne .LBB_foo_1 # no_exit SSE2: addsd (%eax,%ecx,8), %xmm0 incl %ecx cmpl $1000, %ecx #FP_REG_KILL jne .LBB_foo_1 # no_exit llvm-svn: 22340
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